JPH10173098A - Power semiconductor device and its manufacture - Google Patents
Power semiconductor device and its manufactureInfo
- Publication number
- JPH10173098A JPH10173098A JP8329679A JP32967996A JPH10173098A JP H10173098 A JPH10173098 A JP H10173098A JP 8329679 A JP8329679 A JP 8329679A JP 32967996 A JP32967996 A JP 32967996A JP H10173098 A JPH10173098 A JP H10173098A
- Authority
- JP
- Japan
- Prior art keywords
- power semiconductor
- case
- semiconductor device
- liquid insulator
- insulator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 121
- 238000004519 manufacturing process Methods 0.000 title claims description 29
- 239000012212 insulator Substances 0.000 claims abstract description 121
- 239000007788 liquid Substances 0.000 claims abstract description 120
- 239000000758 substrate Substances 0.000 claims abstract description 64
- 238000007789 sealing Methods 0.000 claims abstract description 45
- 229920005989 resin Polymers 0.000 claims abstract description 39
- 239000011347 resin Substances 0.000 claims abstract description 39
- 239000003822 epoxy resin Substances 0.000 claims abstract description 35
- 229920000647 polyepoxide Polymers 0.000 claims abstract description 35
- 230000005484 gravity Effects 0.000 claims abstract description 27
- 238000000034 method Methods 0.000 claims abstract 13
- 239000007789 gas Substances 0.000 claims description 28
- 229920001296 polysiloxane Polymers 0.000 claims description 19
- 238000005192 partition Methods 0.000 claims description 13
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 claims description 7
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 claims description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 5
- 229910018503 SF6 Inorganic materials 0.000 claims description 3
- 239000001569 carbon dioxide Substances 0.000 claims description 3
- 229910002092 carbon dioxide Inorganic materials 0.000 claims description 3
- 239000000945 filler Substances 0.000 claims description 3
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 claims description 3
- 229960000909 sulfur hexafluoride Drugs 0.000 claims description 3
- 238000007599 discharging Methods 0.000 claims description 2
- 229910001873 dinitrogen Inorganic materials 0.000 claims 1
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 238000004299 exfoliation Methods 0.000 abstract 1
- 229910052751 metal Inorganic materials 0.000 description 26
- 239000002184 metal Substances 0.000 description 26
- 230000000694 effects Effects 0.000 description 19
- 239000000463 material Substances 0.000 description 10
- 229910000679 solder Inorganic materials 0.000 description 9
- 238000000926 separation method Methods 0.000 description 8
- 238000005470 impregnation Methods 0.000 description 7
- 239000000919 ceramic Substances 0.000 description 6
- 230000017525 heat dissipation Effects 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 230000005855 radiation Effects 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 239000003921 oil Substances 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 238000001816 cooling Methods 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000012447 hatching Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 239000003566 sealing material Substances 0.000 description 2
- 238000004062 sedimentation Methods 0.000 description 2
- 239000013464 silicone adhesive Substances 0.000 description 2
- 229920002379 silicone rubber Polymers 0.000 description 2
- 239000004945 silicone rubber Substances 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000011344 liquid material Substances 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 239000002480 mineral oil Substances 0.000 description 1
- 235000010446 mineral oil Nutrition 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000000191 radiation effect Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 238000009849 vacuum degassing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置の製法
にかかわり、とくにパワー半導体素子が収容されてなる
パワー半導体装置（以下、パワーモジュールという）の
製法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a power semiconductor device (hereinafter, referred to as a power module) containing a power semiconductor element.
【０００２】[0002]
【従来の技術】図７（ａ）は従来のパワーモジュールの
断面構造説明図であり、パワーモジュールの長手方向に
平行で、かつベース板に対して直角に、パワーモジュー
ルをほぼ２等分に分割する断面で切断されている。図７
（ｂ）は、パワー半導体素子３を中心とする、絶縁基板
およびその周辺部分の断面構造拡大説明図である。図７
において、１は放熱のための金属製のベース板、２はベ
ース板１上に固定された、セラミックからなる絶縁基板
である。２３はケースであり、前記ベース板１に対応す
る面が開口している直方体の箱体状に形成されており、
かつ、ベース板１を底面として、ベース板上にケース２
をのせて一体となるように形成されている。絶縁基板に
は、図７（ｂ）に示すようにその両面に金属パターン２
ａが接合されている。３は金属パターン２ａ上に接合さ
れたパワー半導体素子、３ａはパワー半導体素子３の電
極、３ｂは、パワー半導体素子３を絶縁性基板２上の金
属パターン２ａに接合する接合層、４はパワー半導体素
子３間を結線するアルミワイヤ、５はパワー半導体素子
３の制御用半導体素子５ａが搭載される制御基板、６
は、制御基板５をパワー半導体素子３の上方部に固定
し、かつ、制御基板５とパワー半導体素子３と結線する
ための中継端子、７は主端子８とパワー半導体素子３と
を結線する電極、８はケース２３の上部に取り付けられ
た主端子、１９は、パワー半導体素子３および制御基板
５を覆うためのシリコーンゲルの層、１０は、ケース２
３の上部を封止し、外部と遮断するエポキシ樹脂からな
る封止層、１１は封止層１０とシリコーンゲル９のあい
だの気層、１５はケース２３の上面に設けた開口部に接
着する蓋、２３はベース板１に固定されるケースであ
る。2. Description of the Related Art FIG. 7 (a) is an explanatory view of a cross-sectional structure of a conventional power module. The power module is divided into two substantially parallel to the longitudinal direction of the power module and perpendicular to a base plate. The cross section is cut. FIG.
FIG. 2B is an enlarged explanatory cross-sectional structure of the insulating substrate and its peripheral portion with the power semiconductor element 3 as the center. FIG.
In the drawings, 1 is a metal base plate for heat dissipation, and 2 is an insulating substrate made of ceramic fixed on the base plate 1. Reference numeral 23 denotes a case, which is formed in a rectangular parallelepiped box shape whose surface corresponding to the base plate 1 is open,
The case 2 is placed on the base plate with the base plate 1
And are formed so as to be integrated. As shown in FIG. 7B, a metal pattern 2 is formed on both sides of the insulating substrate.
a is joined. Reference numeral 3 denotes a power semiconductor element bonded on the metal pattern 2a; 3a, an electrode of the power semiconductor element 3; 3b, a bonding layer for bonding the power semiconductor element 3 to the metal pattern 2a on the insulating substrate 2; An aluminum wire for connecting the elements 3, a control board 5 on which the control semiconductor element 5 a of the power semiconductor element 3 is mounted, 6
Is a relay terminal for fixing the control board 5 above the power semiconductor element 3 and connecting the control board 5 and the power semiconductor element 3, and 7 is an electrode for connecting the main terminal 8 and the power semiconductor element 3. , 8 are main terminals mounted on the upper part of the case 23, 19 is a layer of silicone gel for covering the power semiconductor element 3 and the control board 5, and 10 is a case 2
A sealing layer made of epoxy resin for sealing the upper part of 3 and shielding the outside from the outside, 11 is a gas layer between the sealing layer 10 and the silicone gel 9, and 15 is adhered to an opening provided on the upper surface of the case 23. The lid 23 is a case fixed to the base plate 1.
【０００３】つぎにその製法について説明する。セラミ
ックからなる絶縁基板２の両面に、銅などを材質とする
金属板をろう付けし、エッチングにより金属パターン２
ａを形成したのち、金属パターンの表面にニッケルメッ
キを行う。この絶縁基板２を放熱のために金属製ベース
板１に半田リフローで固定する。つぎに、絶縁基板２の
金属パターン２ａ上にパワー半導体素子３を半田接合す
る。これらの金属パターン２ａ、パワー半導体素子３間
に、アルミワイヤー４をボンディングして結線する。ケ
ース２３に主端子８、電極７およびあらかじめ中継端子
６を取り付けた制御基板５を取り付ける。つぎに、電極
７と中継端子６に半田ペーストを付けた状態で、ケース
２３をベース板１にシリコーンゴム接着剤で接着し、電
極７と中継端子６を半田ペーストを挟んで金属パターン
２ａに接触させる。続いて、パワーモジュール全体を約
１７０℃に加熱し、前記半田ペーストを溶かし、電極７
と中継端子６を金属パターン２ａに半田付けする。つぎ
に、約０．１Ｔｏｒｒに減圧した状態で、ケース２３の
上面に設けた開口部からシリコーンゲルの層１９を制御
基板５よりも上の位置まで注入したのち、約０．１Ｔｏ
ｒｒのまま１時間脱泡する。そののち、１２５℃で１時
間保持してシリコーンゲルの層１９を硬化させる。つぎ
に、常圧で、ケース２３の上面に設けた開口部からエポ
キシ樹脂を注入し、１２５℃を３時間保持して硬化す
る。シリコーンゲルの層１９の線膨張係数がエポキシ樹
脂より大きいため、エポキシ樹脂の硬化後、温度が室温
に戻る際に、気層１１ができる。つぎに、開口部に蓋１
５をシリコーン接着剤（図示せず）で接着しケース２３
を密閉する。Next, the manufacturing method will be described. A metal plate made of copper or the like is brazed on both surfaces of an insulating substrate 2 made of ceramic, and the metal pattern 2 is formed by etching.
After forming a, nickel plating is performed on the surface of the metal pattern. The insulating substrate 2 is fixed to the metal base plate 1 for heat dissipation by solder reflow. Next, the power semiconductor element 3 is soldered on the metal pattern 2 a of the insulating substrate 2. An aluminum wire 4 is bonded and connected between the metal pattern 2a and the power semiconductor element 3. The control board 5 to which the main terminals 8, the electrodes 7, and the relay terminals 6 are mounted in advance is attached to the case 23. Next, with the solder paste applied to the electrodes 7 and the relay terminals 6, the case 23 is bonded to the base plate 1 with a silicone rubber adhesive, and the electrodes 7 and the relay terminals 6 are brought into contact with the metal pattern 2a with the solder paste interposed therebetween. Let it. Subsequently, the entire power module is heated to about 170 ° C. to melt the solder paste,
And the relay terminal 6 are soldered to the metal pattern 2a. Next, while the pressure is reduced to about 0.1 Torr, the silicone gel layer 19 is injected from the opening provided on the upper surface of the case 23 to a position above the control substrate 5, and then about 0.1 Torr.
Degas for 1 hour with rr. After that, the silicone gel layer 19 is cured by holding at 125 ° C. for 1 hour. Next, an epoxy resin is injected under normal pressure from an opening provided on the upper surface of the case 23, and cured at 125 ° C. for 3 hours. Since the linear expansion coefficient of the silicone gel layer 19 is larger than that of the epoxy resin, the air layer 11 is formed when the temperature returns to room temperature after the epoxy resin is cured. Next, cover 1 in the opening
5 with a silicone adhesive (not shown) and
Seal.
【０００４】つぎに、その作用について説明する。パワ
ーモジュールの作動中は、パワー半導体素子３や絶縁基
板２上の金属パターン２ａには最大３ｋＶの高電圧が印
加される。従来のパワーモジュールにおいては、シリコ
ーンゲルの層１９でパワー半導体素子３や絶縁基板２を
封止することにより、短い沿面長で沿面絶縁耐圧を確保
する。また、熱伝導性の高い窒化アルミニウムなどのセ
ラミックを絶縁基板２の材料として使うことにより、パ
ワー半導体素子３からの発熱を、効率的に金属ベース板
１へと放熱する。Next, the operation will be described. During operation of the power module, a high voltage of up to 3 kV is applied to the power semiconductor element 3 and the metal pattern 2 a on the insulating substrate 2. In the conventional power module, the power semiconductor element 3 and the insulating substrate 2 are sealed with the silicone gel layer 19, so that the creepage withstand voltage is secured with a short creepage length. Further, by using a ceramic such as aluminum nitride having high thermal conductivity as a material of the insulating substrate 2, heat generated from the power semiconductor element 3 is efficiently radiated to the metal base plate 1.
【０００５】[0005]
【発明が解決しようとする課題】従来のパワーモジュー
ルで封止用のシリコーンゲルの層１９として使用してい
たシリコーンゲルは、線膨張係数が９．６×１０-4／℃
であるのに対し、絶縁基板２は４．５×１０-6／℃、パ
ワー半導体素子３は４．２×１０-6／℃であって、シリ
コーンゲルの線膨張係数の方が絶縁基板やパワー半導体
素子の１００倍以上大きい。このため、パワーモジュー
ルの運転に伴うヒートサイクルによって、絶縁基板やパ
ワー半導体素子とシリコーンゲルとの界面剥離や亀裂が
生じるという欠点があった。ヒートサイクルの条件は、
たとえば−４０℃から１２５℃である。また、前記のよ
うに制御基板５がパワー半導体素子３の上部に固定され
ているため、ヒートサイクルに伴なってシリコーンゲル
が膨張または収縮する際に制御基板がシリコーンゲルの
変形の障害となり、いっそう界面剥離が生じやすいとい
う欠点があった。The silicone gel used as the sealing silicone gel layer 19 in the conventional power module has a linear expansion coefficient of 9.6 × 10 -4 / ° C.
On the other hand, the insulating substrate 2 is 4.5 × 10 −6 / ° C., the power semiconductor element 3 is 4.2 × 10 −6 / ° C., and the linear expansion coefficient of the silicone gel is smaller than that of the insulating substrate or More than 100 times larger than power semiconductor elements. For this reason, the heat cycle accompanying the operation of the power module has a drawback that the interface peeling or cracking between the insulating substrate or the power semiconductor element and the silicone gel occurs. Heat cycle conditions are:
For example, from -40C to 125C. Further, since the control substrate 5 is fixed on the power semiconductor element 3 as described above, when the silicone gel expands or contracts due to the heat cycle, the control substrate becomes an obstacle to the deformation of the silicone gel, and moreover. There was a drawback that interfacial separation easily occurred.
【０００６】また、セラミックよりも銅のほうが線膨張
係数が大きいため、ヒートサイクルによって、銅パター
ン２ａや銅ベース板１から応力が加わるために、絶縁基
板２に割れが生じるという欠点があった。Further, since copper has a larger linear expansion coefficient than ceramic, stress is applied from the copper pattern 2a and the copper base plate 1 due to a heat cycle, so that the insulating substrate 2 is cracked.
【０００７】このような界面剥離や絶縁基板に生じた割
れの部位に高電圧が印加されると、部分放電（微少放
電）が生じ、放電に起因するノイズによりパワー半導体
素子が誤作動し、さらにはパワー半導体素子の絶縁破壊
に至るという問題があった。また、パワー半導体素子か
ら生じる発熱の放熱特性が悪くなるという問題があっ
た。[0007] When a high voltage is applied to such interfacial peeling or a crack generated in the insulating substrate, a partial discharge (micro discharge) occurs, and the power semiconductor element malfunctions due to noise caused by the discharge. Has a problem that the dielectric breakdown of the power semiconductor element is caused. In addition, there is a problem that heat radiation characteristics of heat generated from the power semiconductor element deteriorate.
【０００８】本発明は前記のような問題点を解決するた
めになされたものであり、界面剥離や絶縁基板の割れに
よる部分放電を防止しうる、信頼性の高いパワー半導体
装置の製法を提供することを目的とする。The present invention has been made to solve the above problems, and provides a method of manufacturing a highly reliable power semiconductor device capable of preventing partial discharge due to interface peeling or cracking of an insulating substrate. The purpose is to:
【０００９】[0009]
【課題を解決するための手段】本発明のパワー半導体装
置の製法は、ケースの内部にパワー半導体素子および制
御基板を収容してなるパワー半導体装置の製法であっ
て、液状絶縁体を前記ケースに注入して前記パワー半導
体素子および前記制御基板を覆ったのち、前記液状絶縁
体の上に該液体絶縁体よりも比重の小さい樹脂を注入
し、かつ、硬化させて封止層として前記ケースの上部を
封止することを特徴とする。A method of manufacturing a power semiconductor device according to the present invention is a method of manufacturing a power semiconductor device in which a power semiconductor element and a control board are housed in a case, wherein a liquid insulator is provided in the case. After injecting and covering the power semiconductor element and the control substrate, a resin having a specific gravity smaller than that of the liquid insulator is injected onto the liquid insulator, and cured to form a sealing layer on the upper part of the case. Is sealed.
【００１０】前記封止層が、充填剤を含むまたは含まな
いエポキシ樹脂からなることが接着性の点で好ましい。It is preferable that the sealing layer is made of an epoxy resin containing or not containing a filler from the viewpoint of adhesiveness.
【００１１】前記液状絶縁体が、フロロカーボンおよび
絶縁油のうちのいずれかであることが絶縁耐力の点で好
ましい。The liquid insulator is preferably one of fluorocarbon and insulating oil from the viewpoint of dielectric strength.
【００１２】前記液状絶縁体を、前記ケース内を減圧し
た状態で注入することが含浸性の点で好ましい。It is preferable from the point of impregnation that the liquid insulator is injected while the pressure inside the case is reduced.
【００１３】前記ケースに配管およびポンプを取り付
け、前記液状絶縁体を循環することが放熱性の点で好ま
しい。It is preferable to attach a pipe and a pump to the case and circulate the liquid insulator from the viewpoint of heat radiation.
【００１４】本発明のパワー半導体装置の製法は、ケー
ス内部にパワー半導体素子および制御基板を収容してな
るパワー半導体装置の製法であって、液状絶縁体を前記
ケースに注入して前記パワー半導体素子および前記制御
基板を覆ったのち、前記液状絶縁体の上に該液状絶縁体
よりも比重の小さい樹脂を注入し、かつ、硬化させて仕
切り層を形成したのち、前記仕切り層のうえに封止用の
樹脂を注入し、かつ、硬化させて封止層をして前記ケー
スの上部を封止することを特徴とする。A method of manufacturing a power semiconductor device according to the present invention is a method of manufacturing a power semiconductor device in which a power semiconductor element and a control board are housed in a case, wherein a liquid insulator is injected into the case and the power semiconductor element is manufactured. And after covering the control substrate, injecting a resin having a lower specific gravity than the liquid insulator onto the liquid insulator, and curing the resin to form a partition layer, and then sealing on the partition layer. A case resin is injected and cured to form a sealing layer and seal the upper part of the case.
【００１５】前記仕切り層がシリコーンゲルからなるこ
とが沈降性の点で好ましい。It is preferable that the partition layer is made of silicone gel from the viewpoint of sedimentation.
【００１６】前記液状絶縁体が、フロロカーボンおよび
絶縁油のうちのいずれかからなることが絶縁耐力の点で
好ましい。It is preferable that the liquid insulator is made of any one of fluorocarbon and insulating oil from the viewpoint of dielectric strength.
【００１７】前記液状絶縁体を、前記ケース圧を減圧し
た状態で注入することが含浸性の点で好ましい。It is preferable from the point of impregnation that the liquid insulator is injected with the case pressure reduced.
【００１８】本発明のパワー半導体装置の製法は、ケー
スの内部にパワー半導体素子および制御基板を収容して
なるパワー半導体装置の製法であって、前記ケース内に
おいて、前記制御基板よりも低い位置まで樹脂を注入
し、かつ、硬化させたのち前記樹脂の上に液状絶縁体を
注入し、さらに、前記液状絶縁体の上に、前記液状絶縁
体よりも比重の小さい封止用の樹脂を注入し、かつ、硬
化させて封止層として前記ケースの上部を封止すること
を特徴とする。A method of manufacturing a power semiconductor device according to the present invention is a method of manufacturing a power semiconductor device in which a power semiconductor element and a control board are housed in a case. After injecting a resin, and after curing, a liquid insulator is injected onto the resin, and further, a sealing resin having a specific gravity smaller than that of the liquid insulator is injected onto the liquid insulator. And, it is characterized by being cured to seal the upper part of the case as a sealing layer.
【００１９】取り出し口をあらかじめ形成したケースを
用い、前記取り出し口から前記液状絶縁体を排出したの
ち、前記取り出し口にバルブを取り付け、気体絶縁体を
加圧しつつ注入することが樹脂の熱変形防止の点で好ま
しい。After the liquid insulator is discharged from the outlet using a case in which the outlet is formed in advance, a valve is attached to the outlet, and the gas insulator is injected while being pressurized to prevent thermal deformation of the resin. It is preferred in terms of.
【００２０】前記気体絶縁体として、二酸化炭素、窒素
および六フッ化硫黄ガスのうちのいずれかを用いること
が絶縁耐力の点で好ましい。It is preferable to use any one of carbon dioxide, nitrogen and sulfur hexafluoride gas as the gas insulator from the viewpoint of dielectric strength.
【００２１】前記取り出し口から前記液状絶縁体を排出
したのち、熱伝導率の高い絶縁性液体を注入し、つぎ
に、前記取り出し口を小蓋で密閉することが放熱性の点
で好ましい。After discharging the liquid insulator from the outlet, it is preferable to inject an insulating liquid having a high thermal conductivity, and then to close the outlet with a small lid from the viewpoint of heat dissipation.
【００２２】前記熱伝導率が０．１４〜０．３１ｃａｌ
／ｓｅｃ／ｃｍ／℃・１０3の範囲であることが放熱性
の点で好ましい。The thermal conductivity is 0.14 to 0.31 cal
/ Sec / cm / ° C. 10 3 is preferred from the viewpoint of heat dissipation.
【００２３】前記液状絶縁体を、前記ケース内を減圧し
た状態で注入することが含浸性の点で好ましい。It is preferable from the point of impregnation that the liquid insulator is injected while the pressure inside the case is reduced.
【００２４】本発明のパワー半導体装置は、ベース板、
ケース、絶縁基板、該絶縁基板上に接合されるパワー半
導体素子および制御基板からなるパワー半導体装置であ
って、前記絶縁基板、前記パワー半導体素子および前記
制御基板が、前記ケースの内部に収容され、かつ、液状
絶縁体で浸漬されるようにしたことを特徴とする。The power semiconductor device of the present invention comprises a base plate,
A case, an insulating substrate, a power semiconductor device including a power semiconductor element and a control substrate bonded on the insulating substrate, wherein the insulating substrate, the power semiconductor element and the control substrate are housed inside the case, Further, it is characterized in that it is immersed in a liquid insulator.
【００２５】前記液状絶縁体は、前記ケースの上部を封
止する封止用の樹脂よりも比重が大きいことが沈降性の
点で好ましい。The liquid insulator is preferably larger in specific gravity than a sealing resin for sealing the upper part of the case from the viewpoint of sedimentation.
【００２６】前記液状絶縁体は、フロロカーボンおよび
絶縁油のうちのいずれかであることが絶縁耐力の点で好
ましい。The liquid insulator is preferably one of fluorocarbon and insulating oil from the viewpoint of dielectric strength.
【００２７】[0027]
【発明の実施の形態】以下、添付図を参照しつつ、本発
明の実施の形態について詳しく説明する。Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.
【００２８】実施の形態１ 図１は、本発明の実施の形態１のパワーモジュールの断
面構造説明図であり、パワーモジュールの長手方向に平
行で、かつベース板に対して直角に、パワーモジュール
をほぼ２等分に分割する断面で切断されている。図１に
おいて、１は放熱のための金属製ベース板、２はベース
板１上に固定された絶縁基板であり、窒化シリコンまた
はアルミナなどのセラミックからなる。２３はケースで
あり、前記ベース板１に対応する面が開口している直方
体の箱体状に形成されており、かつ、ベース板１を底面
として、ベース板上にケースをのせて一体となるように
形成されている。絶縁基板２には、その両面に金属パタ
ーン２ａが接合されている。３は金属パターン２ａ上に
接合されたパワー半導体素子、４はパワー半導体素子３
間を結線するアルミワイヤ、５はパワー半導体素子３の
駆動回路や保護回路を形成する制御用半導体素子５ａを
搭載する制御基板、６は、制御基板５をパワー半導体素
子３の上方部に固定し、かつ、制御基板５とパワー半導
体素子３と結線するための中継端子、７は主端子８とパ
ワー半導体素子３とを結線する電極、８はケース２３の
上部に取り付けられた主端子、１０はケース２３の上部
を封止し、外部と遮断する封止層、１１は封止層１０と
液状絶縁体１２のあいだの気層、１２はパワー半導体素
子３および制御基板５を浸漬する液状絶縁体、１５はケ
ース２３の開口部に嵌合させて接着する蓋、２３は、主
端子８、電極７および制御基板５が取り付けられ、か
つ、ベース板１に接着されたケースである。Embodiment 1 FIG. 1 is an explanatory view of a cross-sectional structure of a power module according to Embodiment 1 of the present invention. The power module is parallel to a longitudinal direction of the power module and perpendicular to a base plate. It is cut at a cross section that is roughly divided into two equal parts. In FIG. 1, reference numeral 1 denotes a metal base plate for heat dissipation, and 2 denotes an insulating substrate fixed on the base plate 1, which is made of a ceramic such as silicon nitride or alumina. Reference numeral 23 denotes a case, which is formed in a rectangular parallelepiped box shape whose surface corresponding to the base plate 1 is open, and is integrated by mounting the case on the base plate with the base plate 1 as a bottom surface. It is formed as follows. The metal pattern 2a is joined to both sides of the insulating substrate 2. Reference numeral 3 denotes a power semiconductor element bonded on the metal pattern 2a, and reference numeral 4 denotes a power semiconductor element 3.
An aluminum wire for connecting between them, 5 is a control board on which a control semiconductor element 5a for forming a drive circuit and a protection circuit of the power semiconductor element 3 is mounted, and 6 is a control board fixed to the upper part of the power semiconductor element 3 A relay terminal for connecting the control board 5 and the power semiconductor element 3; an electrode 7 for connecting the main terminal 8 to the power semiconductor element 3; a main terminal 8 mounted on the upper part of the case 23; A sealing layer for sealing the upper part of the case 23 and blocking the outside; an air layer 11 between the sealing layer 10 and the liquid insulator 12; a liquid insulator 12 immersed in the power semiconductor element 3 and the control substrate 5 Reference numeral 15 denotes a lid fitted and bonded to the opening of the case 23, and reference numeral 23 denotes a case to which the main terminal 8, the electrode 7, and the control board 5 are attached and which is bonded to the base plate 1.
【００２９】封止層１０は、ケース２３の内部に封入さ
れる液状絶縁体等が外部にもれ出たりすることのないよ
うにケースの上部を封止するとともに、主端子８を固定
するために用いられる。したがって、封止層の材質とし
て必要な条件は、ケースの内部に、ともに収容されて
いる液状絶縁体などと化学的変化を生じることがない、
その硬化条件が、液状絶縁体やパワー半導体素子に有
害な影響を与えない、液状絶縁体の比重（１．４〜
２．０）よりも比重が小さくて、１．０〜１．７であ
る、ケース内に収容されているパワー半導体素子や電
極などの部品に対する熱応力が小さい、ケース内に収
容されている部品との接着性が良いことである。The sealing layer 10 seals the upper portion of the case so that the liquid insulator or the like sealed in the case 23 does not leak outside, and also fixes the main terminals 8. Used for Therefore, the conditions required as the material of the sealing layer, inside the case, does not cause a chemical change with the liquid insulator and the like housed together,
The curing conditions do not adversely affect the liquid insulator or the power semiconductor element, and the specific gravity of the liquid insulator (1.4 to
2.0) having a specific gravity lower than 1.0 and 1.7 to 1.7, and having a small thermal stress on components such as power semiconductor elements and electrodes housed in the case and having a small thermal stress. It has good adhesiveness with the adhesive.
【００３０】具体的な例としては、エポキシ樹脂または
充填剤を含むエポキシ樹脂（以下、単にエポキシ樹脂と
いう）をあげることができる。このようなエポキシ樹脂
を用いることのメリットはケース２３との接着力が強い
ことである。Specific examples include an epoxy resin or an epoxy resin containing a filler (hereinafter simply referred to as an epoxy resin). An advantage of using such an epoxy resin is that the adhesive strength to the case 23 is strong.
【００３１】一方、液状絶縁体は、パワー半導体素子３
および制御基板５を液状絶縁体中に浸漬することによっ
てパワー半導体素子の表面および制御基板の表面におけ
る沿面放電の発生を抑制するために用いられる。したが
って、液状絶縁体の材質として必要な条件は、電気的
絶縁性に優れていて絶縁耐圧が１５ｋＶ／ｍｍと高い、
絶縁基板やパワー半導体素子に割れが生じていてもそ
の割れた隙間に浸透しうる、本発明において用いる封
止層とのあいだで化学的変化を起こすことがない、本
発明において封止層として用いるエポキシ樹脂（比重
１．０〜１．７）よりも比重が大きくて、１．４〜２．
０であることである。具体的な例としては、たとえばフ
ロロカーボンなどのフッ素系不活性液体（１．７〜２．
０）、絶縁油（１．４以上）をあげることができる。On the other hand, the liquid insulator is a power semiconductor element 3
Further, the control substrate 5 is immersed in a liquid insulator to suppress generation of creeping discharge on the surface of the power semiconductor element and the surface of the control substrate. Therefore, the necessary conditions for the material of the liquid insulator are that it has excellent electrical insulation properties and a high withstand voltage of 15 kV / mm.
Even if the insulating substrate or the power semiconductor element has a crack, it can penetrate into the cracked gap, does not cause a chemical change with the sealing layer used in the present invention, and is used as a sealing layer in the present invention Specific gravity is higher than epoxy resin (specific gravity 1.0 to 1.7), and 1.4 to 2.
0. As a specific example, for example, a fluorine-based inert liquid such as fluorocarbon (1.7 to 2.
0) and insulating oil (1.4 or more).
【００３２】つぎに、本発明の実施の形態１のパワーモ
ジュールの製法について説明する。セラミックからなる
絶縁基板２の両面に、銅等を材質とする金属板をろう付
けし、エッチングにより金属パターン２ａを形成したの
ち、金属パターンの表面にニッケルメッキを行う。この
絶縁基板２を金属製ベース板１上に半田リフローで固定
する。Next, a method of manufacturing the power module according to the first embodiment of the present invention will be described. After a metal plate made of copper or the like is brazed to both surfaces of the insulating substrate 2 made of ceramic, a metal pattern 2a is formed by etching, and then nickel plating is performed on the surface of the metal pattern. The insulating substrate 2 is fixed on the metal base plate 1 by solder reflow.
【００３３】つぎに、絶縁基板２の金属パターン２ａ上
にパワー半導体素子３を半田接合する。これらの金属パ
ターン２ａおよびパワー半導体素子３のそれぞれを、図
１に示すように、アルミワイヤ４をボンディングして結
線する。つぎに、ケース２３に主端子８、電極７、およ
びあらかじめ中継端子６を取り付けた制御基板５を取り
付ける。つぎに、電極７と中継端子６に半田ペーストを
付けた状態で、ケース２３をベース板１にシリコーン接
着剤で接着し、電極７と中継端子６を半田ペーストを挟
んで金属パターン２ａに接触させる。続いて、パワーモ
ジュール全体を約１７０℃に加熱して、前記半田ペース
トを溶かし、電極７と中継端子６を、金属パターン２ａ
のそれぞれに半田付けする。つぎに、ケース２３の内部
を約０．１Ｔｏｒｒに減圧した状態で、ケースの上部を
封止するための封止層１０としてのエポキシ樹脂よりも
比重の大きい液状絶縁体１２を、制御基板５よりも上の
高さまでケース２３の上面に設けた開口部である取り出
し口１３から注入する。つぎに、常圧で、ケース２３の
上面に設けた開口部からエポキシ樹脂を注入すると、エ
ポキシ樹脂の方が液状絶縁体１２より比重が軽いため液
状絶縁体上にエポキシ樹脂の層が形成される。このま
ま、温度１２５℃を３時間保持してエポキシ樹脂を硬化
する。エポキシ樹脂からなる封止層１０の硬化後、温度
が室温に戻ると、液状絶縁体は収縮して気層１１ができ
る。図１において、エポキシ樹脂からなる封止層１０を
ハッチングで図示した。気層１１はエポキシ樹脂からな
る封止層１０と液状絶縁体の層１２とのあいだに生じ
る。つぎに、開口部に蓋１５をシリコーンゴム接着剤
（図示せず）で接着してケース２３を密閉する。本実施
の形態において、液状絶縁体を注入する際に、ケース内
を減圧して注入すると、含浸性を向上させることができ
る。Next, the power semiconductor element 3 is soldered on the metal pattern 2a of the insulating substrate 2. Each of the metal pattern 2a and the power semiconductor element 3 is connected by bonding an aluminum wire 4 as shown in FIG. Next, the control board 5 to which the main terminals 8, the electrodes 7, and the relay terminals 6 are mounted in advance is attached to the case 23. Next, with the solder paste applied to the electrodes 7 and the relay terminals 6, the case 23 is bonded to the base plate 1 with a silicone adhesive, and the electrodes 7 and the relay terminals 6 are brought into contact with the metal pattern 2a with the solder paste interposed therebetween. . Subsequently, the entire power module is heated to about 170 ° C. to melt the solder paste, and the electrodes 7 and the relay terminals 6 are connected to the metal pattern 2a.
Solder to each of Next, in a state where the pressure inside the case 23 is reduced to about 0.1 Torr, the liquid insulator 12 having a specific gravity larger than that of the epoxy resin as the sealing layer 10 for sealing the upper part of the case is removed from the control board 5. Injection is performed up to the height through the outlet 13 which is an opening provided on the upper surface of the case 23. Next, when epoxy resin is injected from the opening provided on the upper surface of the case 23 at normal pressure, an epoxy resin layer is formed on the liquid insulator because the epoxy resin has a lower specific gravity than the liquid insulator 12. . While keeping the temperature at 125 ° C. for 3 hours, the epoxy resin is cured. When the temperature returns to room temperature after the curing of the sealing layer 10 made of epoxy resin, the liquid insulator shrinks to form the gas layer 11. In FIG. 1, a sealing layer 10 made of an epoxy resin is shown by hatching. The gas layer 11 is formed between the sealing layer 10 made of epoxy resin and the liquid insulator layer 12. Next, the lid 15 is adhered to the opening with a silicone rubber adhesive (not shown) to seal the case 23. In this embodiment, when the liquid insulator is injected, if the pressure inside the case is reduced, the impregnation property can be improved.
【００３４】つぎに、その効果について説明する。パワ
ーモジュールの作動中は、パワー半導体３や絶縁基板２
上の金属パターン２ａには最大３ｋＶ以上の高電圧が印
加される。従来のパワーモジュールでは、シリコーンゲ
ルの層１９でパワー半導体素子３や絶縁基板２を封止す
ることにより、沿面絶縁耐圧を確保したが、本実施例で
は、液状絶縁体で封止したので、運転に伴う前記ヒート
サイクルがかかっても、絶縁基板およびパワー半導体素
子は液状絶縁体に浸った状態にあるため、界面剥離は生
じない。さらに、絶縁基板に割れが生じても、空隙に液
状絶縁体が入り込むので部分放電の発生を防止すること
ができる。Next, the effect will be described. During operation of the power module, the power semiconductor 3 or the insulating substrate 2
A high voltage of 3 kV or more is applied to the upper metal pattern 2a. In the conventional power module, the power semiconductor element 3 and the insulating substrate 2 are sealed with the silicone gel layer 19 to secure the creepage withstand voltage. Even if the above heat cycle is applied, since the insulating substrate and the power semiconductor element are immersed in the liquid insulator, the interface separation does not occur. Furthermore, even if a crack occurs in the insulating substrate, the occurrence of partial discharge can be prevented because the liquid insulator enters the gap.
【００３５】実施の形態２ 図２は、本発明の実施の形態２のパワーモジュールの断
面構造説明図であり、２８はケース２３に取り付けた配
管、２９は配管２８に取り付けたポンプである。その他
の符号は、図１に示した要素と同一の要素には同一の符
号を付して示した（以下、図３以降についても同様）。Embodiment 2 FIG. 2 is an explanatory sectional view of a power module according to Embodiment 2 of the present invention. Reference numeral 28 denotes a pipe attached to a case 23, and 29 denotes a pump attached to the pipe 28. As for other reference numerals, the same elements as those shown in FIG. 1 are denoted by the same reference numerals (the same applies to FIG. 3 and subsequent figures).
【００３６】前記実施の形態１では、液状絶縁体１２を
ケース２３内に封入しただけであるが、本実施の形態２
ではケース２３に配管２８およびポンプ２９を取り付
け、液状絶縁体１２を循環してもよい。In the first embodiment, the liquid insulator 12 is merely sealed in the case 23.
In this case, a pipe 28 and a pump 29 may be attached to the case 23 to circulate the liquid insulator 12.
【００３７】本実施の形態では、液状絶縁体をポンプに
よって循環させたため、冷却効率が向上した。In this embodiment, since the liquid insulator is circulated by the pump, the cooling efficiency is improved.
【００３８】実施の形態３ 図３は、本発明の実施の形態３のパワーモジュールの断
面構造説明図であり、９は液状絶縁体２上に注入し、か
つ硬化させた仕切り層としてのシリコーンゲルからなる
樹脂の層である。Third Embodiment FIG. 3 is an explanatory sectional view of a power module according to a third embodiment of the present invention. Reference numeral 9 denotes a silicone gel as a partition layer injected onto the liquid insulator 2 and cured. It is a resin layer composed of
【００３９】前記実施の形態１では、液状絶縁体１２と
封止層１０のエポキシ樹脂の比重差が大きいものを用い
たが、比重差が小さいばあいは、エポキシ樹脂の封止の
前に液状絶縁体１２よりも比重の小さい樹脂の層（図３
において、１０の封止層とは、傾きが逆のハッチングで
図示した）を液状絶縁体上に注入して硬化させて、液状
絶縁体の層上に仕切り層を形成してもよい。このような
仕切り層を形成したのち、仕切り層上に封止用の樹脂
を、実施の形態１と同様に注入し、かつ、硬化させて封
止層１０を形成する。In the first embodiment, the epoxy resin of the liquid insulator 12 and the epoxy resin of the sealing layer 10 have a large specific gravity difference. However, if the specific gravity difference is small, the liquid resin is sealed before the epoxy resin is sealed. A resin layer having a lower specific gravity than the insulator 12 (FIG. 3)
In this case, a partition layer may be formed on the liquid insulator layer by injecting a liquid sealing material and curing the liquid sealing material (indicated by hatching having an inclination opposite to that of the sealing layer 10). After forming such a partition layer, a sealing resin is injected onto the partition layer in the same manner as in the first embodiment, and cured to form a sealing layer 10.
【００４０】本実施の形態３においては、比重の小さい
樹脂は、このような仕切りとして形成されるので、その
材質として必要な条件は、その硬化後に液状絶縁体や
硬質樹脂と化学的変化を生じることがない、その厚さ
が１ｍｍ程度であっても破れたりすることがないことで
ある。具体的な例としては、シリコーンゲルをあげるこ
とができる。In the third embodiment, since the resin having a small specific gravity is formed as such a partition, the necessary conditions for the material thereof are such that a chemical change occurs with the liquid insulator or the hard resin after the curing. That is, even if the thickness is about 1 mm, it is not broken. A specific example is a silicone gel.
【００４１】本実施の形態では、エポキシ樹脂封止の前
に比重の小さい樹脂からなる仕切り層を設けたため、比
重の小さい樹脂の層がケース内部の仕切りとなり、エポ
キシ樹脂が液状絶縁体とまざることはなく、実施の形態
１および２のばあいと比較して比重の大きなエポキシ樹
脂や、比重の小さな液状絶縁体を使用できる効果があ
る。In this embodiment, since the partition layer made of a resin having a low specific gravity is provided before sealing with the epoxy resin, the layer of the resin having a low specific gravity serves as a partition inside the case, and the epoxy resin is not mixed with the liquid insulator. However, there is an effect that an epoxy resin having a higher specific gravity or a liquid insulator having a lower specific gravity can be used as compared with the first and second embodiments.
【００４２】実施の形態４ 図４は、本発明の実施の形態４のパワーモジュールの断
面構造説明図であり、９はパワー半導体素子３を覆う樹
脂の層である。Fourth Embodiment FIG. 4 is an explanatory view of a cross-sectional structure of a power module according to a fourth embodiment of the present invention. Reference numeral 9 denotes a resin layer that covers the power semiconductor element 3.
【００４３】前記実施の形態１および２では、パワー半
導体素子３を液状絶縁体１２に浸漬したが、樹脂の層９
で封止してもよい。前記樹脂としてはシリコーンゲルを
用いることができる。In the first and second embodiments, the power semiconductor element 3 is immersed in the liquid insulator 12.
May be sealed. Silicone gel can be used as the resin.
【００４４】本実施の形態４では、パワー半導体素子３
を樹脂の層９で封入したため、パワーモジュールを上下
逆にして、ベース板が上にくるように取り付けても、気
層１１がパワー半導体素子３や絶縁基板２に接すること
がなく、気層１１がパワー半導体素子に触れないため、
パワー半導体素子や絶縁基板上で沿面放電が生じること
なく、絶縁耐力が低下しないという効果がある。また、
実施の形態５または６に説明するように、樹脂の層９で
パワー半導体素子などを封入しておくと、液状絶縁体を
気体絶縁体や絶縁性液体を入れかえる際にワイヤボンデ
ィングに力が加わってはずれたり、パワー半導体素子に
損傷が入ることがない。In the fourth embodiment, the power semiconductor element 3
Is sealed in a resin layer 9, so that even when the power module is turned upside down and the base plate is mounted on the upper side, the gas layer 11 does not come into contact with the power semiconductor element 3 or the insulating substrate 2, and the gas layer 11 Does not touch the power semiconductor element,
There is an effect that surface discharge does not occur on the power semiconductor element or the insulating substrate, and the dielectric strength does not decrease. Also,
As described in the fifth or sixth embodiment, when a power semiconductor element or the like is sealed in the resin layer 9, force is applied to wire bonding when a liquid insulator is replaced with a gas insulator or an insulating liquid. It does not come off or damage the power semiconductor element.
【００４５】実施の形態５ 図５は、本発明の実施の形態５のパワーモジュールの断
面構造説明図であり、１６は樹脂の層９と封止層１０の
あいだに封入された気体絶縁体、１３はケース２３に取
り付けられた取り出し口、２７は取り出し口に取り付け
られたバルブである。Fifth Embodiment FIG. 5 is an explanatory sectional view of a power module according to a fifth embodiment of the present invention. In FIG. 5, reference numeral 16 denotes a gas insulator sealed between a resin layer 9 and a sealing layer 10; 13 is a takeout port attached to the case 23, and 27 is a valve attached to the takeout port.
【００４６】前記実施の形態４では、樹脂の層９上の制
御基板５を液状絶縁体１２で浸漬したが本実施の形態４
においては、液状絶縁体のかわりに気体絶縁体を用いる
ことができる。気体絶縁体の材質として必要な条件は
絶縁基板やパワー半導体素子と化学的変化を生じない、
安定性を有することであり、封入するときの条件は、ケ
ースの機械的強度が耐えうる気体圧力で封入することで
ある。具体的には、気体絶縁体としては、二酸化炭素、
窒素、六フッ化硫黄ガス等を用い、圧力としては０〜５
ｋｇ／ｃｍ2とする。圧力容器（ボンベ）から気体絶縁
体を注入するには、液状絶縁体１２を取り出し口１３か
ら排除し、気体絶縁体１６を加圧しつつ注入する。In the fourth embodiment, the control substrate 5 on the resin layer 9 is immersed in the liquid insulator 12.
In, a gas insulator can be used instead of a liquid insulator. The necessary conditions for the material of the gas insulator do not cause a chemical change with the insulating substrate or the power semiconductor element.
It is required to have stability, and the condition at the time of sealing is to seal at a gas pressure that can withstand the mechanical strength of the case. Specifically, as the gas insulator, carbon dioxide,
Nitrogen, sulfur hexafluoride gas, etc., at a pressure of 0-5
kg / cm 2 . In order to inject the gas insulator from the pressure vessel (cylinder), the liquid insulator 12 is removed from the outlet 13 and the gas insulator 16 is injected while being pressurized.
【００４７】本実施の形態では、液状絶縁体を取り出し
て気体を加圧しつつ注入したので、樹脂の熱膨張を抑制
し、界面剥離を防止する効果がある。なお、本実施の形
態においては、最終的に気体絶縁体を注入するので封止
層を形成する前に注入しておく液体は必ずしも実施の形
態１〜５のような液状絶縁体でなくてもよいが、前記絶
縁性液体であれば、これを取り出して気体絶縁体を注入
する際、ケース内に液状絶縁体が多少残ることがあって
もパワー半導体素子などの絶縁耐力が低下することがな
い。In this embodiment, since the liquid insulator is taken out and injected while pressurizing the gas, there is an effect that the thermal expansion of the resin is suppressed and the interface separation is prevented. In the present embodiment, since the gas insulator is finally injected, the liquid injected before forming the sealing layer is not necessarily a liquid insulator as in Embodiments 1 to 5. However, if the insulating liquid is used, when it is taken out and injected with a gaseous insulator, the dielectric strength of a power semiconductor element or the like does not decrease even if some liquid insulator remains in the case. .
【００４８】実施の形態６ 図６は、本発明の実施の形態６のパワーモジュール構造
を示すものであり、１４は樹脂９と封止層１０のあいだ
に封入された絶縁性液体である。Sixth Embodiment FIG. 6 shows a power module structure according to a sixth embodiment of the present invention. Reference numeral 14 denotes an insulating liquid sealed between the resin 9 and the sealing layer 10.
【００４９】前記実施の形態５では、樹脂の層９と封止
層１０のあいだに気体絶縁体１６を封入したが、熱伝導
率の高い絶縁性液体１４で封止してもよい。本実施の形
態６における絶縁性液体は、とくに放熱特性を向上させ
るために用いられる。したがって絶縁性液体の材質とし
て必要な条件は、実施の形態１の液体絶縁体の条件と同
様の条件のほか、その熱伝導率が高く、０．１４〜
０．３１であり、とくに好ましくは０．２８〜０．３１
ｃａｌ／ｓｅｃ／ｃｍ／℃・１０3あることである。具
体的な例としては、ナフテン系鉱油をあげることができ
る。ここで、熱伝導率は、高い方が好ましい。一方、本
発明のパワー半導体装置の製造コストを考慮し、入手し
やすいものを用いうるとともに、放熱性の効果をうるた
めに、前記熱伝導率の範囲を定めた。絶縁性液体を注入
したのちは、また、本実施の形態６においては、絶縁性
液体を注入する際に、真空脱気する。取り出し口１３に
は小蓋１５ａを接着し、絶縁性液体の漏れを防ぐ。In the fifth embodiment, the gas insulator 16 is sealed between the resin layer 9 and the sealing layer 10, but may be sealed with the insulating liquid 14 having high thermal conductivity. The insulating liquid according to the sixth embodiment is used particularly for improving heat radiation characteristics. Therefore, the necessary conditions for the material of the insulating liquid are the same as the conditions of the liquid insulator of the first embodiment, as well as the high thermal conductivity, 0.14 to
0.31, particularly preferably 0.28 to 0.31
cal / sec / cm / ° C. · 10 3 . A specific example is a naphthenic mineral oil. Here, the thermal conductivity is preferably higher. On the other hand, in consideration of the manufacturing cost of the power semiconductor device of the present invention, an easily available device can be used, and the range of the thermal conductivity is determined so as to obtain a heat radiation effect. After injecting the insulating liquid, in the sixth embodiment, when injecting the insulating liquid, vacuum degassing is performed. A small lid 15a is bonded to the outlet 13 to prevent leakage of the insulating liquid.
【００５０】本実施の形態では、比重に関する制約がな
いので、熱伝導率の高い絶縁性液体を用いることがで
き、放熱特性を向上させる効果がある。In this embodiment, since there is no restriction on the specific gravity, an insulating liquid having a high thermal conductivity can be used, and there is an effect of improving the heat radiation characteristics.
【００５１】[0051]
【発明の効果】本発明の請求項１にかかわる効果は、パ
ワー半導体素子および制御基板を液状絶縁体で覆ったの
で、運転に伴うヒートサイクルがかかっても、絶縁基板
およびパワー半導体素子は液状絶縁体に浸った状態にあ
るため、界面剥離は生じないことである。さらに、絶縁
基板に割れが生じても、空隙に液状絶縁体が入り込み部
分放電の発生を防止することができることである。According to the first aspect of the present invention, the power semiconductor element and the control substrate are covered with the liquid insulator, so that the insulating substrate and the power semiconductor element can be insulated even if a heat cycle is applied during operation. Since it is immersed in the body, interfacial separation does not occur. Furthermore, even if a crack occurs in the insulating substrate, the liquid insulator can enter the gap to prevent the occurrence of partial discharge.
【００５２】本発明の請求項２にかかわる効果は、ケー
スとの接着性がよく、気密性のよいパワーモジュールを
うることである。An effect of the second aspect of the present invention is to obtain a power module having good adhesion to a case and good airtightness.
【００５３】本発明の請求項３にかかわる効果は、入手
しやすい材料により、パワー半導体素子および制御基板
を液状絶縁体で覆ったので、運転に伴うヒートサイクル
がかかっても、絶縁基板およびパワー半導体素子は液状
絶縁体に浸った状態にあるため、界面剥離は生じないこ
とである。さらに、絶縁基板に割れが生じても、空隙に
液状絶縁体が入り込み部分放電の発生を防止することが
できることである。According to the third aspect of the present invention, the power semiconductor element and the control substrate are covered with a liquid insulator using a readily available material. Since the element is immersed in the liquid insulator, interfacial separation does not occur. Furthermore, even if a crack occurs in the insulating substrate, the liquid insulator can enter the gap to prevent the occurrence of partial discharge.
【００５４】本発明の請求項４にかかわる効果は、含浸
性が向上することである。An effect according to claim 4 of the present invention is that the impregnation property is improved.
【００５５】本発明の請求項５にかかわる効果は、液状
絶縁体をポンプによって循環させたため、冷却効率が向
上することである。An effect according to claim 5 of the present invention is that cooling efficiency is improved because the liquid insulator is circulated by the pump.
【００５６】本発明の請求項６にかかわる効果は、エポ
キシ樹脂や、液状絶縁体の材料に関する選択範囲を広く
することができ、エポキシ樹脂が沈降して液状絶縁体と
まざることがないことである。The effect of the sixth aspect of the present invention is that the selection range of the epoxy resin and the material of the liquid insulator can be widened, and the epoxy resin does not settle and mix with the liquid insulator. .
【００５７】本発明の請求項７にかかわる効果は、入手
しやすい材料により、エポキシ樹脂が沈降して液状絶縁
体とまざることがない効果をうることである。An advantage of the present invention according to claim 7 is that an easily obtainable material has an effect that the epoxy resin does not settle and mix with the liquid insulator.
【００５８】本発明の請求項８にかかわる効果は、入手
しやすい材料により、パワー半導体素子および制御基板
を液状絶縁体で覆ったので、運転に伴うヒートサイクル
がかかっても、絶縁基板およびパワー半導体素子は液状
絶縁体に浸った状態にあるため、界面剥離は生じないこ
とである。さらに、絶縁基板に割れが生じても、空隙に
液状絶縁体が入り込み部分放電の発生を防止することが
できることである。According to the eighth aspect of the present invention, the power semiconductor element and the control substrate are covered with a liquid insulator using a readily available material. Since the element is immersed in the liquid insulator, interfacial separation does not occur. Furthermore, even if a crack occurs in the insulating substrate, the liquid insulator can enter the gap to prevent the occurrence of partial discharge.
【００５９】本発明の請求項９にかかわる効果は、含浸
性が向上することである。An effect of the ninth aspect of the present invention is that the impregnation property is improved.
【００６０】本発明の請求項１０にかかわる効果は、制
御基板および電極の制約なしに樹脂部分の熱膨張・収縮
が生じるので、パワー半導体素子や絶縁基板の界面剥離
が生じることがないことである。An effect of the tenth aspect of the present invention is that the thermal expansion and contraction of the resin portion occurs without restriction of the control substrate and the electrodes, so that the interface separation between the power semiconductor element and the insulating substrate does not occur. .
【００６１】本発明の請求項１１にかかわる効果は、気
体絶縁体が、樹脂の熱膨張を抑制し、パワー半導体素子
や絶縁基板の界面剥離が生じることがないことである。An effect according to claim 11 of the present invention is that the gas insulator suppresses the thermal expansion of the resin, and the interface separation between the power semiconductor element and the insulating substrate does not occur.
【００６２】本発明の請求項１２にかかわる効果は、容
易に絶縁耐力の高い気体絶縁体を用いることができるこ
とである。An advantage of the twelfth aspect of the present invention is that a gas insulator having a high dielectric strength can be easily used.
【００６３】本発明の請求項１３にかかわる効果は、比
重に関する制約がないので、熱伝導率の高い絶縁性液体
を用いることができ、放熱特性を向上できることであ
る。The effect of claim 13 of the present invention is that since there is no restriction on specific gravity, an insulating liquid having high thermal conductivity can be used, and heat radiation characteristics can be improved.
【００６４】本発明の請求項１４にかかわる効果は、パ
ワー半導体素子からの放熱性を入手しやすい液体材料に
よってうることである。The effect of claim 14 of the present invention is that heat dissipation from the power semiconductor element can be obtained by a liquid material which is easily available.
【００６５】本発明の請求項１５にかかわる効果は、含
浸性が向上することである。An effect according to claim 15 of the present invention is that the impregnation property is improved.
【００６６】本発明の請求項１６にかかわる効果は、液
状絶縁体で封止したので、運転に伴うヒートサイクルが
かかっても、絶縁基板およびパワー半導体素子は液状絶
縁体に浸った状態にあるため、界面剥離は生じない。さ
らに、絶縁基板に割れが生じても、空隙に液状絶縁体が
入り込み部分放電の発生を防止することができることで
ある。The effect according to claim 16 of the present invention is that since the semiconductor device is sealed with the liquid insulator, the insulating substrate and the power semiconductor element are immersed in the liquid insulator even if a heat cycle accompanying the operation is applied. No interfacial peeling occurs. Furthermore, even if a crack occurs in the insulating substrate, the liquid insulator can enter the gap to prevent the occurrence of partial discharge.
【００６７】本発明の請求項１７にかかわる効果は、液
状絶縁体の上にエポキシ樹脂を注入した際に混ざりあう
ことがないことである。The effect of the seventeenth aspect of the present invention is that the epoxy resin is not mixed when the epoxy resin is injected onto the liquid insulator.
【００６８】本発明の請求項１８にかかわる効果は、入
手しやすい液状絶縁体により、絶縁耐力をうることがで
きることである。The effect of the eighteenth aspect of the present invention is that the dielectric strength can be obtained by a readily available liquid insulator.
【図１】 本発明の一実施の形態にかかわるパワー半導
体装置のモジュール構造を示す断面構造説明図である。FIG. 1 is a sectional structural explanatory view showing a module structure of a power semiconductor device according to one embodiment of the present invention.
【図２】 本発明の他の実施の形態にかかわるパワー半
導体装置のモジュール構造を示す断面構造説明図であ
る。FIG. 2 is an explanatory sectional view showing a module structure of a power semiconductor device according to another embodiment of the present invention.
【図３】 本発明の他の実施の形態にかかわるパワー半
導体装置のモジュール構造を示す断面構造説明図であ
る。FIG. 3 is an explanatory sectional view showing a module structure of a power semiconductor device according to another embodiment of the present invention.
【図４】 本発明の他の実施の形態にかかわるパワー半
導体装置のモジュール構造を示す断面構造説明図であ
る。FIG. 4 is an explanatory sectional view showing a module structure of a power semiconductor device according to another embodiment of the present invention.
【図５】 本発明の他の実施の形態にかかわるパワー半
導体装置のモジュール構造を示す断面構造説明図であ
る。FIG. 5 is an explanatory sectional view showing a module structure of a power semiconductor device according to another embodiment of the present invention.
【図６】 本発明の他の実施の形態にかかわるパワー半
導体装置のモジュール構造を示す断面構造説明図であ
る。FIG. 6 is an explanatory sectional view showing a module structure of a power semiconductor device according to another embodiment of the present invention.
【図７】 従来例のパワー半導体装置のモジュール構造
を示す断面構造説明図である。FIG. 7 is an explanatory sectional view showing a module structure of a conventional power semiconductor device.
１ ベース板、２ 絶縁基板、３ パワー半導体素子、
５ 制御基板、９ 樹脂の層、１０ 封止層、１１ 気
層、１２ 液状絶縁体、１４ 絶縁性液体、１５ 蓋、
１６ 気体絶縁体、１９ シリコーンゲルの層、２３
ケース。1 base plate, 2 insulating substrate, 3 power semiconductor device,
5 control board, 9 resin layer, 10 sealing layer, 11 gas layer, 12 liquid insulator, 14 insulating liquid, 15 lid,
16 gas insulator, 19 layer of silicone gel, 23
Case.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 藤井 治久 東京都千代田区丸の内二丁目２番３号 三 菱電機株式会社内 ────────────────────────────────────────────────── ─── Continued on front page (72) Inventor Haruhisa Fujii 2-3-2 Marunouchi, Chiyoda-ku, Tokyo Mitsubishi Electric Corporation
Claims (18)
制御基板を収容してなるパワー半導体装置の製法であっ
て、液状絶縁体を前記ケースに注入して前記パワー半導
体素子および前記制御基板を覆ったのち、前記液状絶縁
体の上に該液体絶縁体よりも比重の小さい樹脂を注入
し、かつ、硬化させて封止層として前記ケースの上部を
封止することを特徴とするパワー半導体装置の製法。1. A method for manufacturing a power semiconductor device in which a power semiconductor element and a control board are housed inside a case, wherein a liquid insulator is injected into the case to cover the power semiconductor element and the control board. A method of manufacturing a power semiconductor device, comprising: injecting a resin having a lower specific gravity than the liquid insulator onto the liquid insulator, and curing the resin to seal an upper portion of the case as a sealing layer. .
ないエポキシ樹脂からなる請求項１記載のパワー半導体
装置の製法。2. The method for manufacturing a power semiconductor device according to claim 1, wherein said sealing layer is made of an epoxy resin containing or not containing a filler.
び絶縁油のうちのいずれかである請求項１記載のパワー
半導体装置の製法。3. The method of manufacturing a power semiconductor device according to claim 1, wherein said liquid insulator is one of fluorocarbon and insulating oil.
した状態で注入する請求項１、２または３記載のパワー
半導体装置の製法。4. The method for manufacturing a power semiconductor device according to claim 1, wherein the liquid insulator is injected while the pressure inside the case is reduced.
け、前記液状絶縁体を循環する請求項１、２または３記
載のパワー半導体装置の製法。5. The method for manufacturing a power semiconductor device according to claim 1, wherein a pipe and a pump are attached to the case and the liquid insulator is circulated.
御基板を収容してなるパワー半導体装置の製法であっ
て、液状絶縁体を前記ケースに注入して前記パワー半導
体素子および前記制御基板を覆ったのち、前記液状絶縁
体の上に該液状絶縁体よりも比重の小さい樹脂を注入
し、かつ、硬化させて仕切り層を形成したのち、前記仕
切り層のうえに封止用の樹脂を注入し、かつ、硬化させ
て封止層として前記ケースの上部を封止することを特徴
とするパワー半導体装置の製法。6. A method for manufacturing a power semiconductor device comprising a power semiconductor element and a control substrate housed in a case, wherein a liquid insulator is injected into the case to cover the power semiconductor element and the control substrate. Injecting a resin having a lower specific gravity than the liquid insulator over the liquid insulator, and after curing to form a partition layer, injecting a sealing resin over the partition layer, and Curing the upper portion of the case as a sealing layer by sealing the power semiconductor device.
請求項６記載のパワー半導体装置の製法。7. The method for manufacturing a power semiconductor device according to claim 6, wherein said partition layer is made of silicone gel.
び絶縁油のうちのいずれかからなる請求項６記載のパワ
ー半導体装置の製法。8. The method for manufacturing a power semiconductor device according to claim 6, wherein said liquid insulator is made of one of fluorocarbon and insulating oil.
した状態で注入する請求項６、７または８記載のパワー
半導体装置の製法。9. The method for manufacturing a power semiconductor device according to claim 6, wherein the liquid insulator is injected while the pressure inside the case is reduced.
び制御基板を収容してなるパワー半導体装置の製法であ
って、前記ケース内において、前記制御基板よりも低い
位置まで樹脂を注入し、かつ、硬化させたのち前記樹脂
の上に液状絶縁体を注入し、さらに、前記液状絶縁体の
上に、前記液状絶縁体よりも比重の小さい封止用の樹脂
を注入し、かつ、硬化させて封止層として前記ケースの
上部を封止することを特徴とするパワー半導体装置の製
法。10. A method of manufacturing a power semiconductor device in which a power semiconductor element and a control board are housed in a case, wherein a resin is injected into the case to a position lower than the control board and cured. After that, a liquid insulator is injected on the resin, and a sealing resin having a specific gravity smaller than that of the liquid insulator is injected on the liquid insulator, and the resin is cured and sealed. A method for manufacturing a power semiconductor device, wherein an upper portion of the case is sealed as a layer.
スを用い、前記取り出し口から前記液状絶縁体を排出し
たのち、前記取り出し口にバルブを取り付け、気体絶縁
体を加圧しつつ注入する請求項１０記載のパワー半導体
装置の製法。11. The method according to claim 10, wherein the liquid insulator is discharged from the outlet using a case in which the outlet is formed in advance, and a valve is attached to the outlet to inject the gas insulator while pressurizing the gas insulator. Power semiconductor device manufacturing method.
窒素および六フッ化硫黄ガスのうちのいずれかを用いる
請求項１１記載のパワー半導体装置の製法。12. The gas insulator includes carbon dioxide,
The method for manufacturing a power semiconductor device according to claim 11, wherein one of nitrogen gas and sulfur hexafluoride gas is used.
排出したのち、熱伝導率の高い絶縁性液体を注入し、つ
ぎに、前記取り出し口を小蓋で密閉する請求項１０記載
のパワー半導体装置の製法。13. The power semiconductor device according to claim 10, wherein after discharging the liquid insulator from the outlet, an insulating liquid having a high thermal conductivity is injected, and then the outlet is sealed with a small lid. Recipe.
ａｌ／ｓｅｃ／ｃｍ／℃・１０3の範囲である請求項１
３記載のパワー半導体装置の製法。14. The heat conductivity is 0.14 to 0.31c.
2. The range of al / sec / cm / ° C. · 10 3.
3. The method for manufacturing a power semiconductor device according to item 3.
圧した状態で注入する請求項１０記載のパワー半導体装
置の製法。15. The method of manufacturing a power semiconductor device according to claim 10, wherein the liquid insulator is injected while the pressure inside the case is reduced.
基板上に接合されるパワー半導体素子および制御基板か
らなるパワー半導体装置であって、前記絶縁基板、前記
パワー半導体素子および前記制御基板が、前記ケースの
内部に収容され、かつ、液状絶縁体で浸漬されるように
したことを特徴とするパワー半導体装置。16. A power semiconductor device comprising a base plate, a case, an insulating substrate, a power semiconductor element and a control substrate bonded on the insulating substrate, wherein the insulating substrate, the power semiconductor element, and the control substrate are: A power semiconductor device, wherein the power semiconductor device is housed in the case and immersed in a liquid insulator.
を封止する封止用の樹脂よりも比重が大きい請求項１６
記載のパワー半導体装置。17. The liquid insulator according to claim 16, wherein a specific gravity of the liquid insulator is larger than that of a sealing resin for sealing an upper portion of the case.
A power semiconductor device as described in the above.
よび絶縁油のうちのいずれかである請求項１６または１
７記載のパワー半導体装置。18. The liquid insulator according to claim 16, wherein the liquid insulator is one of fluorocarbon and insulating oil.
8. The power semiconductor device according to 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8329679A JPH10173098A (en) | 1996-12-10 | 1996-12-10 | Power semiconductor device and its manufacture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8329679A JPH10173098A (en) | 1996-12-10 | 1996-12-10 | Power semiconductor device and its manufacture |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10173098A true JPH10173098A (en) | 1998-06-26 |
Family
ID=18224061
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8329679A Pending JPH10173098A (en) | 1996-12-10 | 1996-12-10 | Power semiconductor device and its manufacture |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10173098A (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000228492A (en) * | 1999-02-05 | 2000-08-15 | Hitachi Ltd | Semiconductor device sealed with resin |
| JP2000234993A (en) * | 1999-02-16 | 2000-08-29 | Mitsubishi Electric Corp | Defect inspection method of power semiconductor device |
| JP2002107249A (en) * | 2000-10-03 | 2002-04-10 | Fuji Electric Co Ltd | Semiconductor pressure sensor |
| JP2005057875A (en) * | 2003-08-04 | 2005-03-03 | Mitsubishi Electric Corp | Inverter device |
| JP2005522022A (en) * | 2002-02-14 | 2005-07-21 | アーベーベー・リサーチ・リミテッド | Power semiconductor module package that can withstand high voltage |
| JP2008016551A (en) * | 2006-07-04 | 2008-01-24 | Mitsubishi Electric Corp | Semiconductor device |
| JP2008098584A (en) * | 2006-10-16 | 2008-04-24 | Fuji Electric Device Technology Co Ltd | Semiconductor device |
| JP2009081328A (en) * | 2007-09-27 | 2009-04-16 | Sanyo Electric Co Ltd | Circuit device and manufacturing method thereof |
| JP2013149819A (en) * | 2012-01-20 | 2013-08-01 | Fuji Electric Co Ltd | High voltage module |
| JP2017028174A (en) * | 2015-07-24 | 2017-02-02 | サンケン電気株式会社 | Semiconductor device |
| WO2018042973A1 (en) * | 2016-09-01 | 2018-03-08 | 三菱電機株式会社 | Power module and method for manufacturing same |
-
1996
- 1996-12-10 JP JP8329679A patent/JPH10173098A/en active Pending
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000228492A (en) * | 1999-02-05 | 2000-08-15 | Hitachi Ltd | Semiconductor device sealed with resin |
| JP2000234993A (en) * | 1999-02-16 | 2000-08-29 | Mitsubishi Electric Corp | Defect inspection method of power semiconductor device |
| JP2002107249A (en) * | 2000-10-03 | 2002-04-10 | Fuji Electric Co Ltd | Semiconductor pressure sensor |
| JP4652692B2 (en) * | 2002-02-14 | 2011-03-16 | アーベーベー・リサーチ・リミテッド | Power semiconductor module that can withstand high voltage |
| JP2005522022A (en) * | 2002-02-14 | 2005-07-21 | アーベーベー・リサーチ・リミテッド | Power semiconductor module package that can withstand high voltage |
| JP2005057875A (en) * | 2003-08-04 | 2005-03-03 | Mitsubishi Electric Corp | Inverter device |
| JP4735446B2 (en) * | 2006-07-04 | 2011-07-27 | 三菱電機株式会社 | Semiconductor device |
| JP2008016551A (en) * | 2006-07-04 | 2008-01-24 | Mitsubishi Electric Corp | Semiconductor device |
| JP2008098584A (en) * | 2006-10-16 | 2008-04-24 | Fuji Electric Device Technology Co Ltd | Semiconductor device |
| JP2009081328A (en) * | 2007-09-27 | 2009-04-16 | Sanyo Electric Co Ltd | Circuit device and manufacturing method thereof |
| JP2013149819A (en) * | 2012-01-20 | 2013-08-01 | Fuji Electric Co Ltd | High voltage module |
| JP2017028174A (en) * | 2015-07-24 | 2017-02-02 | サンケン電気株式会社 | Semiconductor device |
| WO2018042973A1 (en) * | 2016-09-01 | 2018-03-08 | 三菱電機株式会社 | Power module and method for manufacturing same |
| US10937708B2 (en) | 2016-09-01 | 2021-03-02 | Mitsubishi Electric Corporation | Power module and method of manufacturing the same |
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