JPH10161688A - Surround circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a surround circuit in which the number of D/A converting circuits is reduced by use of an A/D converting circuit, a delay circuit and a D/A converting circuit. SOLUTION: An input signal is smoothed after full-wave shaped by a full wave shaping circuit 15, and the output frequency of a VCO 18 is changed by the smoothing result. The input signal of an input terminal IN is digitally converted by the sampling signal of the VCO 18 in an A/D converting circuit 11. The output signal of the A/D converting circuit 11 is delayed by a memory 12, and then converted into an analog signal by the sampling signal in a D/A converting circuit 13. Since the frequency of the sampling signal is changed while the output signal of the A/D converting circuit 11 is stored in the memory 12, the sampling frequencies of the A/D converting circuit 11 and the D/A converting circuit 13 are mutually differed to the same data. Therefore, the frequency of the input signal can be relatively faded to falsely reproduce the surround.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an A / D conversion circuit,
The present invention relates to a surround circuit using a delay circuit and a D / A conversion circuit.

[0002]

2. Description of the Related Art Conventionally, there has been provided an audio reproducing apparatus provided with a mode for reproducing a sound field of a concert hall, a stadium, a church, or the like as a surround so that a listener operates an audio apparatus to obtain a desired surround mode. there were. Basic generation of such a surround is performed by generating a pseudo reflected sound by delaying an audio signal for a predetermined time, and superimposing the audio reproduction sound and the pseudo reflected sound. FIG. 5 is a diagram showing a conventional surround circuit for generating surround.

In FIG. 5, an audio signal is applied to an A / D conversion circuit 1 via an input terminal IN, and is converted into a digital signal by a fixed frequency sampling signal. The digital signal is delayed by the delay circuit 2. The delay circuit 2 delays the digital signal by different delay times. Therefore, the output signal a1 delayed by the first delay time, the output signal a2 delayed by the second delay time longer than the first delay time, and the delay signal by the third delay time longer than the second delay time are output from the delay circuit 2. Output signal a3 and the fourth signal longer than the third delay time.
An output signal a4 delayed by the delay time is generated.

The output signals a1 to a4 of the delay circuit 2 are converted into analog signals at fixed sampling frequencies by first to fourth D / A conversion circuits 4 to 7, respectively. The output signals of the first to fourth D / A conversion circuits 4 to 7 are added to an addition circuit 8
Is added. The output signal of the addition circuit 8 is supplied to the input terminal IN.
Is added to the audio signal from the adder 10 by the adder circuit 10. Therefore, the output signal of the addition circuit 10 is converted into an audio signal,
It becomes a signal on which signals for reproducing various pseudo reflection sounds are superimposed.

[0005]

However, in the circuit shown in FIG. 5, a large number of output signals having different delay times are generated from the delay circuit 2 in order to generate various pseudo reflected sounds. A large number of D /
There is a problem that an A conversion circuit must be used. Therefore, there is a problem that the circuit configuration becomes complicated and the circuit scale becomes large.

[0006]

SUMMARY OF THE INVENTION The present invention provides an A / D conversion circuit for converting an input analog signal into a digital signal, a delay circuit for delaying an output signal of the A / D conversion circuit, and an output of the delay circuit. In a surround circuit including a D / A conversion circuit for converting a digital signal into an output analog signal, a full-wave rectification circuit for full-wave rectifying the input analog signal, and a smoothing circuit for smoothing an output signal of the full-wave rectification circuit ,
A sampling signal generation circuit that generates a sampling signal for sampling of the A / D conversion circuit and the D / A conversion circuit and that changes a frequency of the sampling signal in accordance with an output signal of the smoothing circuit. It is characterized by the following.

The delay circuit includes a memory for storing an output signal of the A / D conversion circuit, and an address signal for generating an address signal for designating a write address and a read address of the memory according to the sampling signal. And a generating circuit. Further, the delay circuit includes a shift register that shifts an output signal of the A / D conversion circuit using the sampling signal as a clock.

Still further, the sampling signal generation circuit is characterized in that the oscillation frequency controlled according to the output signal of the smoothing circuit comprises a VCO. According to the present invention, after the input analog signal is full-wave rectified, it is smoothed, and the frequency of the sampling signal changes according to the signal obtained by the smoothing. On the other hand, while the input signal is digitally converted by the sampling signal having the frequency of the A / D conversion circuit and the output signal of the A / D conversion circuit is delayed by the delay circuit, the frequency of the sampling signal changes, and D
D / A at a frequency different from the sampling frequency of the conversion circuit
The conversion circuit converts the output signal of the delay circuit into a digital signal. Since the frequency of the sampling signal differs between digital conversion and analog conversion for the same data, the output signal of the surround circuit has a different frequency from the input signal of the surround circuit.

[0009]

FIG. 1 is a diagram showing an embodiment of the present invention. Reference numeral 11 denotes an A / D conversion circuit for converting an input audio signal into a digital signal with a sampling signal whose frequency changes over time; Reference numeral 12 denotes a memory for storing an output signal of the A / D conversion circuit 11 and constituting a delay circuit. Reference numeral 13 denotes a sampling signal whose frequency changes with time.
D / A conversion circuit for converting the output signal of
Reference numeral 14 denotes a low-pass filter that passes a low-frequency component of the input audio signal, reference numeral 15 denotes a full-wave rectifier circuit that performs full-wave rectification on the output signal of the LPF 14, reference numeral 16 denotes a smoothing circuit that smoothes the output signal of the full-wave rectifier circuit 15, and reference numeral 17 denotes a smoother. An amplifier circuit amplifies the output signal of the circuit 16, a VCO 18 generates a sampling signal, and an output frequency changes according to an output signal of the amplifier circuit 17, and 19 writes and writes data to and from the memory 12 according to the sampling signal from the VCO 18. This is an address signal generation circuit that generates an address signal for reading. still,
1, the same circuits as those in FIG. 5 are denoted by the same reference numerals.

In FIG. 1, an input analog signal IN is L
The low-frequency component b is applied to the LPF 14
Pass as it is. For example, the output signal b of the LPF 14 having a sinusoidal waveform as shown in FIG. 2A is full-wave rectified by the full-wave rectifier circuit 15, and the output signal c is a negative output signal as shown in FIG. The state is inverted to a positive output signal. The output signal c of the full-wave rectifier 15 is smoothed by the smoothing circuit 16. Since the time constant of the smoothing circuit 16 is set to slowly follow the output signal c of the full-wave rectifier circuit,
The output signal d of the smoothing circuit 16 is a signal that changes slowly as shown in FIG. The output signal d of the smoothing circuit 16 is
After being amplified by the amplifier circuit 17, it is applied to the VCO 18. Since the output frequency of the VCO 18 is determined by the level of the output signal of the amplifier circuit 17 and the output signal of the amplifier circuit 17 changes like the output signal d of the smoothing circuit 16, the frequency of the output signal e of the VCO 18 is shown in FIG. ) Changes over time. The output signal e of the VCO 18 is supplied to the A / D conversion circuit 11 and the address signal generation circuit 19.
And applied to the D / A conversion circuit 13 as a sampling signal. In the address signal generating circuit 19, the sampling signal has a role of a clock for generating an address.

Next, the sampling signal e of the VCO 18
However, for example, according to the output signal of the amplifier circuit 17, FIG.
The circuit operation from the A / D conversion circuit 11 to the D / A conversion circuit 13 will be described assuming that the frequency changes between 7.5 MHz and 8.5 MHz in a triangular waveform with a period of 10 Hz as shown in (d). The input audio signal IN is supplied to the A / D conversion circuit 1
At 1, the digital signal f is converted by the sampling signal e of the VCO 18 whose frequency changes with time. Assuming that the sampling frequency is 7.5 MHz when the input audio signal IN is applied to the A / D conversion circuit 11, the input audio signal IN as shown in FIG. It is converted to a digital signal at intervals determined by the dotted line in (e).

The address signal generating circuit 19 generates write and read address signals g in synchronization with the sampling signal e. After A / D conversion of the input signal IN with the 7.5 MHz sampling signal e, since the frequency of the sampling signal e changes, the A / D conversion circuit 11
The output digital signal f of the memory 1 is generated by a write address signal g synchronized with a frequency of about 7.5 MHz.
2 is written. After being delayed by the memory 12, the same output digital signal h is read from the memory 12 by the read address signal g. By the way, the write address and the read address are separated by a predetermined address from the same address, and the difference between these addresses becomes a delay time. Output digital signal f is stored in memory 1
2, the frequency of the sampling signal e for the same output digital signal f is changed from 7.5 MHz to 8.5.
It changes to MHz. Due to the change of the sampling signal e, the same output digital signal g becomes the read address signal g synchronized with the sampling signal of about 8.5 MHz.
Is read by As described above, since the frequency of the sampling signal e changes with time, the frequency of the write address signal and the read address signal of the memory 12 for the same output digital signal f are different.

The digital signal h from the memory 12 is D
In the / A conversion circuit 13, the sampling signal e is converted into an analog signal i. Since the sampling signal e changes with time, the digital signal h is 8.5.
The analog signal is converted by the sampling signal e of MHz. Therefore, for the same digital signals f and h, the sampling signal h at the time of digital conversion was 7.5 MHz,
The sampling signal h at the time of analog conversion is 8.5 MHz. That is, since the sampling frequency changes over time, the A / D conversion circuit 1
1 and the sampling frequency of the D / A conversion circuit 13 are different.

By converting the output digital signal h into an analog signal, the output analog signal i of the D / A conversion circuit 13 is output.
Is a signal as shown in FIG. According to FIG. 3F, the interval at which the analog signal is converted is narrower than the interval at which the input signal IN is digitally converted at 7.5 MHz. This allows
A certain input signal is A at a sampling frequency of 7.5 MHz.
/ D converted, the corresponding digital signal is 8.5 MH
By performing D / A conversion at the sampling frequency of z, the D / A conversion circuit 1
3, the cycle of the output analog signal i becomes shorter and its frequency becomes higher. Thereafter, the output analog signal i of the D / A conversion circuit 13 is added to the input signal IN by the addition circuit 10.

Next, assuming the same as the above example, for example, when the input signal IN is A / D converted at a sampling frequency of 8.5 MHz, the corresponding digital signal is converted to a D / A conversion circuit 13. , The sampling frequency becomes 7.5 MHz. In this case, the sampling interval at the time of D / A conversion is wider than that at the time of A / D conversion.
Has a longer period and a lower frequency than the input signal. As described above, when the input signal is applied to the A / D conversion circuit 11, the frequency of the output analog signal i becomes higher than that of the same input signal IN depending on whether the sampling frequency changes in the upward direction or the downward direction. Or lower.

In the above example, the frequency difference of the sampling signal between the time of analog conversion and the time of digital conversion corresponding to the same digital signal is 1 MHz. As described above, assuming that the transmission time from the output signal f of the A / D conversion circuit 11 to the D / A conversion circuit 13 takes about a half cycle of the change of the sampling frequency, the sampling frequency at the time of A / D conversion becomes 7 In the case of .6 MHz, the sampling frequency at the time of D / A conversion for the same digital signal is 8.4 MHz.
And the frequency difference between the sampling signals is 0.8 MHz. Therefore, the sampling interval at the time of D / A conversion is
Since the sampling frequency width is wider than when the sampling frequency width is 1 MHz, the cycle of the output analog signal i is longer than when the sampling frequency difference is 1 MHz. Therefore, one cycle of the output analog signal i corresponding to the input signal IN changes variously depending on the sampling frequency when the input signal IN is applied to the A / D conversion circuit 11, and the output analog signal g
Frequency changes.

Accordingly, a certain input signal is supplied to the A / D conversion circuit 1
When applied to 1, the frequency of the output signal i of the D / A conversion circuit 13 corresponding to the same input signal changes depending on the sampling frequency of the A / D conversion and the changing direction of the sampling frequency at that time. For example, on the condition that the sampling signal e changes as shown in FIG. 2D, for example, one of the input signals IN as shown in FIG.
In the case of a signal of KHz, the output analog signal g of the D / A conversion circuit 13 becomes a signal dispersed in various frequency components as shown in FIG. 3B, and the frequency of 1 KHz is dispersed in other frequencies. Therefore, the input signal IN of a certain frequency is A /
When applied to the D / A conversion circuit 11, the output signal i of the D / A conversion circuit 13 is a signal in which this frequency is dispersed into various frequencies. As a result, when the output signal i of the D / A conversion circuit 13 is superimposed on the input signal of the input terminal IN in the addition circuit 10, the output signal of the addition circuit 10 has a frequency component other than the frequency component of the input signal IN. Therefore, the frequency component of the input signal of the input terminal IN can be relatively blurred. By blurring the frequency components of the input signal, it is possible to reproduce a state in which the original audio signal and the reverberation signal are superimposed audibly.

When a music signal is applied to the input terminal IN, the music signal has various frequencies, so that the frequency change of the sampling signal has no regularity. However, even if the frequency change of the sampling signal is not regular, while the output signal of the A / D conversion circuit 11 is delayed by the memory 12, the sampling between the A / D conversion and the D / A conversion for the same digital signal is performed. Different frequencies. Therefore, even when a normal music signal is applied, a state in which the original audio signal and the echo signal are superimposed can be reproduced in a pseudo manner.

FIG. 4 shows another embodiment of the present invention. The difference from FIG. 1 is that an N-stage shift register 20 is used in place of the memory 12 in FIG. FIG.
In FIG. 7, the sampling signal e from the VCO 18 is directly applied to the shift register 20, and the data in the shift register 20 is shifted by the sampling signal e. Output digital signal f of A / D conversion circuit 11
Is taken into the shift register 20 by the sampling signal e, and shifts through the shift register 20. Note that N
The shift time of the stage shift register 20 becomes a delay time. Since the frequency of the sampling signal e changes over time, the shift speed of the shift register 20 changes over time while the output digital signal f is shifted. Therefore, for the same output digital signal, A / D
The output digital signal f of the conversion circuit 11 is
0, when the output digital signal is generated from the shift register 20, and when the sampling signal e
Are different. Therefore, the sampling frequencies of the A / D conversion circuit 11 and the D / A conversion circuit 13 for the same digital signal are different. Therefore, similarly to FIG. 1, a frequency component other than the frequency component of the input signal of the input terminal IN can be generated at the output terminal of the D / A conversion circuit 13. Therefore, by relatively blurring the frequency component of the input signal at the input terminal IN, it is possible to reproduce a state in which the original audio signal and the echo signal are superimposed in a pseudo manner.

[0020]

According to the present invention, since the sampling signal is changed with time, while the output signal of the A / D conversion circuit is being delayed by the delay circuit, the A / D conversion circuit and the D / D conversion circuit are switched.
The frequency of the sampling signal with the / A conversion circuit is different.
As a result, the frequency component of the input signal is relatively blurred, and a state in which the original audio signal and the echo signal are superimposed can be reproduced in a pseudo manner. Therefore, one D / A conversion circuit can be configured, and the circuit configuration can be simplified and the circuit scale can be reduced.

Further, since the frequency of the sampling signal is changed by utilizing the change of the input signal, for example, the VCO
And the like can be used, and the configuration of the sampling signal generation circuit can be simplified.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a waveform chart for explaining the operation of the present invention.

FIG. 3 is a characteristic diagram for explaining states of input / output signals according to the present invention.

FIG. 4 is a block diagram showing another embodiment of the present invention.

FIG. 5 is a block diagram showing a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Addition circuit 11 A / D conversion circuit 12 Memory 13 D / A conversion circuit 14 LPF 15 Full-wave rectification circuit 16 Smoothing circuit 17 Amplification circuit 18 VCO 19 Address signal generation circuit 20 Shift register

Claims (4)

[Claims] 1. An A / D conversion circuit for converting an input analog signal into a digital signal, a delay circuit for delaying an output signal of the A / D conversion circuit, and a conversion of an output digital signal of the delay circuit into an output analog signal A full-wave rectifier circuit for performing full-wave rectification on the input analog signal, a smoothing circuit for smoothing an output signal of the full-wave rectifier circuit, the A / D conversion circuit, A sampling signal generating circuit for generating a sampling signal for sampling of the D / A conversion circuit and changing a frequency of the sampling signal in accordance with an output signal of the smoothing circuit. . 2. The memory according to claim 1, wherein the delay circuit includes a memory for storing an output signal of the A / D conversion circuit, and an address signal for generating an address signal for designating a write address and a read address of the memory in accordance with the sampling signal. The surround circuit according to claim 1, further comprising a generating circuit. 3. The surround circuit according to claim 1, wherein the delay circuit comprises a shift register that shifts an output signal of the A / D conversion circuit using the sampling signal as a clock. 4. The sampling signal generation circuit according to claim 1, wherein said oscillation frequency is controlled in accordance with an output signal of said smoothing circuit.
The surround circuit according to claim 1, comprising O.