JPH10145611A - Thresholding method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thresholding method suitable for preprocessing for recognizing a graphic or the like by taking the histogram of high-order M bits in multilevel pixel data for the unit of a small area, adding adjacent histogram values, comparing the result with a predetermined value and operating a thresholding value. SOLUTION: According to the inputted multilevel pixel data, a decoder 1 (201) outputs an output signal. Conserning counters 202-206, the counter selected according to an EN signal outputted from the decoder 1 (201) is increased according to a clock. Adders 207-210 add the adjacent histogram values and output the results. Compactors 212-215 compare the outputs of the adders 207-210 with the predetermined value. A decoder 2 (216) inputs the outputs of the comparators 212-215 and operates the thresholding value. A comparator 218 compares to thresholding value with the multilevel pixel data and outputs the binary result.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for binarizing a multivalued image. For example, it relates to a binarization method when a multi-valued image is used for OCR processing.

[0002]

2. Description of the Related Art The digitization of office documents has led to the development of character recognition (OCR) techniques. On the other hand, in recent years, colorization of documents has progressed, and scanners capable of reading multi-level densities (luminances) have become mainstream.
At this time, the OCR processing is performed on a binarized image, and a multi-level image (hereinafter, referred to as a multi-valued image) is
Processing to convert to a value is required.

Conventional binarization processing for OCR includes:
Simple binarization has been predominant, with the middle of the multi-level being a threshold value of 1 above and 0 below.

[0004]

However, as described above, in recent years, the colorization of documents in recent years has progressed, and color characters have been frequently generated. In such a document, simple binarization (fixed threshold binarization) does not provide a good image for character recognition.

Accordingly, an object of the present invention is to provide a binarization method suitable for preprocessing for recognition of characters, figures, and the like.

[0006]

In order to solve the above-mentioned problems, the binarization method of the present application takes a histogram of upper M bits of multi-valued pixel data in small area units, adds adjacent histogram values, Comparing the addition result with a predetermined value, calculating a binarization threshold value from the comparison result, and comparing the binarization threshold value with the multi-valued pixel data to output a binarization result; It is characterized by.

In addition, a background level is detected, a binarization threshold is calculated based on the detected background level, and the binarization threshold is compared with the multi-valued pixel data to output a binarization result. When the luminance of the background is low, the output of the binarizing means is inverted.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) FIG. 1 shows an example of a configuration diagram of an embodiment of the present invention. Reference numeral 101 denotes a binarization circuit, which is multi-valued pixel data (for example, 8 bits) input from an input circuit (not shown).
And binarizes the multi-valued pixel to output binary data. Reference numeral 102 denotes a binary memory which stores binary data binarized by the binarization circuit 101. 103 is a CPU
And reads out the binary image data stored in the binary memory 102, performs a character recognition process, and outputs a character recognition result. Reference numeral 104 denotes a RAM, which serves as a work memory for performing character recognition processing and a buffer for temporarily storing character recognition results. A ROM 105 stores a code of a character recognition program.

FIG. 2 shows an example of the configuration of the binarization circuit 101 shown in FIG. In the following description, multi-valued pixel data pixel
[7. . 0] is a luminance value, with pure white being 255 and pure black being 0
Becomes The purpose of binarization is to set the character portion to 1 and the background to 0.

Reference numeral 201 denotes a decoder 1 which outputs an output signal in accordance with the input multi-valued pixel data. The input of the decoder 1 (201) is multi-valued pixel data pixel
[7. . 0] [3. . 5], and the pixel [7. . 5] is 0 and VE is 0,
EN0 ^* is 0, EN1 ^{* to} EN7 ^* is 1, pixel
[7. . 5] is 1 and VE is 0, EN1 ^* is 0, E
N0 ^* , EN2 ^{* to} EN7 ^* are 1, pixel [7. .
5] is 2 and VE is 0, EN2 ^* is 0, EN0 ^* , E
N1 ^* , EN3 ^{* to} EN7 ^* are 1, pixel [7. .
5] is 3 and VE is 0, EN3 ^* is 0, EN0 ^{* to} E
N2 ^* , EN4 ^{* to} EN7 ^* are 1, pixel [7. .
5] is 4 and VE is 0, EN4 ^* is 0, EN0 ^{* to} E
N3 ^* , EN5 ^{* to} EN7 ^* are 1, pixel [7. .
5] is 5 and VE is 0, EN5 ^* is 0, EN0 ^{* to} E
N4 ^*, EN6 ^*, EN7 ^* is 1, pixel [7. .
5] is 6 and VE is 0, EN6 ^* is 0, EN0 ^{* to} E
N5 ^* and EN7 ^* are 1, pixel [7. . 5] When is 7 and VE is 0, EN7 ^* is 0, EN0 ^* ~EN6 ^* 1,
Decode the output as follows.

Reference numerals 202 to 206 denote 12-bit counters, and a selected counter (EN signal is 0) is incremented according to a clock according to an EN signal output from the decoder 1 (201).

Reference numerals 207 to 210 denote adders. The adder 207 adds the outputs of the counter 202 and the counter 203 and outputs an addition result. The adder 208 is a counter 2
03 and the output of the counter 204, and outputs the addition result. The adder 209 includes a counter 204 and a counter 20.
5 are added, and the addition result is output. Adder 21
0 adds the outputs of the counter 205 and the counter 206 and outputs the addition result.

Reference numeral 211 denotes a flip-flop 1, which is a CP.
The value W_DATA of 75% of the image width calculated by U103 is written according to the write enable signal W_EN. Reference numerals 212 to 215 denote comparators. The comparator 212 compares the adder 207 with a value of 75% of the image width (the number of pixels in one line) stored in the flip-flop 1 (211). If the output of is larger, 1
Otherwise, 0 is output. The comparator 213 is an adder 208
Is compared with the value of 75% of the image width stored in the flip-flop 1 (211). If the output of the adder 208 is larger, 1 is output, otherwise 0 is output. Comparator 2
Numeral 14 compares the adder 209 with a value of 75% of the image width stored in the flip-flop 1 (211), and outputs 1 if the output of the adder 209 is larger, and outputs 0 otherwise. The comparator 215 compares the adder 210 with the value of 75% of the image width stored in the flip-flop 1 (211), and outputs 1 if the output of the adder 215 is larger, and outputs 0 otherwise.

Reference numeral 216 denotes a decoder 2 and a comparator 212
, And outputs the binary threshold value of 3 bits. Since there is at most one counter output exceeding the value of 75% of the image width, the values input to the decoder 216 are 0000, 1000, 0100, 0010,
0001. When the input is 1000, the output is 100, when the input is 0100, the output is 101, when the input is 0010, the output is 110, and when the input is 0001, the output is 111. When the input is 0000, a write enable signal for the flip-flop 2 described later is not enabled, so that any value may be output.

Reference numeral 217 denotes a 3-bit flip-flop 2, which is 1 when at least one of the outputs of the comparators 212 to 215 is 1 and the HSYNC signal is 0.
The output of 6) is stored in synchronization with the clock. Reference numeral 218 denotes a comparator, which is an upper 4 bits pixel of multi-valued pixel data.
[7. . 4] and the output of flip-flop 2 (217) are input and compared, and pixel [7. . 4] is 0 when it is large, and 1 when it is small. This output value becomes binary data.

FIG. 2 signals CLK, HSYNC, VE ^* , p
pixel [7. . FIG. 4 shows the timing relationship of [1].

The outline above is to take a histogram of the upper three bits of pixel data for one line, and when the total value of adjacent histograms is 75% or more of the total number of pixels in one line, the luminance indicated by the histogram Is the background of the document, and determines the binarization threshold value BI_THRE.
The 8-bit pixel data is luminance data in which 0 is black and 255 is white. The above numerical values such as 3 bits and 75% are preferable examples, and are not necessarily limited to these numerical values. Also,
Adders (207-210) and comparators (212-21)
5) The flip-flop 1 (211) does not necessarily need to have the maximum bit, and may be configured to add and compare some upper bits. Then, the hardware scale can be reduced. When the percentage is reduced to 75% or less or the number of bits is reduced, two pieces of data input to the decoder 216 may become “1”. In this case, the output value is taken into consideration. thre [6. . 4).

FIG. 3 is a flowchart showing the binarization threshold value determination processing. In S301, the histogram buffer hi
stgnd [8] is reset to 0. In S302, the pixel number counter i is reset to 0. In step S303, the pixel image [i] is shifted right by 5 bits (in this case, only the upper 3 bits remain), and the value “histgnd”
Is incremented. In S304, the pixel number counter is incremented. In S305, it is checked whether or not one line has been completed. If it has been completed, the process proceeds to 306, and if not completed, the process returns to 303. S303 to S
By repeating the process of 305, a histogram of the upper 3 bits for one line of pixel data can be obtained. In S306, k indicating the number of the histogram is reset to 3. Here, the reason why the number 3 is not 0 is that even if a background is detected that is lower than black, there are relatively few characters on the background, and even if it is a character, it is highly possible that the character is a white character. Outside. However, the present invention is not limited to this, and k may be set to 0, and white character processing (eg, inversion in binarization) may be performed. In S307, adjacent histograms are added. (For example, histgnd [3]
+ Histgnd [4]. This is an 8-bit pixel value of 9
6 (binary 01100000) to 159 (binary 1001)
1111) indicates the number of pixels that existed up to this point. ) S30
In step 8, it is checked whether or not the histadd occupies 75% of the total number of pixels.
The process proceeds to step S9, and proceeds to step S311 if the following occurs. In step S309, the number obtained by shifting (k + 1) by 4 bits to the left is substituted for the binarization threshold value BI_THRE, and the process ends. On the other hand, S3
At 11, k is incremented. If k is 7 or less in S312, the process returns to 307. On the other hand, if K is 7 or more, the process ends. BI_TH having such a threshold value determination circuit
By varying the RE on a line-by-line basis, an image with a base such as a character printed on colored paper can be binarized for good character recognition. Then, the next line is binarized using the changed threshold value BI_THRE.

(Second Embodiment) In the first embodiment, the binarization process is performed on the assumption that the character portion has lower luminance than the background portion. However, in the present embodiment, the character portion has higher luminance than the background portion. Think about it. FIG. 5 shows a configuration example of the second embodiment. In general, "letters are read by a reader = conspicuous", so in the case where the luminance of the background is low, the luminance of the characters is conversely high in many cases. Therefore, in this example, when the detected luminance of the base portion is low, the binarization result is inverted to obtain binary data that can be recognized as characters.

Referring to FIG. Similarly to the first embodiment, the following multi-valued pixel data pixel [7. .
0] is a luminance value, which is 255 for pure white and 0 for pure black.
The purpose of binarization is to set the character portion to 1 and the background to 0.

Reference numeral 501 denotes a decoder 1 which outputs an output signal in accordance with the input multi-valued pixel data. The input of the decoder 1 (501) is the upper 3 bits p of the multivalued pixel data.
pixel [7. . 5], and the pixel [7. . 5]
Is 0 and VE is 0, EN0 ^* is 0, EN1 ^{* to} EN7
^* Is 1, pixel [7. . 5] is 1 and VE is 0, EN1 ^* is 0, EN0 ^* , EN2 ^{* to} EN7 ^* are 1, p
pixel [7. . 5] is 2 and VE is 0, EN2 ^*
Is 0, EN0 ^* , EN1 ^* , EN3 ^{* to} EN7 ^* are 1, pi
xel [7. . 5] is 3 and VE is 0, EN3 ^* is 0, EN0 ^{* to} EN2 ^* , EN4 ^{* to} EN7 ^* are 1, pix
el [7. . 5] is 4 and VE is 0, EN4 ^* is 0, EN0 ^{* to} EN3 ^* , EN5 ^{* to} EN7 ^* are 1, pix
el [7. . 5] is 5 and VE is 0, EN5 ^* is 0, EN0 ^{* to} EN4 ^* , EN6 ^* , EN7 ^* are 1, pix
el [7. . 5] is 6 and VE is 0, EN6 ^* is 0, EN0 ^{* to} EN5 ^* , EN7 ^* is 1, pixel
[7. . 5] is 7 and VE is 0, EN7 ^* is 0, E
N0 ^{* to} EN6 ^* decode the output like 1.

Numerals 502 to 509 denote 12-bit counters, and the selected counter (EN signal is 0) is incremented according to the clock in accordance with the EN signal output from the decoder 1 (501).

Reference numerals 510 to 516 denote adders. The adder 510 adds the outputs of the counter 502 and the counter 503 and outputs an addition result. The adder 511 is a counter 5
03 and the output of the counter 504, and outputs the addition result. The adder 512 includes a counter 504 and a counter 50.
5 are added, and the addition result is output. Adder 51
3 adds the outputs of the counter 505 and the counter 506 and outputs the addition result. The adder 514 is a counter 50
6 and the output of the counter 507, and outputs the addition result. The adder 515 includes a counter 507 and a counter 508.
And outputs the addition result. Adder 516
Adds the outputs of counter 508 and counter 509,
Output the addition result. Reference numeral 517 denotes a flip-flop 1, which is a value W_DATA of 75% of the image width calculated by the CPU.
Is written according to the write enable signal W_EN.

Reference numerals 518 to 524 denote comparators. The comparator 518 includes an adder 510 and a flip-flop 1 (517).
Are compared, the value of 75% of the image width is compared. If the output of the adder 510 is larger, 1 is set;
Is output. The comparator 519 compares the adder 511 with a value of 75% of the image width stored in the flip-flop 1 (517), and outputs 1 if the output of the adder 511 is larger and 0 otherwise. Comparator 520 compares the value of 75% of the image width stored in flip-flop 1 (517) with adder 512, and outputs 1 if the output of adder 512 is larger, and outputs 0 otherwise. The comparator 521 includes the adder 513 and the flip-flop 1 (51
By comparing the value of 75% of the image width stored in 7),
If the output of the adder 513 is larger, 1 is output, otherwise 0 is output. The comparator 522 has the image width of 75 stored in the adder 514 and the flip-flop 1 (517).
The values of% are compared, and 1 is output if the output of the adder 514 is larger, and 0 is output otherwise. The comparator 523 compares the value of 75% of the image width stored in the flip-flop 1 (517) with the adder 515, and outputs 1 if the output of the adder 515 is larger and 0 otherwise. Comparator 524 includes adder 516 and flip-flop 1
The value of 75% of the image width stored in (517) is compared, and 1 is output if the output of the adder 516 is larger, and 0 is output otherwise.

Reference numeral 525 denotes a decoder 2, which is a comparator 518.
To 524, and outputs 4 bits of binarization threshold value and 1 bit of selector data. Since there is at most one counter output exceeding the value of 75% of the image width, the value input to the decoder 525 is 000000,
1,000,000, 0100000, 001000000, 0
001000, 0000100, 0000010, 00
00001. 100000 input
When 0, the output is 0110, when the input is 0100000, the output is 1000 and 1, and when the input is 0000000, the output is 1
010 and 1, output is 0100 when input is 0001000
When the input is 0000100, the output is 0101 and 0,
When the input is 0000010, the output is 0110 and 0, and when the input is 0000001, the output is 0111 and 0. When the input is 0000000, a write enable signal for the flip-flop 2 described later is not enabled, and therefore any value may be output.

Reference numeral 526 denotes a 1-bit flip-flop 2, which outputs 1 when at least one of the outputs of the comparators 518 to 524 is 1 and the HSYNC signal is 0.
5) The 1-bit output is stored in synchronization with the clock.
Numeral 527 denotes a 4-bit flip-flop 3, in which any one of the outputs of the comparators 518 to 524 is 1 and H
When the SYNC signal is 0, the 4-bit output of the decoder 2 (525) is stored in synchronization with the clock.

Reference numeral 528 denotes a comparator, which is an upper 4 bits pixel [7. . 4] and the output of the flip-flop 3 (527) are input and compared. . 4] is large, 0 is small, 1 is small, and pixel [7. . 4] is 1 when it is large, and 0 when it is small.

Reference numeral 529 denotes a selector, which uses the 1-bit output signal SEL of the flip-flop 2 (526) as a control signal and outputs the output A of the comparator 528 when SEL is 0,
When L is 1, the output B of the comparator 528 is selected and output. The output of the selector 529 is binary data BI_TH
RE.

FIG. 7 shows an input value to the decoder 2 (525), a binarization threshold value BI_THRE (converted to 8-bit data so as to be easily compared with the luminance value of pixel data), an output value BI_DATA of the selector 529, Control signal SEL
It is a table | surface which shows the relationship of. Binary threshold BI_THRE
And the boundary line between the control signal SEL of the selector (in this case, between 001000000 and 0001000) are an example, and are not limited thereto.

The above outline is that a histogram of the upper three bits of pixel data for one line is taken, and when the total value of adjacent histograms is 75% or more of the total number of pixels, the luminance indicated by the histogram indicates the luminance of the document. As the groundwork,
The binarization threshold value BI_THRE is determined. The 8-bit pixel data is luminance data in which 0 is black and 255 is white.

The above numerical values such as 3 bits and 75% are preferable examples, and are not necessarily limited to these numerical values. Further, an adder (510 to 516) and a comparator (518 to 518)
524), the flip-flop 1 (517) does not necessarily need to have the maximum bit, and may be configured to add and compare some upper bits. Then, the hardware scale can be reduced.

When the percentage is reduced to 75% or less or the number of bits is reduced, two pieces of data input to the decoder 525 may become "1". Output value thre
[7. . 4).

(Third Embodiment) A counter (202 to 2
06 and 502 to 509) into a plurality of three-state flip-flops and one count-up counter, it is possible to reduce the circuit scale of the counter section. However, in this case, since the count result is connected, the adder must be operated in chronological order, and the device must be devised.

(Fourth Embodiment) In the first and second embodiments, a binarization threshold determined from a histogram in a small area (one line) is used to convert multivalued data in the next small area into a binary value. However, the present invention is not limited to this, and a buffer for temporarily storing multi-valued data is provided, a binarization threshold value is determined in a small area, and the binarization threshold value in the same small area is determined by the determined binary threshold value. By binarizing the multi-valued data, it is possible to obtain a good binarization result for character recognition. Further, by having the small areas two-dimensionally, a good binarization result can be obtained for further character recognition. FIG. 6 shows an example of the small area.

As described above, according to the above-described embodiment, a means for obtaining a histogram of the upper M bits of multi-valued pixel data in small area units, a plurality of adding means for adding adjacent histogram values, A plurality of comparing means for comparing the output of the adding means with a predetermined value; calculating means for calculating a binary threshold from the result of the comparing means; the binary threshold and the multi-valued pixel data A binarizing unit that outputs a binarization result by comparing the two, or a detecting unit that detects a ground level, and a calculating unit that calculates a binarization threshold based on the ground level detected by the detecting unit; A binarizing unit that compares the binarized threshold value with the multi-valued pixel data and outputs a binarized result; and an inverting unit that inverts the output of the binarizing unit when the luminance of the background is low. By having A simple algorithm, the binary image suitable for OCR from the multi-level image is obtained.

Further, by providing the reversing means, it is possible to obtain a binary image capable of recognizing a high-luminance character on a low-luminance background, which has not been conventionally recognizable.

[0037]

As described above, according to the present invention, binarization suitable for preprocessing for recognition of characters, figures, and the like can be performed.

[Brief description of the drawings]

FIG. 1 is a hardware block diagram illustrating an example in which the present invention is applied to character recognition.

FIG. 2 is an example of a configuration of a binarization circuit 101 in FIG. 1;

FIG. 3 is a flowchart illustrating an example of a binarization process 101 in FIG. 1;

FIG. 4 is a diagram illustrating the timing of each signal in FIG. 2;

FIG. 5 is an example of a configuration of a binarization circuit according to a second embodiment;

FIG. 6 is an example of a small area.

FIG. 7 is a correspondence table of each signal processed by the circuit of FIG. 5;

Claims (2)

[Claims] 1. A histogram of high-order M bits of multi-valued pixel data is obtained in small area units, adjacent histogram values are added, the addition result is compared with a predetermined value, and a binary value is obtained from the comparison result. A binarization threshold value, and comparing the binarization threshold value with the multi-valued pixel data to output a binarization result. 2. Detecting a background level, calculating a binary threshold based on the detected background level, comparing the binary threshold with the multi-valued pixel data, and outputting a binary result. A binarization method comprising inverting the output of the binarization means when the luminance of the background is low.