JPH10143274A - CPU clock control device - Google Patents

Abstract

(57) [Summary] [PROBLEMS] C capable of reducing power consumption of CPU
An object of the present invention is to provide a PU clock control device. SOLUTION: A scheduler 2 sequentially selects only one of tasks 1 to 3 and outputs the same to a processing circuit 3, and the processing circuit 3 executes the selected task. Further, the selector 9 reads the usage amount of the CPU corresponding to the task selected by the scheduler 2 from the storage devices 6 to 8 and outputs it to the storage circuit 10. The storage circuit 10 temporarily stores the CPU usage amount input from the selector 9, and the comparator 11 refers to the CPU speed vs. clock table 12 and selects the currently selected input from the storage circuit 10. Task C
A clock value corresponding to the PU usage is read and output to the clock selection circuit 13, and the clock selection circuit 13 switches the clock based on the input clock value.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock control device for a CPU, and more particularly, to a clock control device for a CPU which controls an operation clock value of the CPU to reduce power consumption of the CPU.

[0002]

2. Description of the Related Art Recently, various methods have been adopted in electronic devices such as personal computers in order to reduce power consumption. For example, in a low power consumption circuit of a notebook personal computer, when there is no input from a keyboard device for a certain period of time, the power supply of the monitor is shifted to a low power consumption mode, and a secondary storage device such as a floppy is also accessed for a predetermined time. If there is no such processing, processing such as stopping the motor is performed.

In a low-consumption circuit such as a personal digital assistant such as an electronic organizer, when a keyboard or a touch panel is not input for a predetermined period of time, a minimum memory and an interrupt control required for backup are required. And so on, and supply of power to peripheral circuits has been stopped.

In recent years, electronic devices have become increasingly sophisticated, and accordingly, high-performance and high-speed CPUs have been mounted. In a CPU, power consumption increases as the frequency of an operation clock increases.

[0005]

However, as described above, the electronic equipment has a problem that the power consumption by the CPU becomes large because the electronic equipment is equipped with a high-speed CPU.

It is an object of the present invention to provide a CPU clock control device capable of reducing the power consumption of a CPU.

[0007]

According to the first aspect of the present invention,
A scheduler for selecting a task to be processed from a plurality of tasks; a storage unit for storing a CPU usage of each of the plurality of tasks; and a C corresponding to the CPU usage.
A table for storing the clock value of the PU, a selection unit for reading out the usage amount of the CPU corresponding to the task selected by the scheduler from the storage unit, and a selection unit corresponding to the usage amount of the CPU read by the selection unit. The above object is achieved by providing a comparison unit that reads a clock value of a CPU from the table, and a clock selection unit that switches a clock of the CPU based on the clock value of the CPU read by the comparison unit.

According to the first aspect of the present invention, the scheduler selects a task to be processed from a plurality of tasks, the storage means stores the CPU usage of each of the plurality of tasks, and the table includes C according to CPU usage
The clock value of the PU is stored, the selection unit reads the usage of the CPU corresponding to the task selected by the scheduler from the storage unit, and the comparison unit corresponds to the usage of the CPU read by the selection unit. The clock value of the CPU is read from the table, and the clock selecting means switches the clock of the CPU based on the CPU clock value read by the comparing means.

Therefore, the amount required for CPU processing is stored for each task, and the clock required for the task can be selected at the same time as the task scheduler switches the task. Power consumption in the CPU can be reduced.

[0010] In this case, as in the invention of claim 2,
It is effective that the usage amount of the CPU stored in the storage means can be rewritten.

That is, according to the invention described in claim 2, in the invention described in claim 1, the C stored in the storage means.
The usage of PU can be rewritten.

Therefore, in addition to the effect of the first aspect of the present invention, it is possible to finely and dynamically control the CPU capability.

According to a third aspect of the present invention, there is provided a scheduler for selecting a task to be processed from a plurality of tasks, storage means for storing a usage of each CPU of the plurality of tasks, and A table for storing the clock value of the CPU, and among the tasks selected by the scheduler, a running task and a CPU usage corresponding to the suspended task are read out from the storage means, respectively. Adding means for calculating the total usage of the CPU by adding the usage of the CPU, and a CP corresponding to the total usage of the CPU calculated by the adding means.
The above object is achieved by providing a comparison unit that reads the clock value of U from the table, and a clock selection unit that switches the clock value based on the CPU clock value read by the comparison unit.

That is, according to the third aspect of the present invention, the scheduler selects a task to be processed from a plurality of tasks, the task processing means executes the task selected by the scheduler, and the storage means includes a plurality of tasks. CPU for each task
The table stores the CPU clock value in correspondence with the CPU usage, and the adding means determines whether the task selected by the scheduler is an active task or a suspended task. The usage amount of the corresponding CPU is read from the storage means, and the read CPU is read.
The comparison means reads the CPU clock value corresponding to the total CPU usage calculated from the addition means from the table by calculating the total usage of the CPU by adding
Then, the clock selecting means switches the clock value based on the CPU clock value read by the comparing means.

[0015] Therefore, since the clock can be selected according to the amount of tasks required by the CPU at present, the CPU operates appropriately with optimal CPU capacity, and the wasteful CP is used.
It does not operate with the U capability, and effective power consumption management can be performed.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to FIGS. (First Embodiment) FIG. 1 is a diagram showing a computer system which is a first embodiment of a clock control device for a CPU according to the present invention.

First, the configuration will be described. FIG. 1 is a block diagram showing modules of the computer system 1 according to the present embodiment. In FIG. 1, a computer system 1
Are tasks 1 to 3, scheduler 2, processing circuit 3, power supply control circuit 4, peripheral circuit 5, storage devices 6 to 8, selector 9, storage circuit 10, comparator 11, CPU speed versus clock table 12, and clock selection. It is composed of a circuit 13 and the like.

Here, scheduler 2, tasks 1 to 3,
The processing circuit 3 is a device that performs general multitask scheduling. Multi-tasking has been adopted in the past because, for example, when designing software such as a personal computer, designing by task (function) makes it easier to write a highly reliable program in program design. Technology.

Computer system 1 of the present embodiment
Is to perform dynamic and dynamic CPU clock selection control.

Tasks 1 to 3 are, for example, programs for key processing, (character) recognition processing, and user interface processing, respectively.

The scheduler 2 performs scheduling so as to efficiently process a plurality of tasks. For example, when a key processing task enters a waiting state due to a key wait or the like, the next task is processed. Process such as transferring the authority of That is, scheduler 2
Performs a schedule so that only one of the tasks is sequentially selected and processed by the processing circuit 3.

The processing circuit 3 executes a task selected by the scheduler 2. The power supply control circuit 4 controls a drive voltage to be output to each part of the peripheral circuit 5 according to a task selected by the scheduler 2.

The storage devices 6 to 8 respectively store the CPU usage (required processing capacity) required for the above tasks 1 to 3. Here, the CPU usage is
It shows the amount of calculation required for a certain time such as KIPS (1000 Instructions per second). For example, the key processing of task 1 is processing such as simple key capture, so that the CPU usage is small and about 20 KIPS. Also, the recognition process of task 2 is 1000 KIPS
About.

The selector 9 stores the CPU usage corresponding to the task selected by the scheduler 2 in the storage device 6.
8 and output to the storage circuit 10. The storage circuit 10 is a register that temporarily stores the CPU usage corresponding to the currently selected task input from the selector 9, and outputs the CPU usage to the comparator.

The CPU speed versus clock table 12 stores the CPU usage and the clock value required to execute the CPU usage in association with each other.

The comparator 11 has a CPU speed vs. clock table 1
2 is connected, the CPU usage of the currently selected task input from the storage circuit 10 is sequentially compared with the value of the CPU speed vs. clock table 12 to determine the CPU of the currently selected task. Is selected and output to the clock selection circuit 13.

The clock selection circuit 13 switches the clock based on the clock value input from the comparator 11.

Next, the computer system 1 having the above configuration will be described.
Will be described.

The scheduler 2 sequentially selects only one of the tasks 1 to 3, and the processing circuit 3
Executes the task selected by. At this time, the selector 9 reads the usage of the CPU corresponding to the task selected by the scheduler 2 from the storage devices 6 to 8 and outputs it to the storage circuit 10. The storage circuit 10 temporarily stores the CPU usage corresponding to the currently selected task input from the selector 9, and the comparator 11 stores the clock value corresponding to the currently selected CPU usage. Is selected from the CPU speed versus clock table 12 and output to the clock selection circuit 13. Then, the clock selection circuit 13
In the example, the clock is switched based on the clock value input from the comparator 11.

As described above, in the present embodiment, the CPU usage required for the CPU processing is stored in the storage devices 6 to 8 for each task, and the CPU usage and the CPU usage are stored. The clock value corresponding to the amount is stored in the CPU speed vs. clock table 12, and the scheduler 2 switches the task and at the same time selects the clock value required for the task. And power consumption in the CPU can be reduced.

Depending on the task, high-speed CPU processing may be required only at a certain moment, for example, for high-speed switching of display or the like. This does not always require high-speed CPU processing. You only need to switch the clock when. In order to realize this function, if the configuration is such that the usage amount of the CPU stored in the storage devices 6 to 8 can be appropriately rewritten by the processing circuit 3, the CPU capability can be more finely and dynamically controlled. Becomes

(Second Embodiment) Hereinafter, a second embodiment will be described with reference to FIGS. The first embodiment has a configuration in which a clock corresponding to the amount of CPU usage required for a task selected by the scheduler and processed by the processing circuit is selected. However, the second embodiment has an operation In this configuration, the CPU usage of the middle task and the CPU usage of the suspended task are added to select a clock according to the total CPU usage required by the current CPU.

In addition, when the actual task processing is performed in parallel, while processing of one task is being performed, it is not always necessary to wait for another processing (processing need not be performed). Absent. For example, even when the key processing is being performed, the input on the touch panel is appropriately performed, and the recognition task is in a state where the processing is interrupted. In such a case, selecting only the CPU speed of the key processing just because the key processing is currently performed causes a problem that the processing speed of the recognition processing becomes slow. In the present embodiment, the above configuration is adopted to solve such a problem.

FIG. 2 is a block diagram showing modules of the computer system according to the second embodiment. In the figure, parts having the same functions as those of the computer system of FIG. 1 are denoted by the same reference numerals, and the description of such parts will be partially omitted, and the description will focus on characteristic parts.

That is, the computer system 3 shown in FIG.
0 is a part that performs multitask processing (scheduler 2,
The processing circuit 3, tasks 1 to 3,), power supply control circuit 4, peripheral circuit 5, storage devices 6 to 8, comparator 11, CPU speed versus clock table 12, and clock selection circuit 13 are the same as those in FIG. The difference is that the deriving circuits 14 to 16 are connected to the storage devices 6 to 8, respectively, and the adder 17 is connected to these deriving circuits 14 to 16.

The scheduler 2 stores the amount of CPU usage corresponding to the task requiring the current operation in the storage devices 6 to
8 by the deriving circuits 14 to 16. The derivation circuits 14 to 16 are devices for selecting whether or not to add the value of the CPU usage to the adder 17 under the control of the scheduler 2. Note that the scheduler 2 performs control so as to derive the CPU usage only for tasks that require an operation at present.

The adder 17 adds the CPU usage amounts input from the derivation circuits 14 to 16 and outputs the result to the comparator 11. The comparator 11 reads the clock value corresponding to the added CPU usage from the CPU speed vs. clock table 12, and selects a clock value suitable for the currently required total CPU usage.

Next, the operation of the computer system 30 configured as described above will be described with reference to FIGS. FIG. 3 is a diagram showing possible states and transitions of a task.

In FIG. 3, "operating" means that the task is currently being used. If the running task has an event such as an interrupt such as a key, the scheduler shifts the task to the waiting mode. When a waiting event occurs, the waiting task is transited to the active state if there is no task currently being executed, or to the suspended state if there is a task being activated. Further, the execution task is transited to “suspended” after a predetermined time.

As for the method of transition, there is a method in which the scheduler 2 counts with a timer or the like for a predetermined time and forcibly transitions, and a method in which the task itself transitions the standby mode every certain degree of processing. Is the latter because there is no problem in either case.

When a transition is made while a certain task is suspended, another suspended task is transitioned to the operation mode. FIG. 4 illustrates a mechanism for task scheduling. The state where tasks can be taken is shown on the left side of the figure. The tasks in each state are written to the right of those states. The scheduler 2 implements the above-described operation using a method such as a chain. In this way, the scheduler 2 can manage the task that is currently operating and the task that is being suspended.

That is, the scheduler 2 determines which of the tasks is in operation and the CPU corresponding to the suspended task.
Are derived from the storage devices 6 to 8 by the deriving circuits 14 to 16, the CPU usage derived by the adder 17 is added, the total CPU usage is calculated, and the comparator 1
According to 1, the clock value corresponding to the calculated total CPU usage is selected from the CPU speed versus clock table 12, and the clock is switched based on the clock value selected by the clock selection circuit 13. Therefore, C
The clock is selected according to the amount of tasks required by the PU, so that the PU operates with the optimal CPU capacity as appropriate, does not operate with useless CPU capacity, and performs effective power consumption management. Becomes possible.

[0043]

According to the first aspect of the present invention, the required amount of CPU processing is stored for each task, and the clock required for the task can be selected at the same time as the task scheduler switches the task. Therefore, always lean C
It is possible to operate with PU capability, and it is possible to reduce power consumption in the CPU.

According to the second aspect of the present invention, in addition to the effect of the first aspect of the invention, it is possible to finely and dynamically control the CPU capability.

According to the third aspect of the present invention, the clock can be selected according to the amount of tasks currently required by the CPU. It is not necessary to operate with useless CPU capacity, and effective power consumption management can be performed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a block configuration of a scheduling device 1 according to a first embodiment to which a clock control device for a CPU according to the present invention is applied.

FIG. 2 is a diagram illustrating a block configuration of a scheduling device 1 according to a second embodiment to which a clock control device for a CPU according to the present invention is applied;

FIG. 3 is a diagram showing possible states and transitions of a task.

FIG. 4 is a diagram showing a mechanism for performing a task schedule.

[Explanation of symbols]

 1, 30 time scheduler device 2 scheduler 3 processing circuit 4 power supply control circuit unit 5 peripheral circuit 6 storage device 7 storage device 8 storage device 9 selector 10 storage circuit 11 comparator 12 CPU speed versus clock table 13 clock selection circuit 14 derivation circuit 15 Derivation circuit 16 Derivation circuit 17 Adder

Claims (3)

[Claims] 1. A scheduler for selecting a task to be processed from a plurality of tasks, a storage unit for storing a usage amount of a CPU of each of the plurality of tasks, and a clock value of a CPU corresponding to the usage amount of the CPU And a CPU corresponding to the task selected by the scheduler
Selecting means for reading the usage of the CPU from the storage means, comparing means for reading from the table the CPU clock value corresponding to the usage of the CPU read by the selecting means, and reading by the comparing means A clock control device for a CPU, comprising: clock selection means for switching a clock of the CPU based on a clock value of the CPU. 2. The CPU clock control device according to claim 1, wherein the CPU usage stored in said storage means is rewritable. 3. A scheduler for selecting a task to be processed from a plurality of tasks, storage means for storing a CPU usage of each of the plurality of tasks, and a CPU clock value corresponding to the CPU usage A table that stores the CPU usage corresponding to the running task and the suspended task among the tasks selected by the scheduler from the storage unit, and reads the usage of the read CPU. Adding means for calculating the total usage amount of the CPU by adding them; comparison means for reading from the table the CPU clock value corresponding to the total usage amount of the CPU calculated by the addition means; reading by the comparison means And clock selection means for switching the clock value based on the selected clock value of the CPU. Click control device.