JPH10125939A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device, which functions as a low-power consumption non-linear element and a nonvolatile memory, and a method of manufacturing the device. SOLUTION: A semiconductor layer consisting of a silicon layer is brought into contact with water containing iron ions and ozone to form an iron- containing first silicon oxide film 105 and thereafter, the film 105 is brought into contact with water containing ozone only to form a second silicon oxide film 106. Aftet that, the formation of a third silicon oxide film 107, the formation of an interlayer insulating film 109 and the formation of first and second Al wirings 111 and 112 are performed. When a proper voltage is applied to both ends of the wirings 111 and 112, a current is highly made to flow through the film 105 at only the time of a specified voltage by a resonance tunneling via an empty electron orbit of the iron in the film 105 and a nonlinear element having a negative resistance can be formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a method of manufacturing a non-linear element with low power consumption, a nonvolatile memory and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, dynamic RAMs (DRAMs) and static RAMs (SRAMs) have been used as memory devices in the semiconductor field. Memory cells in these memory devices are mainly composed of a combination of a MOS element, a capacitance element and a resistance element. For example, DR
The AM is composed of one n-channel MOS element and one capacitance element, and the SRAM is composed of two p-channel MOS elements (or two resistance elements) and four n-channel MOS elements.
And an OS element. The MOS element has a feature that the operation speed, the power consumption, and the degree of integration are improved by miniaturizing the gate length and the like, and has played a very important role in industry.

However, due to the limitations of microfabrication when forming a gate and the like and the statistical fluctuation of the concentration of impurities introduced into the source / drain region and channel region of a MOS device, the gate length is industrially zero. .1μm or less MOS
It is considered that practical application of the device is very difficult. On the other hand, there is a demand from the system equipment side for further higher integration and lower power consumption. In recent years, various devices have been proposed which can be made finer than MOS devices and have completely different operating principles from MOS devices. One of them is a resonance tunnel element. The resonance tunnel element has a “double barrier structure” in which both sides of an extremely thin semiconductor thin film are sandwiched between energy barrier films and electrodes are formed outside the energy barrier film. The electrical characteristics of the resonance tunnel element are controlled by the resonance tunnel effect between the extremely thin semiconductor thin film and the outer electrode.

[0004]

By the way, the resonance tunnel effect greatly depends on the physical properties of an ultra-thin semiconductor thin film used as a quantum well, particularly on the well width. Therefore, in order to reproduce uniform electrical characteristics with high certainty, control of the well width at the atomic level is indispensable, which is extremely costly industrially.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to eliminate the need to control the film thickness at the atomic level in a resonant tunneling device, and to function according to an operating principle different from that of a conventional MOS device. It is an object of the present invention to provide a semiconductor device functioning as a non-linear element or a nonvolatile memory and a method for manufacturing the same.

[0006]

In order to achieve the above object, according to the present invention, there are provided means relating to the first method of manufacturing a semiconductor device according to claims 1 to 4, and means according to claims 5 to 6. Means relating to the second semiconductor device manufacturing method, and the first and second methods described in claims 7 to 10.
12. Means common to the method of manufacturing a semiconductor device according to claim 11, and
Means relating to the first semiconductor device described in (1), means relating to the second semiconductor device described in (12) to (14), and first and second semiconductor devices described in (15) and (16). Measures common to the devices are taken.

According to a first method of manufacturing a semiconductor device of the present invention,
A first method for forming an oxide film containing a metal on the semiconductor layer by contacting the semiconductor layer of the substrate having the semiconductor layer with a liquid containing a metal ion and an oxidizing agent as described in claim 1. And a second step of forming an electrode made of a conductive film on the oxide film.

As a result, the semiconductor layer is oxidized and an oxide is also generated by the reaction between the metal ion and the oxidizing agent. That is, a semiconductor element in which an oxide film containing a metal is sandwiched between a semiconductor layer and an electrode is obtained. In this semiconductor device, when a voltage is applied between the semiconductor layer and the electrode, a resonance state occurs when the energy level for filling the empty electron orbit of the metal in the oxide film with electrons coincides with the energy level of the semiconductor layer. Thus, electrons move between the semiconductor layer and the electrode by a tunnel effect. Therefore, when the voltage applied between the semiconductor layer and the electrode is changed, there is a negative resistance portion where the current decreases when the voltage value at which resonance occurs is exceeded. That is, a non-linear element having negative resistance is formed. In that case, the voltage for achieving the resonance state is determined by the energy level for filling the empty orbit of the metal with the electrons and the energy level of the semiconductor layer. Therefore, a non-linear element having a certain characteristic can be formed without controlling the thickness of each layer at the atomic level.

According to a second aspect, in the first aspect, a step of depositing a thin insulating film on the oxide film after the first step and before the second step is further included. In the second step, an electrode can be formed on the insulating film.

[0010] In the semiconductor device thus formed, since the insulating film is interposed between the oxide film and the electrode,
When the voltage applied between the semiconductor layer and the electrode is changed, even if the empty electron trajectory of the metal is filled with electrons, the voltage value is increased to further move the electrons from there to the electrode by the tunnel effect. Need arises. That is, it is possible to freely adjust a voltage value until a current flows when the voltage applied between the semiconductor layer and the electrode is changed by the film pressure of the insulating film.

According to a third aspect, in the first or second aspect, immediately after the first step, the oxide film is brought into contact with a liquid containing only an oxidizing agent to oxidize the semiconductor layer. And forming a second oxide film between the semiconductor layer and the oxide film.

This makes it possible to finely adjust the current-voltage characteristics of the semiconductor device to be formed.

According to a fourth aspect, in the first, second or third aspect, after the first step and before or after the second step, the semiconductor substrate is placed in a reducing atmosphere. The method may further include a step of performing a heat treatment.

This makes it possible to adjust the structure and distribution state of the metal in the oxide film to a more appropriate state.

In a second semiconductor device according to the present invention, the semiconductor layer of the substrate having the semiconductor layer of the first conductivity type is brought into contact with a liquid containing metal ions and an oxidizing agent. A first step of forming an oxide film containing a metal on the semiconductor layer, a second step of forming an insulating film on the oxide film, and an electrode made of a conductive film on the insulating film. Forming a third conductivity type, introducing a second conductivity type impurity into the semiconductor layer using the electrode as a mask, and forming a second conductivity type diffusion layer in regions on both sides of the electrode in the semiconductor layer. And a fourth step of forming.

In the semiconductor device formed by this, it is possible to fill the electrons in the empty electron orbit of the metal in the oxide film. Further, the element formed by the semiconductor layer, the oxide film, the insulating film, and the electrode in this semiconductor device functions as a non-linear element similarly to the semiconductor device formed by the method of the second aspect, so that it is in a resonance state. When a voltage is applied in the direction, a wide voltage range until a current flows can be secured. Further, an MIS transistor is formed by an oxide film, an insulating film, an electrode, and two diffusion layers.
The threshold voltage of the MIS transistor differs depending on whether the metal has an empty electron orbit in the oxide film filled with electrons or not. Therefore, when a voltage in a range where no current flows between the semiconductor layer and the electrode is applied to the electrode, the empty electron orbit of the metal in the oxide film may be filled with electrons or may not be filled. The information can be read by detecting the difference from the threshold value. That is, a semiconductor device that functions as a nonvolatile memory that can be electrically written, read, and erased is formed. Since this semiconductor device is constituted by a single element, high integration is also possible.

According to a sixth aspect, in the fifth aspect, immediately after the first step, the semiconductor layer is oxidized by contacting the oxide film with a liquid containing only an oxidizing agent, The method may further include forming a second oxide film between the semiconductor layer and the oxide film.

According to a seventh aspect, in the fifth or sixth aspect, the semiconductor substrate is reduced after the first step and the second step and before or after the third step. The method may further include a step of performing a heat treatment in an atmosphere.

According to claims 6 and 7, the above-mentioned claims 3 and 4 are provided.
The same operation and effect as described above can be obtained.

[0020] As described in claim 8, in claim 1, 2, 3, 4, 5, 6, or 7, the metal ion is preferably a transition metal ion.

Thus, a semiconductor device that functions as a non-linear element or a non-volatile memory at a low voltage is formed by utilizing the small energy difference between the empty electron orbit of the transition metal and the time when electrons enter the electron orbit. be able to.

[0022] As described in claim 9, in claim 8, the transition metal ion is preferably an iron ion.

Thus, a semiconductor device which functions as a non-linear element or a non-volatile memory at a lower voltage at a lower voltage can be formed.

[0024] As described in claim 10, in claim 1, 2, 3, 4, 5, 6, 7, 8, or 9, the oxidizing agent is preferably ozone.

This makes it possible to reliably obtain the functions and effects of the above-mentioned claims by utilizing the high oxidizing ability of ozone, and because ozone does not contain any element other than oxygen, other elements are contained in the semiconductor device. Can be avoided.

According to a first aspect of the present invention, there is provided a semiconductor device comprising:
As described in the above, a substrate having a semiconductor layer at least on a surface portion, a first insulating film formed above the semiconductor layer and containing a metal impurity, and the first insulating film and the semiconductor layer A second insulating film interposed therebetween and having a potential energy serving as a barrier against the movement of electrons and having a thickness capable of tunneling electrons, and a second insulating film formed on the first insulating film to prevent the movement of electrons. A third insulating film having a potential energy serving as a barrier and a thickness through which electrons can tunnel, and having a thickness different from that of the first insulating film; and a third insulating film formed on the third insulating film. An electrode made of a conductive film.

Thus, the semiconductor device exhibits a current-voltage characteristic that is asymmetric with respect to the polarity of the voltage applied between the semiconductor layer and the electrode. That is, the semiconductor device is widely used as a nonlinear element.

According to a second aspect of the present invention, there is provided a semiconductor device comprising:
As described in the above, a substrate having a semiconductor layer at least on a surface portion, a first insulating film formed above the semiconductor layer and containing a metal impurity, and the first insulating film and the semiconductor layer A second insulating film interposed therebetween and having a potential energy serving as a barrier against the movement of electrons and having a thickness capable of tunneling electrons, and a second insulating film formed on the first insulating film to prevent the movement of electrons. A third insulating film having potential energy serving as a barrier and capable of tunneling electrons, an electrode made of a conductive film formed on the third insulating film, and the third insulating film in the semiconductor layer. A first conductivity type channel region formed below the electrode; and a source / drain region containing a second conductivity type impurity formed on both sides of the electrode in the semiconductor layer.

Thus, the semiconductor device functions as a non-volatile memory that can be electrically written, read, and erased in the same manner as the semiconductor device according to the fifth aspect.

According to a thirteenth aspect, in the twelfth aspect, it is preferable that the thickness of the third insulating film is larger than that of the first insulating film.

As a result, the semiconductor device becomes a nonvolatile memory which is easy to write and has a large read voltage margin.

According to a fourteenth aspect, in the twelfth or thirteenth aspect, at least one of the first, second, and third insulating films can be formed of a multilayer film.

This makes it possible to finely adjust the current-voltage characteristics of the semiconductor device.

As described in claim 15, in claim 10, 11, 12, 13, or 14, claim 8
For the reasons described in the above, the metal impurity is preferably a transition metal.

According to a sixteenth aspect, in the fifteenth aspect, the transition metal is preferably iron for the reason described in the ninth aspect.

[0036]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) First, a first embodiment will be described. 1 to 5 are cross-sectional views illustrating the steps of manufacturing the semiconductor device according to the first embodiment.

First, in the step shown in FIG. 1, SO 2 is implanted into the Si substrate by a method such as implantation of oxygen ions.
An I substrate 160 is formed. This SOI substrate 160 is made of S
It comprises an i-substrate 101, a buried oxide film 102 formed on the Si substrate 101, and a p-type Si layer 150 formed on the buried oxide film 102. The p-type Si layer 150 has a thickness of about 100 to 200 nm.
Thereafter, the element isolation oxide film 15 for partitioning the p-type Si layer 150 into a plurality of isolated regions using a selective oxidation method or the like.
Form one. The thickness of the element isolation oxide film 151 is p-type Si.
Since it is sufficient that each region of the layer 150 is electrically insulated, the thickness may be about 1.5 to 2 times that of the p-type Si layer 150.

Next, in the step shown in FIG. 2, the first n-type diffusion layer 103 and the second n-type diffusion layer are formed in the p-type Si layer 150 surrounded by the element isolation oxide film 151 by using photolithography, ion implantation and heat treatment. A layer 104 is formed. The impurity concentration of the first n-type diffusion layer 103 is about 10 ¹⁶
-10 ¹⁸ / cm ³ , and the impurity concentration of the second n-type diffusion layer 104 is about 10 ²⁰ / cm ³ .

Next, in the step shown in FIG. 3, the surfaces of the first n-type diffusion layer 103 and the second n-type diffusion layer 104 are exposed to water containing iron ions as metal ions and ozone as an oxidizing agent for about 5 hours. Make contact. Iron ion is about 0.1-10pp
m. By this treatment, silicon is oxidized, and iron oxides such as Fe2 O3 and Fe3 O4 generated by a reaction between iron ions and ozone as an oxidizing agent are mixed into the silicon oxide film. Therefore, the first silicon oxide film 1 containing iron oxide, that is, containing Fe atoms, is formed on the first n-type diffusion layer 103 and the second n-type diffusion layer 104.
05 is formed with a thickness of about 1.5 nm.

Subsequently, the first n-type diffusion layer 103 and the second
First silicon oxide film 1 formed on mold diffusion layer 104
05 is contacted with water containing only ozone for about 5 hours. This process oxidizes not the first silicon oxide film 105 but the underlying silicon layer. That is, the interface between the first silicon oxide film 105 and the first n-type diffusion layer 103 and the first
Oxidation proceeds at the interface between the silicon oxide film 105 and the second n-type diffusion layer 104. As a result, the first silicon oxide film 10
5 and the first n-type diffusion layer 103 and between the first silicon oxide film 105 and the second n-type diffusion layer 104, a second silicon oxide film 106 having a thickness of about 1.5 nm is formed.
The second silicon oxide film 106 is not doped with iron.

Further, the third silicon oxide film 105 having a thickness of about 1.5 nm is formed on the first silicon oxide film 105 by using ultra-high vacuum CVD or the like.
A silicon oxide film 107 is formed. The third silicon oxide film 107 is not doped with iron.

Through the above steps, the first silicon oxide film 105 doped with iron is sandwiched between the second silicon oxide film 106 and the third silicon oxide film 107 not doped with iron. Thereafter, the Si substrate 101 is heat-treated at 600 ° C. for 1 hour in an H 2 gas atmosphere.

Next, in the step shown in FIG. 4, after depositing a polysilicon film over the entire surface of the substrate, the polysilicon film and the first to third silicon oxide films 105 to 105 are formed by photolithography and dry etching. 107 is patterned. That is, the second n-type diffusion layer 10 of the polysilicon film and the first to third silicon oxide films 105 to 107 is formed.
4 is removed, and the first to third silicon oxide films 105 to 107 and the third
The polysilicon electrode 108 on the silicon oxide film 107 is left. Further, an interlayer insulating film 109 is deposited on the entire surface of the substrate.

Next, in the step shown in FIG. 5, the interlayer insulating film 1 is formed by using photolithography and dry etching.
A part of the opening 09 is formed, and a contact hole reaching the polysilicon electrode 108 on the element isolation oxide film 151 and the second n-type diffusion layer 104 is formed. Further, each contact hole is filled with tungsten (W) to
After forming the plugs 110a and 110b, an aluminum (Al) alloy film is deposited on the entire surface of the substrate, and the film is patterned to form the W plugs 110a and 110b.
Al wiring 111 and second Al connected to
The wiring 112 is formed.

Through the above manufacturing steps, a resonance tunnel diode in which the first silicon oxide film 105 containing iron ions is sandwiched between the second and third silicon oxide films 106 and 107 not containing iron ions. The operation of the resonant tunnel diode will be described below.

As shown in FIG. 6, when the second Al wiring 112 is grounded and a potential is applied between the first Al wiring 111 and the second Al wiring 112 so that the first Al wiring 111 is positive, the potential change occurs. Accordingly, the current flowing between the first Al wiring 111 and the second Al wiring 112 also changes. FIG. 7 is a diagram showing current-voltage characteristics obtained at this time. FIGS. 8A to 8C are diagrams illustrating a change in the energy band between the first n-type diffusion layer and the polysilicon electrode 108 according to a change in the voltage applied to the first Al wiring 111. Hereinafter, the change characteristics of the current-voltage characteristic line Jv1 will be described with reference to FIGS. 7 and 8A to 8C.

First Al wiring 111 and second Al wiring 112
8A, the energy level is in an equilibrium state, and the empty level of Fe atoms in the first silicon oxide film 105 containing iron is zero, as shown in FIG. (As will be described later, the energy level for filling the empty electron orbital with electrons) is higher than the Fermi level of the first n-type diffusion layer (semiconductor) and the polysilicon electrode 108 (conductor), and the difference is higher than that. (However, the energy level of a transition metal such as iron will be described later).
In the type diffusion layer, the density of electrons having an energy level corresponding to the empty level of Fe atoms is almost zero. Therefore, electrons hardly pass through the second silicon oxide film 106 by tunneling and move from the first n-type diffusion layer to Fe atoms having an empty level.
As shown by the point Jv1a in the current characteristic line Jv1, the current hardly flows.

On the other hand, as the voltage applied between the first Al wiring 111 and the second Al wiring 112 is increased in the positive direction, as shown in FIG.
03 and the Fermi level of the first n-type diffusion layer 103 are close to each other, so that electrons tunnel through the second silicon oxide film 106 and the voltage increases. The current increases as the number of moving electrons increases. When the voltage reaches a certain voltage value Vb, a resonance state occurs in which the Fermi level of the first n-type diffusion layer 103 matches the empty level of Fe atoms in the first silicon oxide film 105,
As shown by a point Jv1b in the current-voltage characteristic line Jv1 of FIG. 7, a maximum current flows.

Further, as the voltage applied between the first Al wiring 111 and the second Al wiring 112 is increased in the positive direction, as shown in FIG.
3 and the Fe in the first silicon oxide film 105
The current decreases because the empty level of the atom moves away again. As a result, a negative resistance is observed in this element. Then, the current becomes minimum at a point Jv1c in the current-voltage characteristic line Jv1 of FIG.

As the voltage is further increased, the Fermi level of the first n-type diffusion layer 103 and each of the silicon oxide films
07, the difference between the barriers of the insulating film becomes smaller. That is, the current increases again because the height of the barrier formed by the insulating film is effectively reduced.

As described above, the nonlinear element of this embodiment functions as a nonlinear element having a negative resistance portion in the current-voltage characteristics. In the structure of the present embodiment, for example, there is a maximum point at 30 mA / cm ² at an applied voltage of 1 V. This element utilizes the tunnel effect and has a small operating voltage and operating current, and thus functions as a low power consumption element. Further, since the size of the device is small, high integration can be achieved.

In particular, by using a transition metal as an impurity atom, an empty level of the transition metal can be used, and electrons can be input without increasing the voltage by using the empty level. Through which a tunnel current can flow. Further, since the energy level inherent to the transition metal atom is used, the voltage at which the current peak is obtained does not change even if the film thickness or the like varies. Further, by connecting two non-linear elements, a bistable memory device can be easily realized by utilizing the respective non-linearities. This memory device utilizes the low power consumption and area of the nonlinear element, and since the configuration is simply connecting the nonlinear element, it naturally consumes less power and can be integrated. become.

Here, transition metal ions are preferred as metal ions constituting the metal atomic layer. The reason will be described below.

A transition element is defined as an atom having an incompletely filled d-shell (or f-shell) or an element that produces such a cation (groups 3A to 7A, 8 and 1B) and generally Shows various valences. Therefore, the correlation between electrons in the atom is not so strong, and electrons are easily transferred. As shown in FIG. 9A, for example, iron Fe has six electrons in the d orbit of the M shell and two electrons in the 4s orbit of the N shell.

Iron oxides include Fe 2 O 3 and Fe 3 O 4, each of which is composed of divalent ion Fe and trivalent ion Fe. FIG. 9 (b) shows the 3d orbits and 4s of neutral atoms, divalent ions and trivalent ions of Fe.
This shows the electron arrangement state in orbit. As can be seen from the electron configuration in FIG.
The energy difference for valence ions is not much greater than Hund's law. That is, the orbit with the aligned spins is preferentially filled, and even if the orbit with the spin direction different from that of the other orbits is filled with electrons, it is immediately rejected. Therefore, when a virtual level in the case of a trivalent ion (which becomes a divalent ion when an electron enters therein) is used as an empty level in the impurity atomic layer, resonance tunneling is performed by applying an extremely small voltage. A structure that can be created can be realized.

In particular, among the transition metals, Mn, Fe, C
r, Ni, Cu, Sm, Eu, Gd, Yb, Lu, Ce
Is particularly preferred. The reason is that these elements are divalent and trivalent
This is because two valences such as valence or monovalent and divalent can be taken.

As a result, as shown in FIG.
For example, in the case of iron, even if another electron is added to Fe, which is a trivalent ion, to make it a divalent ion, the energy level does not shift much between the two. Therefore, even if the voltage V0 applied from the outside is small, resonance tunneling can be generated, and the device can be put to practical use as a nonlinear element having resonance tunneling characteristics.

However, one electron is added to the empty level of the metal atomic layer.
If the energy levels of the electrons are greatly shifted by satisfying the above conditions, the device becomes somewhat inferior in practical use. For example, as shown in FIG. 10B, resonance tunneling may not occur unless one electron is applied to increase the voltage applied to this element to 30 volts. However, when a voltage of 30 volts is applied, the barrier of the insulating layer becomes substantially extremely low, so that the probability of electrons crossing the insulating film and the probability of causing FN tunneling increase, and as shown in FIG. The range showing the electrical resistance becomes extremely small. Therefore, it is necessary to suppress the shift of the energy level of electrons to several volts at most. On the other hand, the transition metal is an element that is extremely suitable for forming the metal atomic layer of the nonlinear element of the present invention because the energy level does not shift so much even if the empty level is filled with electrons.

Next, the reason why electrons must enter the empty orbit of the metal atom will be described. The electrons move from the semiconductor layer to an empty orbit in the metal atomic layer by resonance tunneling, pass through another insulating film by tunneling, and then move to the conductor. In this process, if electrons do not enter the empty orbit of the metal atomic layer, the electrons cannot move from the Fermi level of the semiconductor layer to the empty level of the metal atomic layer. Therefore, the entry of electrons into the empty orbit of the metal atomic layer is a condition for passing a tunnel current. That is, the “empty level” in the above description refers to an energy level for filling the orbit of the sky with electrons.

In particular, when a transition metal is used, the ionization tendency of the transition metal is larger than the ionization tendency of the insulating layer, so that electrons can easily enter the empty orbit through the insulating layer.
It is most suitable to function as a resonant tunneling diode having a negative resistance characteristic in a low voltage range.

Here, the material constituting the insulating layer is an oxide,
In the case of nitride or fluoride, metal atoms constituting the metal atom layer are preferably atoms having a higher ionization tendency than oxygen, nitrogen or fluorine atoms. This is because an impurity element having a lower ionization tendency than these elements may be deprived of electrons by oxygen, nitrogen, fluorine or the like immediately, and may not be able to exhibit the nonlinear characteristics of the present invention. Transition metals have a higher ionization tendency than oxides, nitrides, and fluorides, and thus are also suitable as elements constituting a metal atomic layer.

(Second Embodiment) Next, a second embodiment will be described. 11 to 14 are cross-sectional views illustrating the steps of manufacturing the semiconductor device according to the present embodiment.

First, in the step shown in FIG. 11, S ions are implanted into the Si substrate by a method such as implantation of oxygen ions.
An OI substrate 260 is formed. This SOI substrate 260
It comprises a Si substrate 201, a buried oxide film 202 formed on the Si substrate 201, and a p-type Si layer 250 formed on the buried oxide film 202. p
The type Si layer 250 has a thickness of about 100 to 200 nm,
The impurity concentration of the p-type Si layer 250 is about 10 ¹⁵ to 10 ¹⁶ / c.
m is ^3. After that, using a selective oxidation method or the like, the p-type Si
An element isolation oxide film 251 for dividing the layer 250 into a plurality of isolated regions is formed. The thickness of the element isolation oxide film 251 may be about 1.5 to 2 times the thickness of the p-type Si layer 250 because each region of the p-type Si layer 250 may be electrically insulated.

Next, in the step shown in FIG.
The surface of i-layer 250 is brought into contact with water containing iron ions as metal ions and ozone as oxidizing agent for about 5 hours.
The iron ion is adjusted to a concentration of about 0.1 to 10 ppm. By this process, a first silicon oxide film 205 is formed on the p-type Si layer 250 with a thickness of about 1.5 nm.

Subsequently, the first silicon oxide film 205 formed on the p-type Si layer 250 is brought into contact with water containing only ozone for about 5 hours. By this processing, oxidation proceeds further at the interface between the first silicon oxide film 205 and the p-type Si layer 250. That is, the first silicon oxide film 205 and the p-type Si
A second silicon oxide film 206 having a thickness of about 1.5 nm is formed between the layer and the layer 250. This second silicon oxide film 2
In 06, iron is not doped.

Further, a third silicon oxide film 207 having a thickness of about 5 nm is formed on the first silicon oxide film 205 by using ultra-high vacuum CVD or the like. The third silicon oxide film 207 is not doped with iron.

Through the above steps, the first silicon oxide film 205 doped with iron is sandwiched between the second silicon oxide film 206 and the third silicon oxide film 207 not doped with iron. Thereafter, the Si substrate 201 is heat-treated at 600 ° C. for 1 hour in an H 2 gas atmosphere.

Next, in a step shown in FIG. 13, after a polysilicon film is deposited on the entire surface of the substrate, the polysilicon film and the first to third silicon oxide films 205 to 205 are formed by photolithography and dry etching. 207 is patterned. That is, the polysilicon film and the first to third
The p-type Si layer 250 among the silicon oxide films 205 to 207
Remove only the upper part near the center of the other, remove
A polysilicon electrode 208 is formed on the first to third silicon oxide films 205 to 207. Then, n-type impurity ions are implanted using the polysilicon electrode as a mask,
An n-type diffusion layer 270 is formed in a self-aligned manner. The impurity concentration of the n-type diffusion layer 270 is about 10 ²⁰ / cm ³ .

Next, in the step shown in FIG. 14, after depositing an interlayer insulating film 209 over the entire surface of the substrate, the interlayer insulating film 209 is formed by photolithography and dry etching.
Are formed, and contact holes reaching the n-type diffusion layers 270 on both sides of the polysilicon electrode 208 are formed. Further, each contact hole is filled with tungsten (W) to form first and second W plugs 210a and 210.
After forming b, aluminum (Al) is formed on the entire surface of the substrate.
Depositing an alloy film and patterning this film,
A first Al wiring 211 and a second Al wiring 212 connected to each W plug 210a, 210b are formed.

Through the above manufacturing steps, a resonance tunnel diode in which the first silicon oxide film 205 containing iron is sandwiched between the second and third silicon oxide films 206 and 207 not containing iron. The operation of the resonant tunnel diode will be described below.

As shown in FIG. 15, the second Al wiring 21
2 and the first Al wiring 211 and the second Al
When a potential at which the first Al wiring 211 becomes positive is applied between the first Al wiring 211 and the wiring 212, the first Al wiring 21
The current flowing between the first and second Al wirings 212 also changes. FIG. 16 is a diagram showing current-voltage characteristics obtained at this time. FIGS. 17A to 17C show the first Al wiring 2.
N-type diffusion layer 270 corresponding to a change in the voltage applied to
FIG. 4 is a diagram showing a change in an energy band between polysilicon electrodes 208. Hereinafter, the current-voltage characteristics will be described. However, since the basic operation principle is the same as that of the first embodiment, the following description is simplified.

First, as shown in FIG. 17A, when the voltage is zero, an equilibrium state is established and the first silicon oxide film 20
The empty levels of the Fe atoms in 5 are significantly higher than the Fermi levels of semiconductors and metals. Therefore, no current flows as indicated by a point Jv2a in the current-voltage characteristic line Jv2 of FIG.

Further, as the voltage applied between second Al wiring 112 and polysilicon electrode 208 is increased in the positive direction, the Fermi level of n-type diffusion layer 270 and the Electrons approaching the empty level of Fe atoms and approaching the resonance state, and tunneling through the second silicon oxide film 206 between the n-type diffusion layer 270 and the empty level in the first silicon oxide film 205. The number, ie, the tunnel current, increases. At this time, unlike the first embodiment, since the third silicon oxide film is thick, it is necessary to apply a higher voltage to move the electrons entering the empty orbit to the polysilicon electrode 208 further. That is, it is necessary to apply a voltage equal to or higher than the fixed voltage value Vop in order for the current to flow.

Then, as shown in FIG.
When the empty level of the atoms resonates with the Fermi level of the n-type diffusion layer 270, the current becomes maximum, and the maximum current shown by the point Jv2b of the current-voltage characteristic line Jv2 in FIG. 16 flows.

When the voltage is further increased, the n-type diffusion layer 2
70 and F in the first silicon oxide film 205
As the difference from the empty level of the e atom increases, the number of electrons moving by tunneling decreases and the current gradually decreases. As a result, a negative resistance is observed in this element. Then, the current-voltage characteristic line Jv2 of FIG.
The current becomes minimal at the middle point Jv2c.

When the voltage is further increased, the difference between the Fermi level of the n-type diffusion layer 270 and the barrier of the insulating film becomes smaller. That is, the current increases again because the height of the barrier formed by the insulating film is effectively reduced.

On the other hand, when a negative voltage is applied to the polysilicon electrode 208, the empty level of Fe atoms resonates with the Fermi level of the polysilicon electrode 208 as shown in FIG. .

In this embodiment, the second silicon oxide film 20
6 is 1.5 nm, and the third silicon oxide film 20
7 has a thickness of 5 nm. When the thicknesses of the second silicon oxide film 206 and the third silicon oxide film 207 are different as described above, the distribution of the voltage applied between the n-type diffusion layer 270 and the polysilicon electrode 208 is different depending on the film thickness, and An absolute value of a voltage at which a current flows when a positive voltage is applied to the silicon electrode 208 is different from an absolute value of a voltage at which a current flows when a negative voltage is applied to the polysilicon electrode 208.
In the present embodiment, the absolute value of the voltage at which current flows when a negative voltage is applied to the polysilicon electrode 208 is lower. Therefore, a small negative voltage V is applied to the polysilicon electrode 208.
By applying w, charges can be stored in the first silicon oxide film 205. The presence or absence of the charge can be determined by operating the n-type MOS transistor including the polysilicon electrode 208, the p-type Si layer 250, and the n-type diffusion layer 270 normally. That is, a positive voltage is applied to the polysilicon electrode 208, and the first Al wiring 211 is grounded (0
V), an appropriate positive voltage is applied to the second Al wiring 212. At this time, since the threshold value of the n-type MOS transistor changes depending on the presence or absence of electric charge in the first silicon oxide film 205, the difference in the threshold value of the n-type MOS transistor is determined by some method, so that it can be used as a memory. Can be. Further, since the electric charge stored in the first silicon oxide film 205 is hard to move, this element can be used as a nonvolatile memory. That is, the semiconductor device of the present embodiment functions as a flash memory. However, in that case, the positive voltage applied to the polysilicon electrode 208 has an upper limit. That is, it is necessary to use the Fermi level in the n-type diffusion layer 270 and the empty level of Fe atoms in the first silicon oxide film 205 within a range in which the resonance tunnel current does not flow. Therefore, as shown in FIG. 16, it is desirable to set the read voltage to Vop or less.

As described above, the semiconductor device of this embodiment functions as a non-linear device having a negative resistance portion in the current-voltage characteristics and a nonvolatile memory. This element utilizes the tunnel effect and has a small operating voltage and operating current, and thus functions as a low power consumption element. Further, since the size of the device is small, high integration can be achieved.

In particular, as in the first embodiment, by using a transition metal as an impurity atom, an empty level of the transition metal can be used, and the voltage can be increased by using the empty level. Since electrons can be injected without any problem, a tunnel current can flow through the insulating film. Further, since the energy level inherent to the transition metal atom is used, the voltage at which the current peak is obtained does not change even if the film thickness or the like varies.

In this embodiment, the first silicon oxide film 2
Although iron was used as a metal to be doped in
It goes without saying that the same metal as in the embodiment can be used.

In the first and second embodiments, ozone is used as an oxidizing agent mixed in the etching solution together with the metal ions. However, the present invention is not limited to such an embodiment, and the present invention is not limited thereto. It is also possible to use other oxidizing agents such as fuming nitric acid.

[0083]

According to the first to tenth aspects of the present invention, as a method of manufacturing a semiconductor device, a semiconductor is brought into contact with a liquid containing metal ions and an oxidizing agent, thereby taking in a metal in the oxide film and partially forming the oxide film. Since the semiconductor device having the above is formed, without controlling the film thickness at the atomic level,
By utilizing resonance tunneling through empty electron orbits of a metal, a semiconductor device having low current and voltage, low power consumption, and functioning as a highly integrated non-linear element or a nonvolatile memory can be formed.

According to the present invention, the structure in which the first insulating film containing a metal is sandwiched between the second and third insulating films containing no metal is provided in the semiconductor device. By utilizing the resonant tunneling via the electron orbit, it is possible to provide a semiconductor device which has a small current / voltage, consumes low power, and functions as a highly integrated non-linear element or a nonvolatile memory.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a process of forming a device isolation oxide film on an SOI substrate in a manufacturing process of a semiconductor device according to a first embodiment.

FIG. 2 is a cross-sectional view showing a process up to forming first and second n-type diffusion layers in the manufacturing process of the semiconductor device according to the first embodiment.

FIG. 3 is a cross-sectional view showing a process of forming a first, second, and third silicon oxide films in a manufacturing process of the semiconductor device according to the first embodiment;

FIG. 4 is a cross-sectional view showing a step of forming a polysilicon electrode in the manufacturing steps of the semiconductor device according to the first embodiment;

FIG. 5 is a cross-sectional view showing a process of forming the first and second Al wirings in the manufacturing process of the semiconductor device according to the first embodiment.

FIG. 6 is a cross-sectional view illustrating a state where a voltage is applied to the semiconductor device according to the first embodiment;

FIG. 7 is a current-voltage characteristic diagram of the semiconductor device according to the first embodiment.

FIG. 8 is an energy band diagram showing a change in an energy state according to a change in a voltage application state of the semiconductor device according to the first embodiment.

FIG. 9 is an atomic model diagram and an electron arrangement diagram of an iron element.

FIG. 10 is a diagram showing a relationship between a value of an energy level for filling an empty electron orbit of an impurity atomic layer with electrons and current-voltage characteristics.

FIG. 11 is a cross-sectional view showing a step of forming a device isolation oxide film on an SOI substrate in the manufacturing steps of the semiconductor device according to the second embodiment.

FIG. 12 is a cross-sectional view showing a step of forming first, second, and third silicon oxide films in the manufacturing steps of the semiconductor device according to the second embodiment.

FIG. 13 is a cross-sectional view showing a step until a polysilicon electrode is formed in the manufacturing steps of the semiconductor device according to the second embodiment.

FIG. 14 is a cross-sectional view showing a step of forming first and second Al wirings in the manufacturing steps of the semiconductor device according to the second embodiment.

FIG. 15 is a cross-sectional view illustrating a state where a voltage is applied to the semiconductor device according to the second embodiment.

FIG. 16 is a graph showing current- of the semiconductor device according to the second embodiment.
It is a voltage characteristic figure.

FIG. 17 is an energy band diagram showing a change in an energy state according to a change in a voltage application state of the semiconductor device according to the second embodiment.

[Explanation of symbols]

 101 Si substrate 102 buried oxide film 103 first n-type diffusion layer 104 second n-type diffusion layer 105 first silicon oxide film 106 second silicon oxide film 107 third silicon oxide film 108 polysilicon electrode 109 interlayer insulating film 110a, b first , Second W plug 111 first Al wiring 112 second Al wiring 150 p-type Si layer 151 element isolation oxide film 160 SOI substrate 201 Si substrate 202 buried oxide film 205 first silicon oxide film 206 second silicon oxide film 207 third silicon oxide film 208 Polysilicon electrode 209 Interlayer insulating film 210a, b First and second W plug 211 First Al wiring 212 Second Al wiring 250 P-type Si layer A 251 Element isolation oxide film 260 SOI substrate 270 N-type diffusion layer

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Seiji Araki 1006 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. 72) Inventor Yasuhito Kubuchi 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (16)

[Claims] A first step of contacting the semiconductor layer of a substrate having a semiconductor layer with a liquid containing metal ions and an oxidizing agent to form an oxide film containing a metal on the semiconductor layer; A step of forming an electrode made of a conductive film on the film. 2. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of depositing a thin insulating film on said oxide film after said first step and before said second step. A method of manufacturing a semiconductor device, wherein in the second step, an electrode is formed on the insulating film. 3. The method of manufacturing a semiconductor device according to claim 1, wherein immediately after the first step, the oxide film is brought into contact with a liquid containing only an oxidizing agent to oxidize the semiconductor layer; A method of manufacturing a semiconductor device, further comprising a step of forming a second oxide film between the semiconductor layer and the oxide film. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor substrate is heat-treated in a reducing atmosphere after the first step and before or after the second step. A method for manufacturing a semiconductor device, further comprising a step. 5. A first method for forming an oxide film containing a metal on the semiconductor layer by bringing the semiconductor layer of the substrate having a semiconductor layer of the first conductivity type into contact with a liquid containing a metal ion and an oxidizing agent. A second step of forming an insulating film on the oxide film; a third step of forming an electrode made of a conductive film on the insulating film; And a fourth step of introducing a second conductivity type impurity into the semiconductor layer to form a second conductivity type diffusion layer in regions on both sides of the electrode in the semiconductor layer. Production method. 6. The method for manufacturing a semiconductor device according to claim 5, wherein immediately after said first step, said oxide film is brought into contact with a liquid containing only an oxidizing agent to oxidize said semiconductor layer, A method for manufacturing a semiconductor device, further comprising a step of forming a second oxide film between a layer and the oxide film. 7. The method for manufacturing a semiconductor device according to claim 5, wherein the semiconductor substrate is placed in a reducing atmosphere after the first step and the second step and before or after the third step. A method of manufacturing a semiconductor device, further comprising: 8. The method of manufacturing a semiconductor device according to claim 1, wherein said metal ions are transition metal ions. 9. The method for manufacturing a semiconductor device according to claim 8, wherein said transition metal ion is an iron ion. 10. The method according to claim 1,2,3,4,5,6,7,
The method for manufacturing a semiconductor device according to claim 8 or 9, wherein the oxidizing agent is ozone. 11. A substrate having a semiconductor layer at least on a surface portion, a first insulating film formed above the semiconductor layer and containing a metal impurity, and an interlayer between the first insulating film and the semiconductor layer. A second insulating film having a potential energy serving as a barrier against the movement of electrons and a thickness allowing tunneling of the electrons; and a second insulating film formed on the first insulating film and having a barrier against the movement of the electrons. A third insulating film having a potential energy and a thickness capable of tunneling electrons, and having a thickness different from that of the first insulating film; and a conductive film formed on the third insulating film. A semiconductor device comprising: an electrode; 12. A substrate having a semiconductor layer at least on a surface portion, a first insulating film formed above the semiconductor layer and containing a metal impurity, and an intervening layer between the first insulating film and the semiconductor layer. A second insulating film having a potential energy serving as a barrier against the movement of electrons and a thickness allowing tunneling of the electrons; and a second insulating film formed on the first insulating film and having a barrier against the movement of the electrons. A third insulating film having potential energy and tunneling of electrons, an electrode formed of a conductor film formed on the third insulating film, and a portion of the semiconductor layer below the electrode. And a second conductivity type source / drain region formed on both sides of the electrode in the semiconductor layer. Conductor device. 13. The semiconductor device according to claim 12, wherein the thickness of the third insulating film is larger than that of the first insulating film. 14. The semiconductor device according to claim 12, wherein at least one of the first, second, and third insulating films is formed of a multilayer film. 15. The method according to claim 10, 11, 12, 13, or 1.
5. The semiconductor device according to claim 4, wherein the metal impurity is a transition metal. 16. The semiconductor device according to claim 15, wherein said transition metal is iron.