JPH10125825A - Seal structure of chip device and method of sealing the same - Google Patents
Seal structure of chip device and method of sealing the sameInfo
- Publication number
- JPH10125825A JPH10125825A JP28082396A JP28082396A JPH10125825A JP H10125825 A JPH10125825 A JP H10125825A JP 28082396 A JP28082396 A JP 28082396A JP 28082396 A JP28082396 A JP 28082396A JP H10125825 A JPH10125825 A JP H10125825A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- sealing
- resin
- type device
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007789 sealing Methods 0.000 title claims description 86
- 238000000034 method Methods 0.000 title claims description 32
- 229920005989 resin Polymers 0.000 claims abstract description 42
- 239000011347 resin Substances 0.000 claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 31
- 238000003825 pressing Methods 0.000 claims description 14
- 239000002985 plastic film Substances 0.000 claims 1
- 229920006255 plastic film Polymers 0.000 claims 1
- 239000003822 epoxy resin Substances 0.000 abstract description 15
- 229920000647 polyepoxide Polymers 0.000 abstract description 15
- 230000001070 adhesive effect Effects 0.000 abstract description 10
- 239000000853 adhesive Substances 0.000 abstract description 8
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 230000009975 flexible effect Effects 0.000 abstract description 2
- 230000002209 hydrophobic effect Effects 0.000 abstract description 2
- 229920002050 silicone resin Polymers 0.000 abstract description 2
- 229920000642 polymer Polymers 0.000 abstract 1
- 239000000463 material Substances 0.000 description 12
- 239000007789 gas Substances 0.000 description 7
- 239000011521 glass Substances 0.000 description 7
- 238000010897 surface acoustic wave method Methods 0.000 description 7
- 239000004593 Epoxy Substances 0.000 description 6
- 239000000919 ceramic Substances 0.000 description 5
- 239000004033 plastic Substances 0.000 description 5
- 230000007547 defect Effects 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000002861 polymer material Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 229930185605 Bisphenol Natural products 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000012298 atmosphere Substances 0.000 description 2
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 230000008016 vaporization Effects 0.000 description 2
- 238000009834 vaporization Methods 0.000 description 2
- JOYRKODLDBILNP-UHFFFAOYSA-N Ethyl urethane Chemical compound CCOC(N)=O JOYRKODLDBILNP-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000003204 osmotic effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、チップ型デバイス
の封止構造およびその方法に関し、特に封止後に中空部
を有するチップ型デバイスの封止構造とその封止方法に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sealing structure for a chip type device and a method therefor, and more particularly to a sealing structure for a chip type device having a hollow portion after sealing and a sealing method therefor.
【0002】[0002]
【従来の技術】一般的なチップ型デバイスの封止方法と
して、大きく分けて、気密封止法と樹脂封止法とがあ
る。前者の例にはセラミックパッケージ、後者の例には
プラスチックパッケージがある。セラミックパッケージ
は、ガラスまたは金属製のリッドを用いて気密封止を行
っており、信頼性が高いが、同時に高コストである。プ
ラスチックパッケージは、封止樹脂にチップ型デバイス
を埋め込み、封止しており、低コストであるが、セラミ
ックパッケージに比べ信頼性が低い。2. Description of the Related Art As a general method of sealing a chip type device, there are roughly two methods: a hermetic sealing method and a resin sealing method. The former example is a ceramic package, and the latter is a plastic package. The ceramic package is hermetically sealed by using a lid made of glass or metal, and has high reliability, but at the same time, high cost. The plastic package has a chip type device embedded in a sealing resin and is sealed, and is low in cost, but has lower reliability than a ceramic package.
【0003】一般的な半導体デバイスでは、これら2種
類の封止方法を、用途ごとに要求される信頼性によって
使い分けているが、弾性表面波デバイスを封止する場
合、動作原理上チップの表面に空間を必要とするため、
要求される信頼性に関わらず、気密封止型のパッケージ
を使用せざるを得ず、コスト増の要因となっている。ま
た、高速動作が要求される半導体集積回路チップにおい
ても、封止樹脂の誘電率による信号遅延などの特性劣化
要因を除くため、気密封止型パッケージを使用してい
る。[0003] In a general semiconductor device, these two types of sealing methods are selectively used depending on the reliability required for each application. Because you need space,
Irrespective of the required reliability, a hermetically sealed package has to be used, which is a factor of cost increase. Further, even in a semiconductor integrated circuit chip requiring high-speed operation, a hermetically sealed package is used in order to eliminate a characteristic deterioration factor such as a signal delay due to a dielectric constant of a sealing resin.
【0004】このためこの種のチップ型デバイスの封止
方法として、安価な樹脂材料を用いて気密封止型の構成
を得るための方法が提案されている。[0004] For this reason, as a sealing method for this type of chip type device, a method for obtaining an airtight sealing type structure using an inexpensive resin material has been proposed.
【0005】例えば特開平3−16412号公報では、
熱硬化性の樹脂材料と不活性ガスの組み合わせで、樹脂
材料内でチップ型デバイス表面に空間を得る方法を示し
ている。具体的には、気体を冷却し圧縮して固体化した
物質をチップ型デバイス表面に置いた後封止樹脂を塗布
し、封止樹脂の硬化時の加温で前述の物質が気化し、チ
ップの表面に空間を設けるというものである。また、同
公報では、封止樹脂を塗布後に半硬化させた状態で不活
性ガスを注入し、チップ型デバイス表面に空間を設ける
という方法も提案している。For example, in JP-A-3-16412,
A method for obtaining a space on the surface of a chip-type device in a resin material by a combination of a thermosetting resin material and an inert gas is shown. Specifically, a substance that has been cooled and compressed to solidify by compressing the gas is placed on the surface of the chip-type device, and then the sealing resin is applied. Is to provide a space on the surface of the. Further, the publication also proposes a method in which an inert gas is injected in a state where the sealing resin is semi-cured after being applied, and a space is provided on the surface of the chip-type device.
【0006】一方、特開平5−218222では、チッ
プ型デバイスをまずエポキシ樹脂で包み、その上にモー
ルド樹脂を被覆させた後、加温してモールド樹脂を硬化
させる際にエポキシ樹脂がモールド樹脂に吸収され、モ
ールド樹脂内に空間を作る方法を挙げている。On the other hand, in Japanese Patent Application Laid-Open No. Hei 5-218222, a chip type device is first wrapped with an epoxy resin, and a mold resin is coated thereon. Then, when the mold resin is heated and cured, the epoxy resin is converted into the mold resin. It mentions a method of absorbing and creating a space in the mold resin.
【0007】[0007]
【発明が解決しようとする課題】第1の問題点は、特開
平3−16412号公報に示された第1の方法において
は、製造に要するコストを増大させる、という問題点が
ある。その理由は、封止用気体は水分含有量が低いこと
が要求されるため、この方法で使用する凝固した気体は
気化後に乾燥したものである必要があるためである。凝
固した封止用気体はそれ自体低温になるため、表面に触
れた外気に含まれた水分が付着してしまう。付着した水
分は気化後の気体に含まれることになるため、これを防
ぐためには作業及び保管する雰囲気を常時低温で乾燥さ
せておく必要があり、この作業環境の維持にコストを要
するという問題点を有する。The first problem is that the first method disclosed in Japanese Patent Application Laid-Open No. HEI 3-16412 has a problem that the manufacturing cost is increased. The reason is that since the sealing gas is required to have a low moisture content, the solidified gas used in this method needs to be dried after vaporization. Since the solidified sealing gas has a low temperature, moisture contained in the outside air that touches the surface adheres. The attached water is included in the gas after vaporization. To prevent this, it is necessary to always dry the working and storage atmosphere at low temperature, and it is costly to maintain this working environment. Having.
【0008】第2の問題点は、特開平3−16412号
公報に示された第2の方法および特開平5−21822
2号公報においては、チップ表面に封止樹脂が残留する
不良をなくすことができないという問題がある。その理
由は、いずれの方法でも、まずチップ表面に封止樹脂
(後者はエポキシ樹脂)を塗布した後に除去するプロセ
スがあるが、封止樹脂は要求される性質として接着力の
強さを持つものであり、前者の方法である、チップ表面
からの封止樹脂の除去を気体の封入で行うには、極めて
高い気圧での封入が必要であり、微小空間に封止される
気体体積分の封入のみでは、十分にチップ表面の封止樹
脂を除去することができない。また、後者での加熱時の
モールド樹脂へのエポキシ樹脂の吸収という方法では、
エポキシ樹脂を除去する作用力は、モールド樹脂へのエ
ポキシ樹脂の浸透圧のみであり、またエポキシ樹脂は揮
発性ではないため、チップ表面からエポキシ樹脂を十分
に除去させることができない。従って、実際の製造では
少なくともある確率でチップ表面に封止樹脂が残留する
不良品が発生することを避けることができないという問
題点を有する。The second problem is that the second method disclosed in Japanese Patent Application Laid-Open No. Hei 3-16412 and the method disclosed in Japanese Patent Application Laid-Open No. Hei 5-21822
In Japanese Patent Publication No. 2 (1993), there is a problem that a defect that the sealing resin remains on the chip surface cannot be eliminated. The reason is that in either case, there is a process in which a sealing resin (the latter is an epoxy resin) is first applied to the chip surface and then removed, but the sealing resin is required to have a strong adhesive force. In order to remove the sealing resin from the chip surface by gas encapsulation, which is the former method, encapsulation at an extremely high pressure is required, and encapsulation of the gas volume sealed in a minute space By itself, the sealing resin on the chip surface cannot be sufficiently removed. In the latter method, absorption of epoxy resin into mold resin during heating,
The acting force for removing the epoxy resin is only the osmotic pressure of the epoxy resin into the mold resin, and since the epoxy resin is not volatile, the epoxy resin cannot be sufficiently removed from the chip surface. Therefore, there is a problem that in actual production, it is impossible to avoid occurrence of defective products in which the sealing resin remains on the chip surface at least with a certain probability.
【0009】本発明の目的は、上記欠点を除去し、製造
に要するコストを増大させずに封止樹脂材料を用いて中
空部を有する封止構造およびその方法を提供することに
ある。An object of the present invention is to provide a sealing structure having a hollow portion by using a sealing resin material without removing the above-mentioned drawbacks and increasing the production cost, and a method thereof.
【0010】本発明の他の目的は、チップ型デバイスの
表面に封止樹脂が残留する不良を発生させない封止構造
およびその方法を提供することにある。It is another object of the present invention to provide a sealing structure and a method thereof that do not cause a defect in which a sealing resin remains on the surface of a chip type device.
【0011】[0011]
【課題を解決するための手段】上記課題を解決するた
め、本発明のチップ型デバイスの封止構造は、チップ型
デバイスを誘電体基板上にフリップチップ実装した上
に、エポキシ系樹脂、シリコーン系樹脂、ビスフェノー
ル系樹脂、その他の高分子材料で作成した封止用フィル
ムを被せ、その封止用フィルムの外周と、前記誘電体基
板とを接着剤を用いて接着させた構成を有する。In order to solve the above-mentioned problems, a chip type device sealing structure of the present invention comprises a chip type device mounted on a dielectric substrate by flip-chip bonding, an epoxy resin, a silicone type It has a configuration in which a sealing film made of a resin, a bisphenol-based resin, or another polymer material is covered, and the outer periphery of the sealing film is bonded to the dielectric substrate using an adhesive.
【0012】上記構成において、チップ型デバイスをフ
リップチップ実装した上に、フレキシブルな封止用フィ
ルムを被せることで封止するので、チップ型デバイスの
表面には、封止樹脂材料を付着することなく封止でき
る。また、チップ型デバイスの表面と搭載される誘電体
基板との間にバンプの高さなどによるすき間が空いてお
り、これが封止後の中空部となる。In the above configuration, since the chip-type device is flip-chip mounted and sealed by covering with a flexible sealing film, the sealing resin material does not adhere to the surface of the chip-type device. Can be sealed. Also, there is a gap between the surface of the chip-type device and the mounted dielectric substrate due to the height of the bumps and the like, which becomes a hollow portion after sealing.
【0013】[0013]
【発明の実施の形態】次に本発明の実施の形態について
図面を参照して詳細に説明する。Embodiments of the present invention will now be described in detail with reference to the drawings.
【0014】図1は本発明の一実施の形態を示す断面図
である。FIG. 1 is a sectional view showing an embodiment of the present invention.
【0015】図1を参照すると、弾性表面波デバイスな
どのチップ型デバイス1の表面には電極(図示せず)形
成されている。チップ型デバイス2が搭載される誘電体
基板4上には、電極と相対する位置にパッド10が形成
されており、このパッド10と電極はバンプ3によって
相互接続されている。封止は、フリップチップ実装され
たチップ型デバイス2を上方(チップ型デバイスの裏面
側)から封止用フィルム1を被せ、封止用フィルム1の
外周に設けた接着部6をチップ型デバイス2の外側の範
囲で誘電体基板4に押しつけ、その箇所で封止用フィル
ム1と誘電体基板4とを接着させることにより行なわれ
る。Referring to FIG. 1, electrodes (not shown) are formed on the surface of a chip type device 1 such as a surface acoustic wave device. On the dielectric substrate 4 on which the chip type device 2 is mounted, pads 10 are formed at positions opposite to the electrodes, and the pads 10 and the electrodes are interconnected by bumps 3. For sealing, the chip-type device 2 mounted on the flip-chip is covered with the sealing film 1 from above (the back side of the chip-type device), and the bonding portion 6 provided on the outer periphery of the sealing film 1 is attached to the chip-type device 2. Is pressed against the dielectric substrate 4 in a range outside the above, and the sealing film 1 and the dielectric substrate 4 are adhered at that location.
【0016】封止用フィルム1は、絶縁性で且つ疎水性
であり、室温でフレキシブルな性質を示すものを用い
る。材料としては、エポキシ系樹脂、シリコーン樹脂、
ビスフェノール系樹脂、ウレタン系樹脂などの高分子材
料の単独、あるいは組み合わせによる適用などがある。The sealing film 1 is an insulating and hydrophobic film which exhibits flexibility at room temperature. Materials include epoxy resin, silicone resin,
There is application of a polymer material such as a bisphenol-based resin or a urethane-based resin alone or in combination.
【0017】封止用フィルム1と誘電体基板4との接着
は、封止用フィルム1に高分子材料としての硬化前の接
着性を残す方法と、封止用フィルム1には硬化後も可塑
性を有する材料を用い、接着剤を用いて誘電体基板4と
接着する方法とがある。The adhesion between the sealing film 1 and the dielectric substrate 4 can be achieved by a method of leaving the adhesive property of the sealing film 1 before curing as a polymer material, or by a method of allowing the sealing film 1 to remain plastic after curing. And bonding to the dielectric substrate 4 using an adhesive by using a material having the following.
【0018】チップ型デバイス2のフリップチップ実装
工法には、後工程となる上記の封止工程で熱履歴上問題
とならない工法を選定する。例えば、封止工程で120
℃〜160℃に加熱される場合、バンプ3としてはんだ
ボールを用いた工法で190℃〜230℃の温度でフリ
ップチップ実装を行う。As a flip chip mounting method for the chip type device 2, a method which does not cause a problem in the heat history in the above sealing step which is a later step is selected. For example, in the sealing process, 120
When the heating is performed at a temperature of from 1 to 160 ° C., flip-chip mounting is performed at a temperature of from 190 to 230 ° C. by a method using solder balls as the bumps 3.
【0019】次に、本発明の実施の形態の動作につい
て、図2を参照して詳細に説明する。Next, the operation of the embodiment of the present invention will be described in detail with reference to FIG.
【0020】図2(a)〜(c)はそれぞれ図1の本発
明の実施の形態の封止工程の各工程を説明する断面図で
ある。図2(a)において、誘電体基板4上にフリップ
チップ実装されたチップ型デバイス2の上に、可塑性を
示す材料で形成された封止用フィルム1と、封止用フィ
ルム1の外周部を押さえる押し型12とを配置する。図
2(b)では、押し型12により封止用フィルム1の接
着部6を誘電体基板4に押しつけている。封止用フィル
ム1は可塑性を有するため、チップ型デバイス2の側面
をふさぐように変形し、全体を封止する。図2(c)は
押し型12をはずした完了後の状態を示している。FIGS. 2A to 2C are cross-sectional views for explaining respective steps of the sealing step of the embodiment of the present invention shown in FIG. In FIG. 2A, a sealing film 1 formed of a plastic material and an outer peripheral portion of the sealing film 1 are formed on a chip type device 2 which is flip-chip mounted on a dielectric substrate 4. The pressing die 12 for holding is arranged. In FIG. 2B, the bonding part 6 of the sealing film 1 is pressed against the dielectric substrate 4 by the pressing die 12. Since the sealing film 1 has plasticity, it is deformed so as to cover the side surface of the chip type device 2 and seals the whole. FIG. 2C shows a state after completion of removal of the pressing die 12.
【0021】封止用フィルム1と誘電体基板4との接着
は、図2(b)の押し型12で押している状態で全体
を、または押し型12を発熱させ局所的に加温して行う
ことも、図2(c)の押し型12をはずした後に全体を
加温することも可能である。The bonding between the sealing film 1 and the dielectric substrate 4 is carried out by heating the entirety of the pressing film 12 or locally by heating the pressing die 12 while pressing with the pressing die 12 shown in FIG. 2B. In addition, it is also possible to heat the whole after removing the pressing mold 12 of FIG.
【0022】次に、本発明の実施例について図1を参照
して詳細に説明する。Next, an embodiment of the present invention will be described in detail with reference to FIG.
【0023】図1を参照すると、本発明の実施例は、誘
電体基板4に厚さ1mmのガラスエポキシ基板、チップ
型デバイス2に厚さ0.4mmの弾性表面波デバイス、
電極に厚さ0.8μmの金導体、バンプ3に直径50μ
mのはんだボール、封止用フィルム1に厚さ0.3mm
のフィルム状に成形され、硬化前の可塑性と接着性とを
有したエポキシ系樹脂、パッド10および配線導体に厚
さ20μmの銅箔下地に厚さ0.3μmの金メッキをか
けたもので構成される。Referring to FIG. 1, an embodiment of the present invention comprises a dielectric substrate 4 having a glass epoxy substrate having a thickness of 1 mm, a chip type device 2 having a surface acoustic wave device having a thickness of 0.4 mm,
0.8 μm thick gold conductor for electrode, 50 μm diameter for bump 3
m solder balls, 0.3 mm thick on sealing film 1
It is formed of an epoxy resin having plasticity and adhesiveness before curing, and a pad 10 and a wiring conductor which are formed by applying a copper plating of 20 μm thickness and a gold plating of 0.3 μm thickness on a copper foil base. You.
【0024】次に、本発明の実施例の製造工程につい
て、図2を参照して詳細に説明する。Next, the manufacturing process of the embodiment of the present invention will be described in detail with reference to FIG.
【0025】図2(a)〜(c)はそれぞれ図1の本発
明の実施例の封止工程の各工程を説明する断面図であ
る。図2(a)では、ガラスエポキシ基板上にフリップ
チップ実装された弾性表面波デバイスの上に、エポキシ
系樹脂材料を用いて構成した、可塑性と接着性を有する
封止用フィルム1と、封止用フィルム1の外周に設けた
接着部6を押さえる押し型12とを配置する。封止用フ
ィルム1は押し型12に対しても接着性を示し、押しつ
け後かい離しにくくなるので、接触する箇所にはかい離
材としてワックスを塗布しておく。封止作業を行う雰囲
気は封止後の中空部5に取り込まれるので、乾燥した窒
素雰囲気25とし、封止後の弾性表面波デバイスの腐食
などを防ぐ。図2(b)では、押し型12により封止用
フィルム1の接着部6をガラスエポキシ基板に押しつけ
ている。封止用フィルム1は可塑性を有するため、弾性
表面波デバイス側面をふさぐように変形し、全体を封止
する。接着部6を押し型12で加圧した状態でエポキシ
系樹脂を硬化させることで、ガラスエポキシ基板への密
着性を向上させる目的から、図2(b)の工程で全体を
加温することでエポキシ系樹脂の硬化を行う。硬化の温
度設定は150℃とする。フリップチップ実装は230
℃で行っているため熱履歴上の問題はない。図2(c)
は押し型をはずした封止完了後の状態を示している。FIGS. 2A to 2C are cross-sectional views for explaining the respective steps of the sealing step of the embodiment of the present invention shown in FIG. In FIG. 2A, a plastic and adhesive sealing film 1 made of an epoxy resin material is formed on a surface acoustic wave device flip-chip mounted on a glass epoxy substrate. And a pressing die 12 for holding the bonding portion 6 provided on the outer periphery of the film 1 for use. Since the sealing film 1 also has an adhesive property to the pressing die 12 and is difficult to separate after pressing, wax is applied as a release material to a contacting portion. Since the atmosphere in which the sealing operation is performed is taken into the hollow portion 5 after the sealing, a dry nitrogen atmosphere 25 is used to prevent corrosion of the surface acoustic wave device after the sealing. In FIG. 2B, the bonding portion 6 of the sealing film 1 is pressed against the glass epoxy substrate by the pressing die 12. Since the sealing film 1 has plasticity, it is deformed so as to cover the side surface of the surface acoustic wave device, and the whole is sealed. By hardening the epoxy resin in a state where the bonding portion 6 is pressed by the press mold 12, the entirety is heated in the step of FIG. 2B for the purpose of improving the adhesion to the glass epoxy substrate. The epoxy resin is cured. The curing temperature is set to 150 ° C. 230 for flip chip mounting
There is no problem in heat history because the test is performed at ° C. FIG. 2 (c)
Indicates the state after the completion of the sealing with the mold removed.
【0026】本発明の第1の実施の形態の他の実施例に
ついて図1を参照して説明していく。Another example of the first embodiment of the present invention will be described with reference to FIG.
【0027】封止用フィルム1には、硬化後も可塑性を
有するシリコーン系樹脂を用い、接着部6に接着剤を塗
布して接着させる構成に置き換えてもよい。その場合、
接着剤の硬化の際、全体を加温する必要がないので、例
えば図2(b)の工程で押し型12を発熱させ加温する
ことで硬化させる封止工法に置き換えてもよい。厚みは
可塑性や耐湿性などの封止用フィルム1の性質が損なわ
れない範囲で変えてもよい。封止用フィルム1は、ガラ
ス繊維などを網状または布状にしたものを基材として、
それに封止樹脂を付着させて形成してもよい。The sealing film 1 may be replaced with a configuration in which a silicone-based resin having plasticity even after curing is used, and an adhesive is applied to and bonded to the bonding portion 6. In that case,
Since it is not necessary to heat the whole when the adhesive is cured, the sealing method may be replaced with a sealing method in which, for example, the pressing die 12 is heated and heated to be cured in the step of FIG. The thickness may be changed as long as the properties of the sealing film 1 such as plasticity and moisture resistance are not impaired. The sealing film 1 is formed by using a glass fiber or the like made into a net or cloth as a base material.
It may be formed by attaching a sealing resin thereto.
【0028】バンプ3は、はんだボールを金ボールに置
き換えてもよい。その場合のバンプ3と誘電体基板4上
のパッド10との接続は、300℃〜400℃に加熱し
て加圧する熱圧着によって行う工法や、導電性接着剤を
用いて行う工法(日経マイクロデバイス、96年3月
号、P.148〜P.149を参照)に置き換えてもよ
い。The bumps 3 may be replaced by gold balls instead of solder balls. In this case, the connection between the bump 3 and the pad 10 on the dielectric substrate 4 is performed by a thermocompression method in which the bump 3 is heated to 300 ° C. to 400 ° C. and a pressure is applied, or a method using a conductive adhesive (Nikkei Microdevices) , March 1996, pp. 148 to 149).
【0029】誘電体基板4のガラスエポキシ基板は、厚
みを1.0mm以外の値に置き換えてもよい。また、ガ
ラスエポキシ基板をセラミック基板としてもよく、その
場合も厚みを1.0mm以外の値にしてもよい。The thickness of the glass epoxy substrate of the dielectric substrate 4 may be replaced with a value other than 1.0 mm. Further, the glass epoxy substrate may be a ceramic substrate, and in this case, the thickness may be a value other than 1.0 mm.
【0030】チップ型デバイス2は、弾性表面波デバイ
スを半導体集積回路チップとしてもよい。The chip type device 2 may use a surface acoustic wave device as a semiconductor integrated circuit chip.
【0031】本発明の第2の実施の形態を図3を参照し
て詳細に説明する。A second embodiment of the present invention will be described in detail with reference to FIG.
【0032】図3は本発明の第2の実施の形態を示す断
面図である。図3では、誘電体基板の代わりにチップキ
ャリア7を用いて、組立品をパッケージングされた部品
として扱えるようにしている。チップキャリア7は、セ
ラミック基板にパッド10と外部との電気的接続を得る
ためのメタライズ部8を形成したもので構成している。FIG. 3 is a sectional view showing a second embodiment of the present invention. In FIG. 3, a chip carrier 7 is used in place of the dielectric substrate so that the assembly can be handled as a packaged component. The chip carrier 7 is formed by forming a metallized portion 8 for obtaining electrical connection between the pad 10 and the outside on a ceramic substrate.
【0033】第2の実施の形態での各構成要素の置き換
えについても、第1の実施の形態の実施例に対して行っ
たものと同様のことが可能である。The replacement of each component in the second embodiment can be the same as that performed for the example of the first embodiment.
【0034】[0034]
【発明の効果】以上述べたように、本発明のチップ型デ
バイスの封止構造では、チップ型デバイスの封止作業を
室温で行え、作業環境の維持に特別なコストを要さない
ため、製造に要するコストを増大させずに封止樹脂材料
を用いて中空部を有する封止構造を実現でき、これによ
り、弾性表面波デバイスなどの動作原理上チップの表面
に空間があいている必要があるチップ型デバイスを封止
樹脂を用いて低コストで製造することができる。As described above, in the chip type device sealing structure of the present invention, the chip type device can be sealed at room temperature and no special cost is required to maintain the working environment. It is possible to realize a sealing structure having a hollow portion by using a sealing resin material without increasing the cost required for the device, which requires a space on the surface of the chip due to the principle of operation such as a surface acoustic wave device A chip-type device can be manufactured at low cost by using a sealing resin.
【0035】また、チップ型デバイスの裏面から封止用
フィルムを被せて封止し、チップの表面に封止樹脂が接
触することがないようにしているため、チップ型デバイ
スの表面に封止樹脂が残留する不良が発生せず、これに
より、製造時の同モード不良をなくすことができる。In addition, since the sealing film is put on the back surface of the chip type device and sealed so that the sealing resin does not come into contact with the surface of the chip, the surface of the chip type device is sealed with the sealing resin. No residual defect occurs, thereby eliminating the same mode defect during manufacturing.
【図1】本発明の第1の実施の形態を示す断面図。FIG. 1 is a sectional view showing a first embodiment of the present invention.
【図2】図1の実施の形態の封止工程を説明する断面
図。FIG. 2 is a sectional view illustrating a sealing step of the embodiment of FIG. 1;
【図3】本発明の第2の実施の形態を示す断面図。FIG. 3 is a sectional view showing a second embodiment of the present invention.
1 封止用フィルム 2 チップ型デバイス 3 バンプ 4 誘電体基板 5 中空部 6 接着部 7 チップキャリア 10 パッド 12 押し型 25 乾燥した窒素雰囲気 DESCRIPTION OF SYMBOLS 1 Sealing film 2 Chip-type device 3 Bump 4 Dielectric substrate 5 Hollow part 6 Adhesion part 7 Chip carrier 10 Pad 12 Press type 25 Dry nitrogen atmosphere
Claims (3)
ップ実装されたチップ型デバイスと、封止樹脂とを含む
チップ型デバイスの封止構造において、前記封止樹脂が
フィルム状になっていることを特徴とする、チップ型デ
バイスの封止構造。1. A sealing structure of a chip-type device including a chip-type device flip-chip mounted on a dielectric substrate using bumps and a sealing resin, wherein the sealing resin is in a film shape. A sealing structure for a chip-type device.
ップ実装されたチップ型デバイスと、封止樹脂とを含む
チップ型デバイスの封止方法において、前記封止樹脂を
可塑性のあるフィルム状に成形し、前記チップ型デバイ
スに被せ、前記チップ型デバイスの周辺で前記誘電体基
板に押しあてることによって封止することを特徴とす
る、チップ型デバイスの封止方法。2. A method for sealing a chip-type device including a chip-type device flip-chip mounted on a dielectric substrate using bumps and a sealing resin, wherein the sealing resin is formed into a plastic film. And sealing the chip-type device by covering the chip-type device and pressing the device against the dielectric substrate around the chip-type device.
ップ実装されたチップ型デバイスと、封止樹脂とを含む
チップ型デバイスの封止構造において、封止後のチップ
型デバイスの表面に中空部を有することを特徴とする、
チップ型デバイスの封止構造。3. In a chip device sealing structure including a chip device flip-chip mounted on a dielectric substrate using bumps and a sealing resin, a hollow portion is formed on a surface of the chip device after sealing. Characterized by having
Sealing structure for chip type devices.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28082396A JPH10125825A (en) | 1996-10-23 | 1996-10-23 | Seal structure of chip device and method of sealing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28082396A JPH10125825A (en) | 1996-10-23 | 1996-10-23 | Seal structure of chip device and method of sealing the same |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH10125825A true JPH10125825A (en) | 1998-05-15 |
Family
ID=17630487
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP28082396A Pending JPH10125825A (en) | 1996-10-23 | 1996-10-23 | Seal structure of chip device and method of sealing the same |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH10125825A (en) |
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KR100552095B1 (en) * | 2000-02-18 | 2006-02-13 | 마쯔시다덴기산교 가부시키가이샤 | Method for fabricating bump-mounted unit and apparatus for fabricating the same |
US7134196B2 (en) | 2000-12-18 | 2006-11-14 | Tdk Corporation | Electronic device and manufacturing same |
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JP2009508339A (en) * | 2005-09-15 | 2009-02-26 | スマートラック アイピー ビー.ヴィー. | Chip module and method for forming the same |
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US7134196B2 (en) | 2000-12-18 | 2006-11-14 | Tdk Corporation | Electronic device and manufacturing same |
US7261792B2 (en) | 2002-12-06 | 2007-08-28 | Murata Manufacturing Co., Ltd. | Method of producing piezoelectric component and piezoelectric component |
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JP4544044B2 (en) * | 2005-06-08 | 2010-09-15 | Tdk株式会社 | Semiconductor device |
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JP2009508339A (en) * | 2005-09-15 | 2009-02-26 | スマートラック アイピー ビー.ヴィー. | Chip module and method for forming the same |
CN102970831A (en) * | 2012-11-27 | 2013-03-13 | 谢忠 | Vacuum adsorption connecting and binding process for integrated circuit (IC) card electronic chip and flexible printed circuit board |
US20140220422A1 (en) * | 2013-02-06 | 2014-08-07 | The Board Of Trustees Of The University Of Illinois | Stretchable electronic systems with fluid containment |
CN105340369A (en) * | 2013-02-06 | 2016-02-17 | 伊利诺伊大学评议会 | Stretchable electronic systems with containment chambers |
US10192830B2 (en) | 2013-02-06 | 2019-01-29 | The Board Of Trustees Of The University Of Illinois | Self-similar and fractal design for stretchable electronics |
US10497633B2 (en) * | 2013-02-06 | 2019-12-03 | The Board Of Trustees Of The University Of Illinois | Stretchable electronic systems with fluid containment |
US10840536B2 (en) | 2013-02-06 | 2020-11-17 | The Board Of Trustees Of The University Of Illinois | Stretchable electronic systems with containment chambers |
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