JPH10125720A - Semiconductor integrated circuit device and method of manufacturing the same - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To improve the connection life of a bump. An element mounting board for mounting a semiconductor chip.
And a sealing portion 3 for sealing the semiconductor chip and its peripheral portion, and a thickness slightly smaller than the diameter of the bump 4, interposed between adjacent bumps 4 and mounted on the element mounting substrate 2. A connection height 4a of the bump 4 when the BGA is mounted on the mounting substrate 5 by controlling the thickness of the thermosetting resin 6 by dropping the surface of the surface 2a by potting. To adjust.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing technique, and more particularly, to a semiconductor integrated circuit device for improving the life of a bump connection when connecting an element mounting substrate and a mounting substrate via bumps, and a method of manufacturing the same.

[0002]

2. Description of the Related Art The technology described below studies the present invention,
Upon completion, they were examined by the inventor, and the outline is as follows.

As a semiconductor integrated circuit device corresponding to the increase in the number of pins, a BGA (Ball Grid Array) in which an element mounting board on which a semiconductor element is mounted is mounted on a mounting board (also referred to as a printed wiring board) via bumps serving as ball electrodes. )It has been known.

Some of the above-mentioned BGAs have a device mounting substrate made of ceramic or a device mounted with a heat radiating plate. Since these semiconductor integrated circuit devices increase in weight, they are mounted on a mounting substrate via bumps. At this time, the bump may be crushed by its own weight.

Here, as a measure against bump crushing, there is a method in which a high melting point bump is attached to a bump near the center of an element mounting substrate, and a low melting point bump is attached to an outer peripheral portion of the element mounting substrate.

The structure of the BGA and its mounting technology are described in, for example, Industrial Research Institute, Inc., September 1, 1994.
Published in “Electronic Materials September Issue”, pp. 49-54.

[0007]

However, in the above-mentioned technology, when a BGA is mounted on a mounting board and reflow is performed, the coefficient of thermal expansion between the BGA element mounting board and the mounting board on which the BGA is mounted is different. Then, stress is applied to the bumps, which causes a problem that the connection life of the bumps is shortened.

[0008] In particular, in a BGA having a large weight due to the provision of a heat sink or the like, when mounting on a mounting board, the BGA
The bumps are crushed by the weight of the GA, and the connection height of the bumps is reduced.

As a result, the stress applied to the bump is increased, and the connection life of the bump is shortened as described above.

[0010] In addition, there is also a problem that the bumps are crushed and the bumps come into contact with other adjacent bumps and are electrically short-circuited.

An object of the present invention is to provide a semiconductor integrated circuit device which improves the connection life of bumps and a method of manufacturing the same.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0013]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, the semiconductor integrated circuit device of the present invention is mounted on a mounting substrate via bumps.
An element mounting board on which a semiconductor element is mounted, and an insulating layer formed at a thickness smaller than the diameter of the bump and interposed between adjacent bumps and provided on a bump mounting surface of the element mounting board; The connection height of the bump when the semiconductor integrated circuit device is mounted on the mounting substrate can be adjusted by the thickness of the insulating layer.

[0015] As a result, at the time of reflow, only the protruding portion of the bump protruding from the insulating layer is crushed. Therefore, by controlling the thickness of the insulating layer, the bump of the semiconductor integrated circuit device when mounted on the mounting board is controlled. The connection height can be adjusted.

As a result, even in a semiconductor integrated circuit device having a relatively large own weight, it is possible to prevent the bumps from being crushed and to reduce the stress applied to the bumps.

As a result, the connection life of the bump can be improved, and the connection failure of the bump can be reduced.

Furthermore, the semiconductor integrated circuit device of the present invention
The insulating layer is formed of a material having a thermal expansion coefficient substantially equal to that of the bump.

Further, in the method of manufacturing a semiconductor integrated circuit device according to the present invention, a step of preparing an element mounting board on which a semiconductor element is mounted, a step of attaching a bump to a bump mounting surface of the element mounting board, Providing an insulating layer formed to a thickness smaller than the diameter and interposed between the adjacent bumps on the bump mounting surface of the element mounting substrate; and setting the connection height of the bump to a predetermined height by the thickness of the insulating layer. And mounting the semiconductor integrated circuit device on the mounting substrate by electrically connecting the element mounting substrate and the mounting substrate via the bumps.

Further, in the method of manufacturing a semiconductor integrated circuit device according to the present invention, when the insulating layer is provided on the bump mounting surface of the element mounting substrate, after the bump is mounted on the bump mounting surface, the thermosetting resin is potted. By supplying to the bump mounting surface, the periphery of the bump is filled with the thermosetting resin, and then, the thermosetting resin is cured by heating to form the insulating layer.

In the method of manufacturing a semiconductor integrated circuit device according to the present invention, when the thermosetting resin is supplied to the bump mounting surface by the potting, a predetermined amount of the thermosetting resin is supplied. By doing so, the thermosetting resin is formed to a predetermined thickness when the thermosetting resin is cured by heating.

[0022]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a partially cutaway front view showing an embodiment of a structure of a semiconductor integrated circuit device according to the present invention, and FIG. 2 is an example of an embodiment of a method of manufacturing a semiconductor integrated circuit device according to the present invention. (A) is a front view, (b),
(C) is a partially cutaway front view, and FIG. 3 is a partially cutaway front view showing an example of an embodiment of a semiconductor integrated circuit device mounted on a mounting board according to the present invention.

The semiconductor integrated circuit device according to the present embodiment is mounted on a mounting substrate 5 such as a printed wiring board via bumps 4 which are ball electrodes formed by solder or the like. A BGA will be described as an integrated circuit device.

The structure of the BGA includes an element mounting substrate 2 (also referred to as a package substrate) on which a semiconductor chip 1 as a semiconductor element is mounted, a sealing portion 3 for sealing the semiconductor chip 1 and its peripheral portion, and a bump 4 And a thermosetting resin 6 which is an insulating layer provided on the bump mounting surface 2a of the element mounting substrate 2 and which is interposed between the adjacent bumps 4 and has a thickness slightly smaller than the diameter of the thermosetting resin. By controlling the thickness of the resin 6, the connection height 4a of the bump 4 when the BGA is mounted on the mounting substrate 5 can be adjusted.

Further, the thermosetting resin 6 which is an insulating layer provided on the BGA of this embodiment is formed into a paste by potting using a dispenser 7 or the like after the bumps 4 are mounted on the element mounting substrate 2. It is supplied (coated) to the bump mounting surface 2 a of the element mounting substrate 2, and is formed by filling the periphery of each bump 4, and when coating, the coating thickness is controlled and applied. .

That is, when forming the insulating layer on the bump mounting surface 2a of the element mounting substrate 2, the thickness is controlled to form the insulating layer.

In this embodiment, a case where the thermosetting resin 6 as an insulating layer is formed of a material having a thermal expansion coefficient substantially equal to that of the bump 4 will be described.

For example, the bump 4 in the present embodiment
Is made of 63% SnPb solder (however, it may be made of gold other than solder). At this time, the thermal expansion coefficient of the solder is about 25 × 10
^-6 (K ^-1 ), the thermosetting resin 6 has a coefficient of thermal expansion of, for example, about 22 × 10 ^-6 (K ^-1 ) or about 21 × 10 ^-6 (K ^-1 ). Use about

Further, the diameter of the bump 4 is, for example, 0.6.
mm, the thermosetting resin 6 is formed to have a slightly smaller thickness, that is, about 0.5 mm.

In this case, 0.6 mm-0.5 mm = 0.1 mm
Is the amount of protrusion of the bump 4 protruding from the thermosetting resin 6, and the protruding protrusion 4 b is melted during reflow when the BGA is mounted on the mounting board 5 and connected to the electrode on the mounting board 5. I do.

The element mounting substrate 2 is formed of a relatively heavy alumina ceramic or the like, and its thickness is, for example, about 2 mm.

Further, the semiconductor chip 1 is mounted (die-bonded) on the surface 2b of the element mounting substrate 2 opposite to the bump mounting surface 2a, and the corresponding electrodes of the semiconductor chip 1 and the element mounting substrate 2 are bonded to each other. Wire 8
Are electrically connected by

The bump mounting surface 2a of the element mounting substrate 2
In this example, bump mounting electrodes are arranged in a grid pattern at a pitch of 1.27 mm, for example, and each bump 4 is attached to this bump mounting electrode.

The sealing portion 3 is formed by sealing the semiconductor chip 1, the bonding wires 8 and the peripheral portion on the surface 2b of the element mounting board 2, and is formed of, for example, an epoxy potting resin. I have.

A method for manufacturing the semiconductor integrated circuit device according to the present embodiment will be described.

In this embodiment, the case where the semiconductor integrated circuit device is a BGA will be described.

The method of manufacturing a semiconductor integrated circuit device according to the present embodiment is a step of manufacturing the BGA and mounting the BGA on the mounting board 5.

First, an element mounting substrate 2 made of alumina ceramic or the like and having a semiconductor chip 1 as a semiconductor element mounted thereon is prepared.

Further, the bump mounting surface 2 of the element mounting substrate 2
A bump 4 of 63% SnPb is temporarily fixed to the bump-mounted electrode formed in a using a predetermined flux.

Then, by passing through a reflow furnace at about 230 ° C. and heating, as shown in FIG.
The bump 4 is fixed.

Note that the height of the bump 4 at this time is almost 0.
6 mm.

Further, a thermosetting resin 6 which is formed to a thickness slightly smaller than the diameter of the bump 4 and is an insulating layer interposed between the adjacent bumps 4 is provided on the bump mounting surface 2 a of the element mounting substrate 2.

Here, in the present embodiment, the thermosetting resin 6 is formed of a material having a thermal expansion coefficient substantially equal to that of the bump 4.

That is, the material of the bump 4 is 63% SnP
b, and the coefficient of thermal expansion of this solder is about 25 ×
Since it is 10 ^-6 (K ^-1), the thermosetting resin 6 is its thermal expansion coefficient, for example, about ^{22 × 10 -6 (K -1)} , or about 21 × 10 ^-6 (K ^{- 1} ) Use about epoxy resin.

In the present embodiment, when the thermosetting resin 6 is supplied to the bump mounting surface 2a of the element mounting substrate 2, the bump 4 is mounted on the bump mounting electrode on the bump mounting surface 2a. Using the dispenser 7 shown in FIG.
Thereby, potting, that is, the paste-like thermosetting resin 6 is dropped and supplied to the bump mounting surface 2a.

Then, the bumps 4 are formed by the thermosetting resin 6.
And then heating to 150 ° C. to cure the thermosetting resin 6 to form the insulating layer.

When the thermosetting resin 6 is dropped (potted) by the dispenser 7, the thickness of the thermosetting resin 6 on the bump mounting surface 2a is controlled to be 0.5 mm.

This is achieved by supplying a predetermined amount of the thermosetting resin 6 and heating the thermosetting resin 6.
Is cured to form a thermosetting resin 6 to a predetermined thickness (0.5 mm in the present embodiment).

That is, the coating thickness after potting is set to 0.5 m by an experiment or a simulation in advance.
m, the supply amount of the thermosetting resin 6 is determined in advance,
Thus, a predetermined amount of the thermosetting resin 6 is supplied to one BGA.

As a result, as shown in FIG. 1 or FIG. 2C, the periphery of each bump 4 is filled with the thermosetting resin 6 and the protruding portion 4b at the tip of each bump 4 is set to 0.1.
A BGA protruding from the thermosetting resin 6 by about mm can be manufactured.

Thereafter, the connection height 4a of the bump 4 is adjusted to a predetermined height (about 0.5 mm in the present embodiment) by the thickness of the thermosetting resin 6, and the element mounting board is The BGA is mounted on the mounting board 5 by electrically connecting the mounting board 2 to the mounting board 5.

Here, when mounting the BGA on the mounting board 5, solder paste is printed on the electrodes on the mounting board 5 in advance, and the solder paste is aligned with the bumps 4 of the BGA. It is temporarily fixed by pressing against the electrodes on the mounting substrate 5.

Subsequently, this is carried into a reflow furnace, and the bump 4 is melted.

As a result, as shown in FIG.
A can be mounted on the mounting board 5.

When the bumps 4 melt, the bumps 4 are slightly crushed by the weight of the BGA (the protrusions 4 of the bumps 4).
b is crushed), but since the thermosetting resin 6 is filled and fixed around the bump 4, the bump 4 does not sink below the thickness of the thermosetting resin 6 (in the present embodiment,
The diameter of the bump 4 is reduced from about 0.6 mm to about 0.5 mm).

According to the semiconductor integrated circuit device of this embodiment and the method of manufacturing the same, the following operation and effect can be obtained.

That is, by having the thermosetting resin 6 (insulating layer) provided on the bump mounting surface 2 a of the element mounting substrate 2 with a thickness smaller than the diameter of the bump 4, the heat of the bump 4 can be reduced during reflow. Since only the protruding portion 4b protruding from the curable resin 6 is crushed, the connection height 4a of the bump 4 when the BGA is mounted on the mounting board 5 is adjusted by controlling the thickness of the thermosetting resin 6. Can be.

As a result, even if the BGA has a relatively large own weight, it is possible to prevent the bumps 4 from being crushed, so that the stress applied to the bumps 4 can be reduced.

As a result, the connection life of the bumps 4 can be improved, and the connection failure of the bumps 4 can be reduced.

Further, the thermosetting resin 6 is applied to the element mounting substrate 2
By interposing between the adjacent bumps 4 on the bump mounting surface 2a, an electrical short circuit between the adjacent bumps 4 can be prevented.

As a result, the connection reliability of the bump 4 can be improved.

In addition, the thermosetting resin 6 is adjacent to the bump 4
Since the electrical short circuit between the bumps 4 can be prevented by being interposed therebetween, the bumps 4 having a relatively large diameter can be used.

As a result, the connection height 4a of the bump 4 can be increased, and the amount of distortion generated in the bump 4 can be reduced. As a result, the connection life of the bump 4 can be extended.

Further, since the thermosetting resin 6 provided on the BGA is formed of a material (epoxy resin in the present embodiment) having a thermal expansion coefficient substantially equal to that of the bump 4, the bump can be formed at the time of reflow. If 4 is deformed,
Since the thermosetting resin 6 also deforms following this, the stress applied to the bumps 4 can be reduced.

As a result, the connection failure of the bump 4 can be reduced.

The bump mounting surface 2a of the element mounting substrate 2
When the thermosetting resin 6 is provided on the bump mounting surface 2a, the thermosetting resin 6 is supplied to the bump mounting surface 2a by potting.
After filling the periphery, the thermosetting resin 6 can be easily formed by thermosetting.

Further, when supplying the thermosetting resin 6,
By supplying a predetermined amount of the thermosetting resin 6, the thermosetting resin 6 can be formed to have a substantially uniform predetermined thickness over the entire surface when the thermosetting resin 6 is thermoset.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the embodiments of the invention, and does not depart from the gist of the invention. It is needless to say that various changes can be made.

For example, in the above embodiment, the case where the insulating layer is formed of the thermosetting resin 6 has been described. However, as in the other embodiment shown in FIG. It may be formed by a thin plate member 9 having a small hole 9a.

That is, in the above embodiment, when the thin plate member 9 is used as the insulating layer, for example, when the thickness is 0.5
An insulating thin plate member 9 made of an epoxy resin and having heat resistance of 1 mm is used.

Here, in the BGA shown in FIG. 4, each bump 4 is arranged in a plurality of small holes 9 a of the thin plate member 9, and each bump 4 is surrounded by the thin plate member 9.

That is, when manufacturing the BGA, after mounting the bumps 4 on the element mounting board 2, the thin plate member 9 is attached to the element mounting board 2 while arranging the bumps 4 in the small holes 9 a.
Is provided (joined) on the bump mounting surface 2a.

Thus, since the insulating layer is formed by the thin plate member 9, the thickness can be easily controlled, and the thickness of the thin plate member 9 as the insulating layer can be controlled with high accuracy.

As a result, the connection height 4a of the bump 4 can be adjusted with high accuracy.

In the above embodiment, the case where the element mounting substrate 2 is formed of alumina ceramic or the like has been described. However, the element mounting substrate 2 may be formed of a material other than alumina ceramic. Good.

Further, the BGA may be provided with a heat sink or the like.

In the above embodiment, the case where the thermosetting resin 6 is applied by potting using the dispenser 7 has been described, but the thermosetting resin 6 is applied to the bump mounting surface 2 a of the element mounting substrate 2. At the time of application, as long as the thickness of the thermosetting resin 6 can be controlled, it may be applied by other application means other than potting.

In the above embodiment, the case where the electrodes of the semiconductor chip 1 and the electrodes of the element mounting substrate 2 are electrically connected by the bonding wires 8 has been described. If the element mounting substrate 2 on which the semiconductor chip 1 is mounted and the mounting substrate 5 on which the semiconductor chip 1 is mounted are connected via the bumps 4, the connection of the semiconductor chip 1 is performed as in a flip chip connection. The semiconductor chip 1 and the element mounting substrate 2 may be connected by small bumps.

[0080]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). By having an insulating layer provided on the bump mounting surface of the element mounting board with a thickness smaller than the diameter of the bump, the bump when the semiconductor integrated circuit device is mounted on the mounting board is controlled by controlling the thickness of the insulating layer. Connection height can be adjusted. This can prevent the bumps from being crushed, so that the stress applied to the bumps can be reduced. As a result, the connection life of the bump can be improved, and the connection failure of the bump can be reduced.

(2). Since the insulating layer is interposed between the adjacent bumps on the bump mounting surface of the element mounting board, it is possible to prevent an electrical short between the adjacent bumps. Thereby, the connection reliability of the bump can be improved.

(3). Since the insulating layer provided on the semiconductor integrated circuit device is formed of a material having a thermal expansion coefficient substantially equal to that of the bump, when the bump is deformed during reflow, the insulating layer also deforms following the deformation. ,
The stress applied to the bump can be reduced. As a result, bump connection failures can be reduced.

(4). When supplying the thermosetting resin, by supplying a predetermined amount of the thermosetting resin, when the thermosetting resin is thermoset, the entire surface is formed to a substantially uniform predetermined thickness. be able to.

[Brief description of the drawings]

FIG. 1 is a partially cutaway front view showing an example of an embodiment of the structure of a semiconductor integrated circuit device according to the present invention.

FIGS. 2A, 2B, and 2C are diagrams illustrating an example of an embodiment of a method of manufacturing a semiconductor integrated circuit device according to the present invention, in which FIG. 2A is a front view, and FIGS. (C) is a front view partially broken away.

FIG. 3 is a partially cutaway front view showing an example of an embodiment of a semiconductor integrated circuit device mounted on a mounting board according to the present invention;

FIG. 4 is a partially cutaway front view showing a state of mounting a semiconductor integrated circuit device according to another embodiment of the present invention on a mounting substrate.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor chip (semiconductor element) 2 Element mounting board 2a Bump mounting surface 2b Surface 3 Sealing part 4 Bump 4a Connection height 4b Projection 5 Mounting board 6 Thermosetting resin (insulating layer) 7 Dispenser 8 Bonding wire 9 Thin plate member (Insulating layer) 9a Small hole

 ──────────────────────────────────────────────────の Continuing from the front page (72) Inventor Taku Kikuchi 2326 Imai, Ome-shi, Tokyo Inside the Hitachi, Ltd.Device Development Center (72) Inventor Takashi Miwa 2326 Imai, Ome-shi, Tokyo Device Development Center, Hitachi, Ltd. Inside

Claims (9)

[Claims] 1. A semiconductor integrated circuit device mounted on a mounting substrate via a bump, comprising: an element mounting substrate on which a semiconductor element is mounted; And an insulating layer provided on the bump mounting surface of the element mounting substrate, and a connection height of the bump when the semiconductor integrated circuit device is mounted on the mounting substrate by a thickness of the insulating layer. A semiconductor integrated circuit device capable of adjusting the height. 2. The semiconductor integrated circuit device according to claim 1, wherein the insulating layer is supplied to a bump mounting surface of the element mounting substrate after the bump is mounted on the element mounting substrate. A semiconductor integrated circuit device formed by filling the periphery of the bump with a conductive resin. 3. The semiconductor integrated circuit device according to claim 1, wherein the insulating layer is formed by a thin plate member having a plurality of small holes, and the bumps are arranged in the plurality of small holes. A semiconductor integrated circuit device, wherein each bump is surrounded by a member. 4. The semiconductor integrated circuit device according to claim 1, wherein said insulating layer is formed of a material having a thermal expansion coefficient substantially equal to that of said bump. . 5. A method of manufacturing a semiconductor integrated circuit device mounted on a mounting substrate via a bump, comprising: preparing an element mounting substrate on which a semiconductor element is mounted; A step of mounting a bump; a step of forming an insulating layer formed to a thickness smaller than the diameter of the bump and interposed between adjacent bumps on a bump mounting surface of the element mounting board; Adjusting the connection height of the bumps to a predetermined height, electrically connecting the element mounting board and the mounting board via the bumps, and mounting the semiconductor integrated circuit device on the mounting board; A method for manufacturing a semiconductor integrated circuit device, comprising: 6. The method for manufacturing a semiconductor integrated circuit device according to claim 5, wherein, when the insulating layer is provided on the bump mounting surface of the element mounting substrate, the bump is mounted on the bump mounting surface and then heat is applied by potting. By supplying a curable resin to the bump mounting surface, filling the periphery of the bumps with the thermosetting resin, and then heating and curing the thermosetting resin to form the insulating layer. A method for manufacturing a semiconductor integrated circuit device. 7. The method for manufacturing a semiconductor integrated circuit device according to claim 6, wherein when the thermosetting resin is supplied to the bump mounting surface by the potting, a predetermined amount of the thermosetting resin is set. By supplying a conductive resin,
A method for manufacturing a semiconductor integrated circuit device, wherein the thermosetting resin is formed to a predetermined thickness when the thermosetting resin is cured by heating. 8. The method for manufacturing a semiconductor integrated circuit device according to claim 5, wherein the insulating layer has a plurality of small holes as the insulating layer when the insulating layer is provided on the bump mounting surface of the element mounting substrate. A method of manufacturing a semiconductor integrated circuit device, comprising: using a member, arranging bumps in the plurality of small holes, and providing the thin plate member on a bump mounting surface of the element mounting substrate. 9. The method of manufacturing a semiconductor integrated circuit device according to claim 5, wherein the insulating layer is formed of a material having a thermal expansion coefficient substantially equal to that of the bump. A method for manufacturing an integrated circuit device.