JPH0989943A - Capacitance variation detecting circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To precisely detect the variation in capacitance by applying a voltage pulse having a reversed phase to one end of a pair of variable capacitance capacitors, by connecting an inversion input of an operational amplifier to the other end, and by connecting the one end and the other end of the detecting capacitor to the inversion input and output of the amplifier connected through a switch, through respective switches. SOLUTION: Variable capacitance capacitors 101, 102 are connected at their one end to a reverse phase output of pulse oscillators 103, 104, and at their other end to an inversion input of an operational amplifier through a switch 105. A a capacitor 107 is connected at its one end to an inversion input of the operational amplifier 106 through a switch 109, and at the other end to the output of the operational amplifier 106 through a switch 110, and to the inversion input of the operational amplifier 106 through a switch 111. A switch 112 is connected between the inversion input and the output of the operational amplifier 106. Accordingly, a voltage is applied to the inversion input of the operational amplifier 106, and the charge depending upon the voltage is accumulated in the capacitor 107, thereby it is possible to output from the output of the amplifier 106.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitance change detection circuit that converts a change in capacitance into a voltage value and outputs the voltage value.

[0002]

2. Description of the Related Art One configuration example of a conventional capacitance change detection circuit will be described with reference to FIG.

In the figure, a variable capacitor 60
Each of the capacitors 1 and 602 is configured such that its capacitance changes due to a change in the lines of electric force when there is a pressure from the outside. As the variable capacitors 601 and 602, those having the same capacitance when no pressure is applied are used.

When the voltage pulse output from the pulse oscillator 603 is input from one end, the variable capacitor 601 outputs a voltage pulse having a voltage value corresponding to the capacitance of the variable capacitor 601 from the other end. Then, the output voltage pulse is applied to the non-inverting input terminal of the operational amplifier 606 via the analog switch 605.

On the other hand, the variable capacitor 602 has a voltage pulse (pulse oscillator 6) output from the pulse oscillator 604.
03, which has the opposite phase to the voltage pulse output by 03, is output from the other end of the voltage pulse having a voltage value corresponding to the capacitance of the variable capacitor 602. Then, the output voltage pulse is applied to the non-inverting input terminal of the operational amplifier 606 via the analog switch 605.

The inverting input terminal of the operational amplifier 606 has a resistance element 607 (having a resistance value R ₁ ) and a reference power source 60.
It is grounded via 8 and is connected to the output terminal of the operational amplifier 606 via a resistance element 609 (having a resistance value of R ₂ ). This constitutes a non-inverting amplifier circuit, and the output voltage of the operational amplifier 606 is gain (1 + R ₂ / R _{1) based on} the potential difference between the voltage pulse input to the non-inverting input terminal and the reference voltage V _ref input to the inverting input terminal. ) Will be the value amplified.

The non-inverting input terminal of the operational amplifier 606 has a switch 610 and a resistance element 611 (having a resistance value of R
₃ ) and the reference power source 608. Accordingly, by closing the switch 610 when the noise of the voltage pulse input to the non-inverting input terminal of the operational amplifier 606 is large, the input impedance can be lowered and the noise can be reduced.

The adder circuit 612 outputs a value obtained by integrating the output voltage of the operational amplifier 606. Further, the sample hold circuit 613 stores the peak of the integrated value input from the adding circuit 612.

In such a capacitance change detection circuit, when neither of the variable capacitors 601 and 602 is pressed, the voltage applied to the inverting input terminal of the operational amplifier 606 is configured to match the reference voltage V _ref .
Therefore, the output voltage at this time is zero volt.

On the other hand, variable capacitors 601 and 602
When either of them is pressed and the capacitances do not match,
A voltage is applied to the non-inverting input terminal. Then, a voltage proportional to this voltage is output from the operational amplifier 606, added by the adding circuit 612, and then the sample hold circuit 6 is added.
Taken out from 13.

[0011]

In the capacitance change detection circuit shown in FIG. 6, the input impedance of the operational amplifier 606 is set to be substantially infinite in order to obtain a rectangular wave as the output of the operational amplifier 606. are doing. However, when the input impedance is set to infinity, noise resistance is deteriorated, an error becomes large, and the accuracy of capacitance change detection deteriorates. Also, in general, the variable capacitors 601, 602
Since the amount of change in capacitance of is very small, the signal component obtained by this change in capacitance is also very small,
Therefore, it is necessary to maximize the gain of the operational amplifier 606, but if the gain is increased, noise is also amplified.

On the other hand, it is possible to improve the noise resistance by setting the input impedance of the operational amplifier 606 low. However, if the input impedance is lowered, the output waveform of the operational amplifier 606 becomes a differential waveform with a time constant τ = (C ₁ · R ₃ ) ⁻¹ or (C ₂ · R ₃ ) ⁻¹ , that is, an impulse with a fast cycle. Will end up. Therefore, depending on the frequency characteristics of the operational amplifier 606, it may not be possible to extract the signal component due to the capacitance change, which may rather deteriorate the accuracy in detecting the capacitance change.

For this reason, in the capacitance change detection circuit shown in FIG. 6, the switch 610 is provided to reduce the input impedance only when the noise is large, but this is not an essential solution and a rectangular wave is always obtained. There has been a demand for a technique for obtaining a capacitance change detection circuit that is capable of achieving excellent noise resistance.

Further, in the conventional capacitance change detection circuit shown in FIG. 6, an offset voltage is generated in the operational amplifier 606, which causes the variable capacitance capacitors 601 and 602.
There is also a drawback that the output of the operational amplifier 606 does not become zero even when is not pressed (when the amount of change in electrostatic capacitance is zero). This defect also causes a large error in detecting the capacitance change, which causes deterioration in accuracy.

Further, the conventional capacitance change detection circuit requires the adder circuit 612 and the sample hold circuit 613 as shown in FIG. 6, so that there is a drawback that the circuit scale becomes large.

The present invention has been made in view of the above-mentioned drawbacks of the prior art, and provides a capacitance change detection circuit capable of detecting a change in electrostatic capacitance with high accuracy and having a simple circuit configuration. The purpose is to

[0017]

[Means for Solving the Problems]

(1) A capacitance change detection circuit according to a first aspect of the present invention includes a first variable capacitance capacitor having a first voltage pulse applied to one end, and a second voltage having an opposite phase to the first voltage pulse at one end. A second variable capacitor to which a pulse is applied and an inverting input terminal are connected to the other end of the first variable capacitor and the other end of the second variable capacitor, and the non-inverting input terminal is a reference. An operational amplifier connected to a power supply; a first detection capacitor provided between the inverting input terminal and the output terminal of the operational amplifier;
A first switch element provided between one end of the detection capacitor and the inverting input terminal of the operational amplifier, and between one end of the first detection capacitor and the output terminal of the operational amplifier. A second switch element,
A third switch element provided between the other end of the first detection capacitor and the inverting input terminal of the operational amplifier, the other end of the first detection capacitor and the output terminal of the operational amplifier And a fifth switch element provided between the inverting input terminal and the output terminal of the operational amplifier. (2) A capacitance change detection circuit according to a second aspect of the present invention includes a first variable capacitance capacitor having a first voltage pulse applied to one end, and a second voltage having a phase opposite to the first voltage pulse at one end. A second variable capacitor to which a pulse is applied and an inverting input terminal are connected to the other end of the first variable capacitor and the other end of the second variable capacitor via a first switch element, and A first operational amplifier having a non-inverting input terminal connected to a reference power supply, and a first operational amplifier provided between the inverting input terminal and the output terminal of the first operational amplifier.
A first operational amplifier circuit having a detecting capacitor and an inverting input terminal connected to the other end of the first variable capacitance capacitor and the other end of the second variable capacitance capacitor via a second switch element. A second operational amplifier having a non-inverting input terminal connected to a reference power source, and a second detection capacitor provided between the inverting input terminal and the output terminal of the second operational amplifier, And a control means for closing only the first switch element when the first voltage pulse is at high level and closing only the second switch element when the second voltage pulse is at high level. , Is provided.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a capacitance change detection circuit according to the present invention will be described below with reference to the drawings.

(First Embodiment) A capacitance change detection circuit according to a first embodiment will be described with reference to FIGS.

FIG. 1 is an electric circuit diagram showing the configuration of the capacitance change detection circuit according to this embodiment.

In the figure, the variable capacitor 10
Each of the capacitors 1 and 102 is configured such that the capacitance changes due to a change in the line of electric force when pressed from the outside, for example.

The variable capacitor 101 has one end connected to the output terminal of the pulse oscillator 103 and the other end connected to the inverting input terminal of the operational amplifier 106 via the analog switch 105. On the other hand, the variable capacitor 102
Has one end connected to the output terminal of the pulse oscillator 104,
The other end of the operational amplifier 10 via the analog switch 105
6 connected to the inverting input terminal. Here, in the present embodiment, as the variable capacitors 101 and 102,
Use those with the same characteristics.

One end of the capacitor 107 is connected to the inverting input terminal of the operational amplifier 106 via the analog switch 108 and to the output terminal of the operational amplifier 106 via the analog switch 109. Also,
The other end of the capacitor 107 is connected to the analog switch 11
0 is connected to the output terminal of the operational amplifier 106, and the operational amplifier 1 is connected via the analog switch 111.
06 inverting input terminal.

The analog switch 112 is the operational amplifier 1
06 is connected between the inverting input terminal and the output terminal.

The inverting input terminal of the operational amplifier 106 has a capacitor 114 via an analog switch 113.
Is connected to one end. Also, the analog switch 11
3 and the capacitor 114 is connected to the capacitor 115
Grounded. Further, both ends of the capacitor 114 are connected to one end of a reference power supply 118 via analog switches 116 and 117, respectively. The other end of the reference power source 118 is grounded.

On the other hand, the non-inverting input terminal of the operational amplifier 106 is connected to the reference power source 118 via the analog switch 117.
Is connected to

Next, the operation of the capacitance change detection circuit shown in FIG. 1 will be described with reference to the timing chart of FIG. Note that the analog switches 108 to 112, 1 of FIG.
16, 117, the high level indicates the closed state, and the low level indicates the open state.

As shown in FIG. 2, the pulse oscillator 103
Outputs a voltage pulse V _i1 . Further, the pulse oscillator 104 has a voltage pulse V _{i2 having a} phase opposite to that of the voltage pulse V _i1.
Is output. Here, the relationship between the pulse width τ of the voltage pulses V _i1 and V _i2 and the repetition period T is T = 2τ.

When detecting a capacitance change, first, the analog switch 105 is closed. Then, the analog switches 113 and 117 are closed and the analog switch 116 is opened. As a result, the reference voltage V _ref generated by the reference power supply 118 is applied to the non-inverting input terminal of the operational amplifier 106. Further, since the capacitor 114 is interposed between the inverting input terminal and the non-inverting input terminal of the operational amplifier 106, the potential of the inverting input terminal and the potential of the non-inverting input terminal are made to coincide with each other, and the offset voltage is made zero. (See arrow A in FIG. 2).

The analog switches 108 and 110 are closed in synchronization with the rising edge of the voltage pulse V _i1 (falling _edge of the voltage pulse V _i2 ) and opened when the time τ / 2 elapses. Further, the analog switches 109 and 111 are closed in synchronization with the falling edge of the voltage pulse V _i1 (the rising _edge of the voltage pulse V _i2 ) and the time τ /
Opens after 2 passes. In addition, the analog switch 112
First opens in synchronization with the rising timing or the falling timing of the voltage pulses V _i1 and V _i2 , and the time τ /
Repeat the opening and closing every 2 times. That is, the analog switch 112 is the analog switch 108, 110.
Alternatively, when one of the analog switches 109 and 111 is closed, it is opened, and when both the analog switches 108 and 110 and the analog switches 109 and 111 are opened, they are closed.

Here, the variable capacitors 101, 10
When both 2 are not pressed, the input voltage V _n at the inverting input terminal and the input voltage V _{ref at the} non-inverting input terminal match. Therefore, since the output voltage of the operational amplifier 106 is zero volt, no charge is stored in the capacitor 107. According to the present embodiment, the analog switches 108 and 110 and the analog switches 109 and 111 are alternately opened and closed at this time as well, so that the charges accumulated in the parasitic capacitances of these analog switches 108 to 111 can be reduced. You can

On the other hand, when the variable capacitor 101 or the variable capacitor 102 is pressed, both capacitors 10
When the electrostatic capacitances C ₁ and C _{2 of 1} , 102 satisfy C ₁ <C ₂ , the operation of the capacitance change detection circuit is as follows.

First, when the voltage pulse V _i1 is at the high level and the voltage pulse V _i2 is at the low level, V _n <V _ref, and therefore the differential voltage V _ref -V _n of the operational amplifier 106 becomes a positive value. Therefore, the output voltage Vout of the operational amplifier 106 has a positive value (see arrow B in FIG. 2). At this time, the analog switch 108,
Since 110 is turned on, charges are accumulated in the capacitor 107.

Next, the voltage pulses V _i1 and V _i2 output from the pulse oscillators 103 and 104 are inverted to _generate the voltage pulse V _i .
If _i1 is the voltage pulse V _i2 becomes a high level at a low level, since the V _n> V _ref, differential voltage V _ref -V _n of the operational amplifier 106 is a negative value, therefore, the output voltage Vout of the operational amplifier 106 Is a negative value (Fig. 2
Arrow C). At this time, the analog switch 1
08 and 110 are turned off, and analog switches 109 and 11
1 turns on. Therefore, of both terminals of the capacitor 107, the terminal which was connected to the inverting input terminal by the analog switch 108 is connected to the output terminal by the analog switch 109, and is connected to the output terminal by the analog switch 110. This terminal is connected to the inverting input terminal by the analog switch 111, and the polarity of the capacitor 107 is inverted.
As a result, the charge accumulated in the capacitor 107 by the negative output voltage Vout of the operational amplifier 106 is added to the charge accumulated in the previous time (accumulation when the output voltage Vout of the operational amplifier 106 is positive). Therefore, the absolute value of the negative output voltage Vout of the operational amplifier 106 (see arrow C in FIG. 2) becomes larger than the absolute value of the positive output voltage Vout output last time (see arrow B in FIG. 2).

Similarly, the operational amplifier 106 is
Positive output and negative output are repeated. Then, the absolute value of the output voltage Vout increases every time the output voltage Vout is inverted, and reaches a predetermined saturation voltage.

The variable capacitor 101 or the variable capacitor 102 is pressed and both capacitors 10
The operation when the electrostatic capacitances C ₁ and C _{2 of 1} , 102 are C ₁ > C ₂ is almost the same as the case of C ₁ <C ₂ ,
When the voltage pulse V _i1 is high level and the voltage pulse V _i2 is low level (when the analog switches 108 and 110 are on), the output voltage Vout of the operational amplifier 106 becomes negative, and the voltage pulse V _i1 is low level and the voltage pulse V _i is low. _{When i2} is at a high level (when the analog switches 109 and 111 are on), the output voltage Vout of the operational amplifier 106 becomes positive.

When the detection of the change in capacitance is completed, finally, the analog switch 117 is opened and the analog switch 116 is closed. As a result, the polarity of the capacitor 114 can be reversed and the accumulated charge can be discharged. Note that both the analog switches 116 and 117 may be closed during this opening / closing operation, but the capacitor 115 can prevent the non-inverting input terminal of the operational amplifier 106 from entering a floating state. Further, the capacitor 115 also has an effect of stabilizing the reference voltage V _ref generated by the reference power supply 118.

As described above, according to this embodiment, when the capacitances of the variable capacitors 101 and 102 do not match and a voltage is applied to the inverting input terminal of the operational amplifier 106, the voltage is responded to. Charge the capacitor 107
Can be accumulated. And this capacitor 10
A voltage corresponding to the accumulated charge of 7 can be output from the output terminal of the operational amplifier 106.

Further, in this embodiment, the operational amplifier 106 is used.
The input impedance Z _in is given by Z _in = 1 / (C · A _v ). Here, C is the capacitance of the capacitor 107, and A _v is the voltage gain of the operational amplifier 106.
That is, according to this embodiment, it is not necessary to make the input impedance Z _in of the operational amplifier 106 infinite, and it can be freely changed by setting the electrostatic capacitance C and the voltage gain A _v .
Therefore, noise resistance can be improved. Further, the capacitor 107 and the analog switches 108 to 11
Since the output voltage Vout can be added by using 2, it is possible to eliminate the addition circuit and the sample hold circuit (see FIG. 6) which are conventionally required.

Furthermore, according to the present invention, the capacitor 11
By providing No. 4, the offset voltage can be eliminated.

(Second Embodiment) Next, a capacitance change detection circuit according to a second embodiment of the present invention will be described.

This embodiment is different from the above-described first embodiment in that a plurality of first variable capacitors and a plurality of second variable capacitors are provided.

FIG. 3 is an electric circuit diagram showing the configuration of the capacitance change detection circuit according to this embodiment.

In the figure, the components denoted by the same reference numerals as in FIG. 1 are the same as those in FIG.

The variable capacitors 301-1 and 3-3
One end of each of 01-2, ..., 301-n is connected to the output terminal of the pulse oscillator 303. Also,
These variable capacitors 301-1 and 301-2,
, 301-n are connected to the inverting input terminal of the operational amplifier 106 via analog switches 305-1, 305-2, ..., 305-n, respectively.

Similarly, the variable capacitors 302-1,
Each of 302-2, ..., 302-n has one end connected to the output terminal of the pulse oscillator 304. These variable capacitors 302-1, 302-2, ...
, 302-n are also connected to the inverting input terminal of the operational amplifier 106 via the analog switches 305-1, 305-2, ..., 305-n, respectively.

Also in this embodiment, the variable capacitors 301-1 to 301-n, 30 are used, as in the above-described fifteenth embodiment.
2-1 to 302-n having the same characteristics are used.

According to this structure, the analog switch 3 of the analog switches 305-1 to 305-n is
By closing only 05-1, the same operation as in the case of the first embodiment is performed, and the variable capacitors 301-1 and 30-3 are connected.
The capacitance change of the capacitor pair composed of 03-1 can be detected. Further, by closing only the analog switch 305-2, the variable capacitor 301-
It is possible to detect the capacitance change of the capacitor pair composed of 2, 303-2, and in the same manner, by closing only the analog switch 305-n, the capacitor pair composed of the variable capacity capacitors 301-n and 303-n. It is possible to detect the change in capacitance.

Even with the capacitance change detection circuit having such a configuration, it is not necessary to make the input impedance Z _in of the operational amplifier 106 infinite, so that noise resistance can be improved and an adder circuit and a sample hold circuit are unnecessary. The offset voltage can be eliminated.

(Third Embodiment) Next, a capacitance change detection circuit according to a third embodiment of the present invention will be described.

FIG. 4 is an electric circuit diagram showing the configuration of the capacitance change detection circuit according to this embodiment.

In FIG. 4, the components denoted by the same reference numerals as those in FIG. 1 or FIG. 3 are the same as those in these figures. In FIG. 4, the operational amplifier circuit 40
Although the internal configuration of 2 is omitted, the operational amplifier circuit 40
Exactly the same as 1.

In the capacitance change detection circuit according to this embodiment,
As described above, the two operational amplifier circuits 401 and 402 are provided.

The variable capacitors 301-1 and 3-3
01-2, ..., 301-n are analog switches 403-1, 403-2, ..., 403-n, respectively.
Is connected to the operational amplifier circuit 401 via
Analog switches 404-1, 404-2, ..., 4
04-n is connected to the operational amplifier circuit 402.

Similarly, the variable capacitors 302-1,
302-2, ..., 302-n are analog switches 403-1, 403-2 ,.
n is connected to the operational amplifier circuit 401, and analog switches 404-1, 404-2, ...
., 404-n to the operational amplifier circuit 402.

Next, the operation of the capacitance change detection circuit shown in FIG. 4 will be described with reference to the timing chart of FIG. In each analog switch in FIG. 5, a high level indicates a closed state and a low level indicates an open state.

In the capacitance change detection circuit according to the present embodiment, the variable capacitor 301-1 or the variable capacitor 302-1 is pressed and both capacitors 301-1.
When the electrostatic capacitances C ₁ and C _{2 of 1} , 302-1 satisfy C ₁ <C ₂ , the operation of the capacitance change detection circuit is as follows.

First, when the voltage pulse V _i1 is at a high level and the voltage pulse V _i2 is at a low level, the analog switch 40
3-1 is closed and the analog switch 404-1 is opened. As a result, in the operational amplifier circuit 401, V _n <V
_Since it becomes _ref , the differential voltage V _ref of the operational amplifier 106 −
V _n has a positive value. Therefore, this operational amplifier 10
The output voltage Vout1 of 6 has a positive value (see arrow A in FIG. 4).

Next, the voltage pulses V _i1 and V _i2 output from the pulse oscillators 103 and 104 are inverted to _generate the voltage pulse V _i .
_{When i1} is low and the voltage pulse V _i2 is high, V _n > V _ref . At this time, the analog switch 403-1 is opened and the analog switch 404-1 is closed. As a result, in the operational amplifier circuit 402, the differential voltage V _ref −V _n of the operational amplifier 106 becomes a negative value,
Therefore, the output voltage Vout2 of the operational amplifier 106 has a negative value (see arrow B in FIG. 4).

Thereafter, in the same manner, the operational amplifier circuit 40
1, 402 repeat positive output and negative output. Then, the absolute values of the output voltages Vout1 and Vout2 increase every time the positive / negative of the output voltage is inverted, and reach a predetermined saturation voltage.

The variable capacitor 101 or the variable capacitor 102 is pressed so that both capacitors 10
The operation when the electrostatic capacitances C ₁ and C _{2 of 1} , 102 are C ₁ > C ₂ is almost the same as the case of C ₁ <C ₂ ,
The positive and negative of the output voltages Vout1 and Vout2 are reversed.

As described above, according to the capacitance change detection circuit of this embodiment, the variable capacitance capacitor 301-
When the potential at the intersection of 1, 302-1 is positive, the electric charge can be accumulated in the capacitor 107 of the operational amplifier circuit 401, and when the potential at the intersection is negative, the operational amplifier circuit 40.
The charge can be stored in the second capacitor 107.
Then, the voltages Vout1 and Vout2 corresponding to the charges accumulated in the capacitors 107 are output. That is, the voltage difference between the voltages Vout1 and Vout2 in this embodiment corresponds to the output voltage Vout in the first embodiment.

As described above, in the present embodiment, it is not necessary to invert the polarity of the capacitor 107 in the operational amplifier circuits 401 and 402, and therefore the analog switch 108.
.About.112 (see FIG. 1) are unnecessary.

The input impedance Z of the operational amplifier 106 is also obtained by the capacitance change detection circuit having such a configuration.
_in the can improve because noise resistance need not be infinite, it is possible to eliminate the need for adding circuit and a sample hold circuit, and can be eliminated the offset voltage.

[0065]

As described in detail above, according to the present invention, it is possible to detect a change in capacitance with high accuracy,
Moreover, it is possible to provide a capacitance change detection circuit having a simple circuit configuration.

[Brief description of drawings]

FIG. 1 is an electric circuit diagram showing a configuration of a capacitance change detection circuit according to a first embodiment.

FIG. 2 is a timing chart for explaining the operation of the capacitance change detection circuit shown in FIG.

FIG. 3 is an electric circuit diagram showing a configuration of a capacitance change detection circuit according to a second embodiment.

FIG. 4 is an electric circuit diagram showing a configuration of a capacitance change detection circuit according to a third embodiment.

5 is a timing chart for explaining the operation of the capacitance change detection circuit shown in FIG.

FIG. 6 is an electric circuit diagram showing a configuration of a conventional capacitance change detection circuit.

[Explanation of symbols]

101,102 Variable capacitor 103,104 Pulse oscillator 105,108-113,116,117 Analog switch 106 Operational amplifier 107,114,115 Capacitor 118 Reference power supply

Claims (4)

[Claims] 1. A first voltage pulse applied to one end of a first voltage pulse.
A variable capacitor, a second variable capacitor to which a second voltage pulse having a phase opposite to that of the first voltage pulse is applied to one end, and an inverting input terminal having the other end of the first variable capacitor and Connected to the other end of the second variable capacitor,
In addition, an operational amplifier whose non-inverting input terminal is connected to a reference power source, a first detection capacitor provided between the inverting input terminal and the output terminal of the operational amplifier, and a first detection capacitor A first switch element provided between one end and the inverting input terminal of the operational amplifier, and a second switch provided between one end of the first detection capacitor and the output terminal of the operational amplifier. An element, a third switch element provided between the other end of the first detection capacitor and the inverting input terminal of the operational amplifier, the other end of the first detection capacitor and the operational amplifier A fourth switch element provided between the output terminal and the fourth switch element; and a fifth switch element provided between the inverting input terminal and the output terminal of the operational amplifier. Capacitance change detection circuit. 2. A second detection capacitor provided between the non-inverting input terminal and the inverting input terminal of the operational amplifier, and a third detecting capacitor provided between the inverting input terminal of the operational amplifier and the ground. Between the detection capacitor, a sixth switch element provided between one end of the second detection capacitor and the reference power supply, and between the other end of the second detection capacitor and the reference power supply. The capacitance change detection circuit according to claim 1, further comprising: a seventh switch element provided in. 3. A first voltage pulse applied to one end of a first voltage pulse.
A variable capacitor, a second variable capacitor to which a second voltage pulse having a phase opposite to that of the first voltage pulse is applied to one end, and an inverting input terminal having the other end of the first variable capacitor and A first operational amplifier connected to the other end of the second variable capacitor via a first switch element and having a non-inverting input terminal connected to a reference power source; and the inverting input terminal of the first operational amplifier. A first operational amplifier circuit having a first detection capacitor provided between the output terminal and an output terminal; and an inverting input terminal other than the other end of the first variable capacitor and the second variable capacitor. Between a second operational amplifier connected to the end through the second switch element and having a non-inverting input terminal connected to the reference power supply, and the inverting input terminal and the output terminal of the second operational amplifier A second operational amplifier circuit having a second detecting capacitor, and when the first voltage pulse is at a high level, only the first switch element is closed, and the second voltage pulse is at a high level. And a control means for closing only the second switch element at the time of, and a capacitance change detection circuit. 4. A third detection capacitor provided between the non-inverting input terminal and the inverting input terminal of the first operational amplifier, and between the inverting input terminal of the first operational amplifier and the ground. A fourth detecting capacitor, a third switch element provided between one end of the third detecting capacitor and the reference power source, and the other end of the third detecting capacitor. A fourth switch element provided between the reference power source, a fifth detection capacitor provided between the non-inverting input terminal and the inverting input terminal of the second operational amplifier, A sixth detecting capacitor provided between the inverting input terminal and the ground of the second operational amplifier; and a fifth switch element provided between one end of the fifth detecting capacitor and the reference power source. The fifth 6. The capacitance change detection circuit according to claim 3, further comprising: a sixth switch element provided between the other end of the detection capacitor and the reference power source.