JPH0964493A - Wiring structure of circuit board and its formation - Google Patents
Wiring structure of circuit board and its formationInfo
- Publication number
- JPH0964493A JPH0964493A JP24360295A JP24360295A JPH0964493A JP H0964493 A JPH0964493 A JP H0964493A JP 24360295 A JP24360295 A JP 24360295A JP 24360295 A JP24360295 A JP 24360295A JP H0964493 A JPH0964493 A JP H0964493A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- circuit
- circuit board
- insulating
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
Landscapes
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、回路配線とべ−ス
基板や絶縁層との間の密着力を高めると共に、回路配線
の金属が周囲の絶縁層に拡散する事態を防止することに
より、微細且つ高密度な回路配線を形成可能な回路基板
の配線構造とその形成法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention improves the adhesion between circuit wiring and a base substrate or an insulating layer, and prevents the metal of the circuit wiring from diffusing into the surrounding insulating layer. The present invention also relates to a wiring structure of a circuit board capable of forming high-density circuit wiring and a method for forming the same.
【0002】[0002]
【従来の技術】絶縁層とその絶縁層上に所要の回路配線
の形態で形成される回路導体層とにより高密度化の可能
な積層回路基板を製作する為には、図2に示すように、
適当なべ−ス基板又は絶縁層10上に先ず回路配線を形
成する金属を用いて、同図(1)の如く、スパッタリン
グ法又は無電解メッキ法によりメッキリ−ドとなるシ−
ド層11を一様に形成する。2. Description of the Related Art In order to manufacture a laminated circuit board which can be highly densified by an insulating layer and a circuit conductor layer formed on the insulating layer in the form of required circuit wiring, as shown in FIG. ,
First, using a metal for forming circuit wiring on a suitable base substrate or insulating layer 10, as shown in FIG. 1A, a sheet which becomes a plating lead by a sputtering method or an electroless plating method is formed.
The layer 11 is uniformly formed.
【0003】次に、同図(2)のように、シ−ド層11
上には回路配線を形成しない領域にフォトレジスト部材
でマスク層12を形成した後、シ−ド層11の露出領域
に対するメッキ付着手段で同図(3)の如く回路配線1
3を形成する。そこで、同図(4)のようにマスク層1
2を剥離処理後、露出したシ−ド層11の領域を除去す
る程度にエッチングを施すことにより、べ−ス基板又は
絶縁層10上には夫々シ−ド層部分11Aを介して所要
の回路配線13を設けることができる。Next, as shown in FIG. 2B, the seed layer 11 is formed.
After forming a mask layer 12 with a photoresist member in an area where no circuit wiring is to be formed, the circuit wiring 1 as shown in FIG.
3 is formed. Therefore, as shown in (4) of FIG.
After the peeling process of 2 is performed, etching is performed to the extent that the exposed region of the seed layer 11 is removed, so that a desired circuit is formed on the base substrate or the insulating layer 10 via the seed layer portion 11A. The wiring 13 can be provided.
【0004】更に、その回路配線13上に同図(5)に
示す如く他の絶縁層14を形成し、以下、前記手法を繰
り返すことにより、所望層数の多層積層回路基板を製作
することができる。Further, another insulating layer 14 is formed on the circuit wiring 13 as shown in FIG. 5 (5), and by repeating the above-described method, a multilayer laminated circuit board having a desired number of layers can be manufactured. it can.
【0005】[0005]
【発明が解決しようとする課題】前記回路基板に於い
て、シ−ド層11及び回路配線13に適した材料として
導体抵抗の低い銅が一般的に使用され、また、絶縁層1
0又は14には比誘電率の低いポリイミド等が適当な材
料として用いられる。In the above circuit board, copper having a low conductor resistance is generally used as a material suitable for the seed layer 11 and the circuit wiring 13, and the insulating layer 1 is also used.
For 0 or 14, polyimide having a low relative dielectric constant is used as a suitable material.
【0006】しかし、銅とポリイミドとの間の密着力は
弱い為にその間に剥離が発生し易いという一方の問題が
あり、他方に於いては、銅イオンがポリイミド中に拡散
してエレクトロマイグレ−ションを生ずるので、これは
絶縁不良や回路配線間の短絡を誘起する原因となる為、
微細・高密度な回路配線を要望されるような回路基板を
製作する際の大きな制約となる。However, since the adhesion between copper and polyimide is weak, there is one problem that peeling is liable to occur between them. On the other hand, copper ions diffuse into the polyimide and electromigrate. This will cause insulation failure and cause short circuit between circuit wirings.
This is a major limitation when manufacturing a circuit board that requires fine and high-density circuit wiring.
【0007】そこで、本発明は、回路配線とべ−ス基板
や絶縁層との間の密着力を向上させる一方、回路配線の
金属が周囲の絶縁層に拡散してマイグレ−ションを発生
する事態を防止することによって微細且つ高密度な回路
配線を形成可能な回路基板の配線構造とその形成法を提
供するものである。Therefore, the present invention improves the adhesion between the circuit wiring and the base substrate or the insulating layer, while preventing the metal of the circuit wiring from diffusing into the surrounding insulating layer and causing migration. The present invention provides a wiring structure of a circuit board and a method for forming the same, by which fine and high-density circuit wiring can be formed by preventing.
【0008】[0008]
【課題を解決するための手段】その為に本発明に係る回
路基板の配線構造では、絶縁べ−ス基板又は絶縁層の上
方に所要の回路配線を形成するように設けた回路導体層
と、この回路導体層の周囲を取り囲みその一部を前記絶
縁べ−ス基板又は絶縁層に密着させて形成した包囲導電
層とを備えると共に、その包囲導電層を前記絶縁べ−ス
基板又は絶縁層に拡散しない材料で形成するように構成
したことを特徴とするものである。Therefore, in the wiring structure of the circuit board according to the present invention, a circuit conductor layer provided so as to form a required circuit wiring above the insulating base substrate or the insulating layer, And a surrounding conductive layer formed by adhering a part of the circuit conductive layer to the insulating base substrate or the insulating layer, and the surrounding conductive layer is formed on the insulating base substrate or the insulating layer. It is characterized in that it is formed of a material that does not diffuse.
【0009】このような配線構造の場合、包囲導電層に
於ける前記絶縁べ−ス基板又は絶縁層と密着する領域は
その包囲導電層と同一又は異なる材料で形成するように
構成することができる。In the case of such a wiring structure, the region of the surrounding conductive layer which is in close contact with the insulating base substrate or the insulating layer can be formed of the same material as or different from that of the surrounding conductive layer. .
【0010】回路基板のこのような配線構造を得る為に
は、絶縁べ−ス基板又は絶縁層の上面に被着したメッキ
リ−ドの為のシ−ド層上にセミアディティブ法により所
要の回路導体層を形成する回路基板の配線形成法に於い
て、前記シ−ド層を前記回路導体層と異なる材料で形成
した後、前記シ−ド層上にマスク層を用いてメッキ手段
で前記回路導体層を形成し、次いで前記回路導体層の外
周に前記シ−ド層と同種又は異なる材料で導電性被覆層
を形成し、更に前記シ−ド層の不要領域を除去すること
により前記回路導体層の外周に前記前記シ−ド層の一部
と前記導電性被覆層とで包囲導電層を形成する手法が採
用される。In order to obtain such a wiring structure of the circuit board, a required circuit is formed on the insulating base board or the seed layer for the plating lead deposited on the upper surface of the insulating layer by the semi-additive method. In a wiring forming method of a circuit board for forming a conductor layer, the seed layer is formed of a material different from that of the circuit conductor layer, and then the circuit is formed by plating means using a mask layer on the seed layer. The circuit conductor is formed by forming a conductor layer, then forming a conductive coating layer on the outer periphery of the circuit conductor layer with the same or different material as that of the seed layer, and further removing an unnecessary region of the seed layer. A method of forming a surrounding conductive layer with a part of the seed layer and the conductive coating layer on the outer circumference of the layer is adopted.
【0011】ここで、前記導電性被覆層は、前記回路導
体層と前記マスク層との間に隙間を形成することにより
メッキ手段で形成することができ、また、前記マスク層
をポジ型フォトレジスト材料で形成する場合には、前記
隙間をそのマスク層に対する再露光・現像処理により形
成することができる。Here, the conductive coating layer can be formed by plating means by forming a gap between the circuit conductor layer and the mask layer, and the mask layer can be formed by a positive photoresist. When it is formed of a material, the gap can be formed by re-exposing and developing the mask layer.
【0012】[0012]
【発明の実施の形態】図1の(1)〜(7)は本発明に
係る回路基板の配線構造の一実施例による製造工程図を
示し、同図(1)の如くセラミック基板等の適当な絶縁
ベ−ス基板又はポリイミド樹脂等の絶縁層1の上面に無
電解メッキ法又はスパッタリング法で絶縁層1と密着力
が高くそれに拡散しないニッケル、クロム、タングステ
ン又はチタン等の導電性部材によるシ−ド層2を約50
0Å〜1000Å程度の厚さに一様に形成する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIGS. 1 (1) to 1 (7) are views showing a manufacturing process according to an embodiment of a wiring structure of a circuit board according to the present invention. As shown in FIG. The insulating base 1 is made of a conductive material such as nickel, chromium, tungsten or titanium, which has high adhesion to the insulating layer 1 and does not diffuse to the upper surface of the insulating layer 1 such as a polyimide resin or the like by electroless plating or sputtering. -Approximately 50 layers
It is uniformly formed to a thickness of 0Å to 1000Å.
【0013】次に、シ−ド層2の上面にポジ型フォトレ
ジストを塗布した後、これに露光・現像処理を施すこと
により、所要の回路配線を形成する為の領域を除く他の
領域に同図(2)の如くマスク層3を形成する。そこ
で、シ−ド層2をメッキリ−ドにして電解銅メッキ処理
により銅を厚さ数μm程度にシ−ド層2の露出領域に対
してメッキすることにより同図(3)の如く回路導体層
4を形成できる。なお、回路導体層4の材料としては銅
の他、シ−ド層2と異なる他の良導体材料も使用でき
る。Next, a positive photoresist is applied to the upper surface of the seed layer 2 and then exposed and developed to form an area other than the area for forming the required circuit wiring. The mask layer 3 is formed as shown in FIG. Therefore, by using the seed layer 2 as a plating lead and plating the exposed area of the seed layer 2 with copper to a thickness of several .mu.m by electrolytic copper plating, a circuit conductor as shown in FIG. Layer 4 can be formed. As the material of the circuit conductor layer 4, other than copper, other good conductor material different from the seed layer 2 can be used.
【0014】次いで、同図(4)の如く回路導体層4と
マスク層3との隣接領域に数μm程度の隙間5を形成し
てシ−ド層2の一部を露出させるようにマスク層3を再
露光・現像処理した段階で、例えば電解ニッケルメッキ
手段で同図(5)のように回路導体層4の上面及び両側
面にニッケル皮膜を被着させることにより導電性被覆層
6を形成する。この導電性被覆層6はシ−ド層2と同様
なものであってそれと同種又は異なる材料で形成するこ
ともできるが、シ−ド層2と同様に以下に説明する他の
絶縁層との密着力に優れ且つその絶縁層に対するエレク
トロマイグレ−ションを誘起する拡散のない材料を使用
するものである。Then, as shown in FIG. 4 (4), a gap 5 of about several μm is formed in a region adjacent to the circuit conductor layer 4 and the mask layer 3 so that a part of the seed layer 2 is exposed. 3 is re-exposed and developed, a conductive coating layer 6 is formed by depositing a nickel film on the upper surface and both side surfaces of the circuit conductor layer 4 by electrolytic nickel plating as shown in FIG. To do. The conductive coating layer 6 is the same as the seed layer 2 and can be formed of the same kind of material as or a different material from the seed layer 2. It uses a material that has excellent adhesion and has no diffusion that induces electromigration to the insulating layer.
【0015】そこで、マスク層3を剥離除去した後、同
図(6)の如く、露出したシ−ド層2の不要領域をエッ
チング手段で完全に除去することによって、回路導体層
4の全周を前記のようにシ−ド層2の一部と導電性被覆
層6とで完全に取り囲む包囲導電層7を形成することが
できる。Therefore, after removing the mask layer 3 by peeling, the unnecessary area of the exposed seed layer 2 is completely removed by etching means as shown in FIG. As described above, the surrounding conductive layer 7 that completely surrounds the part of the seed layer 2 and the conductive coating layer 6 can be formed.
【0016】ここで、単層の回路基板を得るには、包囲
導電層7を有する回路導体層4の上面に必要に応じて適
当な絶縁フィルム部材又は絶縁樹脂等を使用して表面保
護層を形成すればよいが、多層の回路基板を構成する場
合には、同図(7)の如く、包囲導電層7を有する回路
導体層4の上面に感光性ポリイミド樹脂等の如き適当な
絶縁材料を用いて絶縁層8を形成し、次いで前記手法を
繰り返すことにより、夫々包囲導電層で周囲を取り囲ん
だ回路導体層を具備する多層の回路基板を製作すること
が可能である。このような積層回路基板の場合、図示し
ないが、層間の絶縁層に形成したビアホ−ル等を利用し
て上下層の回路導体層に於ける所要個所を相互に電気的
に接続した構造の多層の積層回路基板も製作できる。Here, in order to obtain a single-layer circuit board, a surface protective layer is formed on the upper surface of the circuit conductor layer 4 having the surrounding conductive layer 7 by using an appropriate insulating film member or insulating resin as required. Although it may be formed, when a multilayer circuit board is formed, a suitable insulating material such as a photosensitive polyimide resin is provided on the upper surface of the circuit conductor layer 4 having the surrounding conductive layer 7, as shown in FIG. By forming the insulating layer 8 using the same and then repeating the above method, it is possible to fabricate a multilayer circuit board having circuit conductor layers surrounded by the surrounding conductive layers. In the case of such a laminated circuit board, although not shown, a multilayer structure in which required portions in upper and lower circuit conductor layers are electrically connected to each other by using via holes formed in insulating layers between layers The laminated circuit board of can also be manufactured.
【0017】図1の(6)及び(7)に示すように、本
発明の手法を採用することにより、シ−ド層2の一部と
導電性被覆層6とからなる包囲導電層7によってそれぞ
れの回路導体層4の全周を取り囲んだ配線構造を構成す
ることができ、この構造によれば、回路導体層4には良
導体材料を任意使用し、また、シ−ド層2及び導電性被
覆層6としては回路導体層4と異なる材料であって絶縁
層1及び8と密着力が高く且つマイグレ−ションを生じ
ない適宜な導電材料を使用することが可能となる。な
お、シ−ド層2と導電性被覆層6とは同種又は異なる材
料で形成することも前記説明から可能であることが分
る。As shown in (6) and (7) of FIG. 1, by adopting the method of the present invention, the surrounding conductive layer 7 consisting of a part of the seed layer 2 and the conductive coating layer 6 is formed. It is possible to form a wiring structure that surrounds the entire circumference of each circuit conductor layer 4. According to this structure, a good conductor material is arbitrarily used for the circuit conductor layer 4, and the seed layer 2 and the conductive layer are made conductive. As the coating layer 6, it is possible to use an appropriate conductive material which is different from the circuit conductor layer 4 and has a high adhesion to the insulating layers 1 and 8 and does not cause migration. It will be understood from the above description that the seed layer 2 and the conductive coating layer 6 can be formed of the same kind or different materials.
【0018】[0018]
【発明の効果】本発明によれば、所要の回路配線として
形成する回路導体層取り囲むように包囲導体層を形成
し、その包囲導体層をその内部の回路導体層とは異なる
導電材料で形成することにより、絶縁べ−ス基板又は絶
縁層との密着力を確保しながらマイグレ−ションを阻止
可能な回路基板の為の好適な配線構造を構成できる。According to the present invention, the surrounding conductor layer is formed so as to surround the circuit conductor layer formed as the required circuit wiring, and the surrounding conductor layer is formed of a conductive material different from that of the circuit conductor layer inside. This makes it possible to construct a suitable wiring structure for a circuit board that can prevent migration while ensuring adhesion with the insulating base board or the insulating layer.
【0019】従って、絶縁不良や配線間の短絡を確実に
防止できるので、微細且つ高密度な配線構造を有する高
機能な積層回路基板等も良好な品質で提供できる。Therefore, insulation failure and short circuit between wirings can be surely prevented, so that a highly functional laminated circuit board having a fine and high-density wiring structure can be provided with good quality.
【図1】本発明による回路基板の配線構造を説明する為
の製造工程図。FIG. 1 is a manufacturing process diagram for explaining a wiring structure of a circuit board according to the present invention.
【図2】従来例による回路基板の配線構造を説明する為
の製造工程図。FIG. 2 is a manufacturing process diagram for explaining a wiring structure of a circuit board according to a conventional example.
1 絶縁べ−ス基板又は絶縁層 2 シ−ド層 3 マスク層 4 回路導体層 5 隙間 6 導電性被覆層 7 包囲導電層 8 絶縁層 DESCRIPTION OF SYMBOLS 1 Insulating base substrate or insulating layer 2 Seed layer 3 Mask layer 4 Circuit conductor layer 5 Gap 6 Conductive coating layer 7 Surrounding conductive layer 8 Insulating layer
Claims (6)
回路配線を形成するように設けた回路導体層と、前記回
路導体層の周囲を取り囲みその一部を前記絶縁べ−ス基
板又は絶縁層に密着させて形成した包囲導電層とを具備
し、前記包囲導電層を前記絶縁べ−ス基板又は絶縁層に
拡散しない材料で形成するように構成したことを特徴と
する回路基板の配線構造。1. An insulating base substrate or a circuit conductor layer provided above an insulating layer so as to form required circuit wiring, and a part of the insulating base substrate surrounding the periphery of the circuit conductor layer. Or a surrounding conductive layer formed in close contact with an insulating layer, wherein the surrounding conductive layer is formed of a material that does not diffuse into the insulating base substrate or the insulating layer. Wiring structure.
板又は絶縁層と密着する領域は前記包囲導電層と同一又
は異なる材料で形成するように構成したことを特徴とす
る請求項1の回路基板の配線構造。2. A region of the surrounding conductive layer, which is in close contact with the insulating base substrate or the insulating layer, is made of the same material as or different from that of the surrounding conductive layer. Circuit board wiring structure.
たメッキリ−ドの為のシ−ド層上にセミアディティブ法
により所要の回路導体層を形成する回路基板の配線形成
法に於いて、前記シ−ド層を前記回路導体層と異なる材
料で形成した後、前記シ−ド層上にマスク層を用いてメ
ッキ手段で前記回路導体層を形成し、次いで前記回路導
体層の外周に前記シ−ド層と同種又は異なる材料で導電
性被覆層を形成し、更に前記シ−ド層の不要領域を除去
することにより前記回路導体層の外周に前記前記シ−ド
層の一部と前記導電性被覆層とで包囲導電層を形成する
ことを特徴とする回路基板の配線形成法。3. A wiring forming method for a circuit board, wherein a required circuit conductor layer is formed by a semi-additive method on a seed layer for plating lead deposited on the upper surface of an insulating base board or an insulating layer. In that, after the seed layer is formed of a material different from that of the circuit conductor layer, the circuit conductor layer is formed on the seed layer by a plating means using a mask layer, and then the circuit conductor layer is formed. A conductive coating layer is formed on the outer periphery of the same or different material as that of the seed layer, and an unnecessary region of the seed layer is removed to remove one of the seed layers on the outer periphery of the circuit conductor layer. A method for forming wiring on a circuit board, characterized in that an electrically conductive surrounding layer is formed by the portion and the electrically conductive coating layer.
間を形成することにより前記導電性被覆層をメッキ手段
で形成することを特徴とする請求項3の回路基板の配線
形成法。4. The wiring forming method for a circuit board according to claim 3, wherein the conductive coating layer is formed by a plating means by forming a gap between the circuit conductor layer and the mask layer.
で形成する請求項3又は4の回路基板の配線形成法。5. The circuit board wiring forming method according to claim 3, wherein the mask layer is formed of a positive photoresist material.
施すことにより前記隙間を形成する請求項4又は5の回
路基板の配線形成法。6. The circuit board wiring forming method according to claim 4, wherein the gap is formed by subjecting the mask layer to re-exposure and development.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24360295A JPH0964493A (en) | 1995-08-29 | 1995-08-29 | Wiring structure of circuit board and its formation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24360295A JPH0964493A (en) | 1995-08-29 | 1995-08-29 | Wiring structure of circuit board and its formation |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0964493A true JPH0964493A (en) | 1997-03-07 |
Family
ID=17106260
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24360295A Pending JPH0964493A (en) | 1995-08-29 | 1995-08-29 | Wiring structure of circuit board and its formation |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0964493A (en) |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6278153B1 (en) | 1998-10-19 | 2001-08-21 | Nec Corporation | Thin film capacitor formed in via |
US6841862B2 (en) | 2000-06-30 | 2005-01-11 | Nec Corporation | Semiconductor package board using a metal base |
WO2005067354A1 (en) * | 2003-12-26 | 2005-07-21 | Mitsui Mining & Smelting Co., Ltd. | Printed wiring board, method for manufacturing same, and circuit device |
JP2005317566A (en) * | 2004-04-26 | 2005-11-10 | Kyocera Corp | Wiring board and manufacturing method thereof |
JP2006120667A (en) * | 2004-10-19 | 2006-05-11 | Fujitsu Ltd | Printed circuit board manufacturing method and printed circuit board |
JP2007134458A (en) * | 2005-11-09 | 2007-05-31 | Shinko Electric Ind Co Ltd | Manufacturing method of wiring board and manufacturing method of semiconductor device |
JP2007201216A (en) * | 2006-01-27 | 2007-08-09 | Sumitomo Metal Mining Co Ltd | Flexible wiring board and manufacturing method therefor |
US7474538B2 (en) | 2002-05-27 | 2009-01-06 | Nec Corporation | Semiconductor device mounting board, method of manufacturing the same, method of inspecting the same, and semiconductor package |
US8072073B2 (en) | 2007-09-13 | 2011-12-06 | Nec Corporation | Semiconductor device and method of manufacturing same |
JP2013067066A (en) * | 2011-09-22 | 2013-04-18 | Fujifilm Corp | Inkjet head and method for producing the same |
US8692364B2 (en) | 2009-08-07 | 2014-04-08 | Nec Corporation | Semiconductor device and method for manufacturing the same |
KR20160069726A (en) * | 2014-12-09 | 2016-06-17 | 엘지디스플레이 주식회사 | Transparent electrode and manufacturing method of the same |
-
1995
- 1995-08-29 JP JP24360295A patent/JPH0964493A/en active Pending
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6278153B1 (en) | 1998-10-19 | 2001-08-21 | Nec Corporation | Thin film capacitor formed in via |
US6841862B2 (en) | 2000-06-30 | 2005-01-11 | Nec Corporation | Semiconductor package board using a metal base |
US7696007B2 (en) | 2000-06-30 | 2010-04-13 | Nec Corporation | Semiconductor package board using a metal base |
US7585699B2 (en) | 2000-06-30 | 2009-09-08 | Nec Corporation | Semiconductor package board using a metal base |
US7474538B2 (en) | 2002-05-27 | 2009-01-06 | Nec Corporation | Semiconductor device mounting board, method of manufacturing the same, method of inspecting the same, and semiconductor package |
WO2005067354A1 (en) * | 2003-12-26 | 2005-07-21 | Mitsui Mining & Smelting Co., Ltd. | Printed wiring board, method for manufacturing same, and circuit device |
KR100864562B1 (en) * | 2003-12-26 | 2008-10-20 | 미쓰이 긴조꾸 고교 가부시키가이샤 | Printed wiring board, method for manufacturing same, and circuit device |
JP2005317566A (en) * | 2004-04-26 | 2005-11-10 | Kyocera Corp | Wiring board and manufacturing method thereof |
JP2006120667A (en) * | 2004-10-19 | 2006-05-11 | Fujitsu Ltd | Printed circuit board manufacturing method and printed circuit board |
JP4599132B2 (en) * | 2004-10-19 | 2010-12-15 | 富士通株式会社 | Printed circuit board manufacturing method and printed circuit board |
JP2007134458A (en) * | 2005-11-09 | 2007-05-31 | Shinko Electric Ind Co Ltd | Manufacturing method of wiring board and manufacturing method of semiconductor device |
JP2007201216A (en) * | 2006-01-27 | 2007-08-09 | Sumitomo Metal Mining Co Ltd | Flexible wiring board and manufacturing method therefor |
US8072073B2 (en) | 2007-09-13 | 2011-12-06 | Nec Corporation | Semiconductor device and method of manufacturing same |
US8692364B2 (en) | 2009-08-07 | 2014-04-08 | Nec Corporation | Semiconductor device and method for manufacturing the same |
JP2013067066A (en) * | 2011-09-22 | 2013-04-18 | Fujifilm Corp | Inkjet head and method for producing the same |
KR20160069726A (en) * | 2014-12-09 | 2016-06-17 | 엘지디스플레이 주식회사 | Transparent electrode and manufacturing method of the same |
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