JPH0945894A - Manufacture of field-effect transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To set a double-recess structure uniform in shape so as to make a field-effect transistor uniform in breakdown voltage. SOLUTION: An I-GaAs buffer layer 2, an InGaAs electron transit layer 3, an N-AlGaAs electron feed layer 4, an N-InGaP spacer layer 5, and an N<+> - GaAs contact layer 6 are grown on a semi-insulating GaAs substrate 1, and then a source electrode 7 and a drain electrode 8 are formed [(a)]. A photoresist film 9a provided with an opening of a second recess pattern is formed, an N<+> -GaAs contact layer 6 is selectively etched using the photoresist film 9a as a mask, and then the N-InGaP spacer layer 5 is selectively etched for forming a first recess [(b)]. Then, N<+> -GaAs contact layer 6 is selectively etched to form a first recess [(c)]. Thereafter, a gate electrode 10 is formed through deposition and lift-off of Al [(d)].

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a field effect transistor, and more particularly to a field effect for high frequency power in which a two-dimensional electron gas formed at a heterojunction interface is used as a channel and a gate electrode is formed in a double recess portion. The present invention relates to a method for manufacturing a transistor.

[0002]

2. Description of the Related Art In this type of GaAs / AlGaAs type field effect transistor, AIGaAs which is an electron supply layer is used.
The two-dimensional electron gas generated at the interface with GaAs or InGaAs that is heterojunction with is operated. Since the transistor of this structure is spatially separated from the donor level in the electron supply layer, it is less susceptible to electrical scattering and can operate at high speed, and is now practically used as a low noise element for satellite communication. Has been reached.

Recently, there has been a movement to use a field effect transistor using these two-dimensional electron gases as a channel as a field effect transistor for high frequency power. In order to use the device for high frequency power, the method used in the development of the low noise device must be modified. In order to be able to use the heterojunction field effect transistor as a power device, it is necessary to improve the breakdown voltage.

In order to improve the breakdown voltage, a method of making the recess a double recess structure has been conventionally used.
2A to 2D are sectional views in the order of steps of the conventional example. First, as shown in FIG. 2A, semi-insulating GaAs
On the substrate 1, the i-GaAs buffer layer 2, InGaAs
Electron transit layer 3, n-AlGaAs electron supply layer 4, n ^- -
After the GaAs spacer layer 5a and the n ⁺ -GaAs contact layer 6 are sequentially epitaxially grown, the contact layer 6 is formed.
The source electrode 7 and the drain electrode 8 are formed on top.

Next, as shown in FIG.
(B) In the following figures, the substrate 1 and the buffer layer 2 are not shown.], A photoresist film 9b having a first-stage recess-shaped opening to be formed is formed, and etching is performed using this as a mask. Is performed to form the first-stage recess. Subsequently, as shown in FIG. 2C, a photoresist film 9c having a second-stage recess-shaped opening is formed, and etching is performed using this as a mask to form a second-stage recess. Next, a gate electrode is formed by vapor deposition of a Schottky metal material and lift-off, as shown in FIG.

[0006]

As described above, the device withstand voltage is improved by adopting the double recess structure, but the withstand voltage characteristic is that the recess height of the second step is higher than that of the second recess in the portion where the double recess is formed. Heavily dependent. The height of the second recess is determined when forming the first recess.
However, the n ⁻ -GaAs spacer layer 5a and the n ⁺ -Ga
The selectivity of etching with the As contact layer is not so high. Therefore, the etching shape of the double recess depends on the temperature, time, or the nature of the epitaxial layer during etching. Therefore, there is a problem in that the etching depth of the first-stage recess is likely to vary, and because of the inaccuracy of this shape, the withstand voltage characteristic cannot be uniquely determined. For example, when the etching of the first-stage recess is insufficient, the contact layer remains at the bottom of the first recess, and when overetching is performed, the surface of the electron supply layer is exposed and the contact layer is exposed. The second recess is not formed. In particular, a power transistor having a multi-finger structure is easily affected by in-plane variations in etching rate, so that the yield is significantly reduced when such a process having low dimensional stability is adopted. Further, when etching residue of the contact layer occurs when forming the first recess, not only the breakdown voltage is lowered, but also the gate leakage is increased, and the high frequency characteristics are deteriorated as the gate capacitance is increased. .

Further, in the conventional example, there is a problem that two photolithography processes are required to form the double recess, which requires a lot of man-hours. The present invention has been made in view of such problems of the conventional example, and firstly, an object thereof is to suppress variations in withstand voltage characteristics by forming a double recess having an accurate shape. Secondly, the double recess can be formed with a smaller number of steps.

[0008]

A method of manufacturing a field effect transistor according to the present invention for achieving the above object comprises:
(1) A step of sequentially growing an electron transit layer, an electron supply layer, a spacer layer, and a contact layer made of a material having a different etching property from the spacer layer on a high-resistance compound semiconductor substrate, and (2) the contact layer. A step of forming a photoresist film having an opening in a gate electrode formation region thereon,
(3) A step of selectively etching the contact layer using the photoresist film as a mask, and (4) A step of selectively etching the spacer layer using the photoresist film as a mask to form a second recess portion. When,
(5) A step of selectively side-etching the contact layer using the photoresist film as a mask to form a first recess, and (6) a material forming a Schottky barrier for the electron supply layer, 2 filling the inside of the recess to form a gate electrode.

[0009]

In the method for manufacturing a field effect transistor of the present invention, a spacer layer made of a material having a different etching property from those of the semiconductor layers is provided between the electron supply layer and the contact layer (for example, the electron supply layer). , The contact layer is formed of AlGaAs and GaAs, respectively, and the spacer layer is formed of In.
GaP), after completion of the epitaxial growth, a photoresist film having an opening of the second recess pattern is formed, and using this as a mask, selective etching of the contact layer, selective etching of the spacer, side etching of the contact layer, A double recess is formed through the three-step etching.

According to the above-mentioned manufacturing method, since the contact layer and the spacer layer have different etching properties, the spacer layer is not etched during the etching of the above-mentioned and during the etching of the above, and during the etching of the above. The contact layer is not etched. Therefore, the height of the first recess is the thickness of the contact layer, and the height of the second recess is determined by the thickness of the spacer layer. Further, it is possible to prevent the etching residue of the contact layer from occurring during the etching.

That is, according to the present invention, the height of the second recess, which is important for the breakdown voltage characteristics, can be determined at the stage of epitaxial growth, and the shape of the double recess is also uniquely determined. Therefore, it is possible to prevent the breakdown voltage characteristics of the element from varying. In addition, it is possible to prevent deterioration of characteristics such as high frequency characteristics and improve yield. Further, since the double recess structure can be formed by one photolithography process, the process can be simplified.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION Next, embodiments of the present invention will be described in detail with reference to the drawings. 1 (a)-(d)
FIG. 4A is a process sectional view showing the manufacturing method of the field-effect transistor of one embodiment of the present invention. First, as shown in FIG. 2A, an i-GaAs buffer layer 2, an InGaAs electron transit layer 3, and an n-AlGaA are formed on a semi-insulating GaAs substrate 1.
s electron supply layer 4, n-InGaP spacer layer 5, n ⁺ -
After the GaAs contact layer 6 is sequentially epitaxially grown, the source electrode 7 and the drain electrode 8 are formed on the contact layer 6. The electron transit layer may be formed using GaAs.

Next, by applying a photolithography method,
A photoresist film 9a having openings of the second recess pattern is formed, and using this as a mask, the n ⁺ -GaAs contact layer 6 is selectively etched using a sulfuric acid etchant. This etching automatically stops at the surface of the n-InGaP spacer layer 5. Then, using the photoresist film 9a as a mask, the n-InGaP spacer layer 5 is selectively etched using a hydrochloric acid-based etchant to form a first recess. During this etching, n
^{The +} -GaAs contact layer 6 and the n-AlGaAs electron supply layer 4 are not etched [FIG. 1 (b): the GaAs substrate 1 and the buffer layer 2 are not shown in the drawings after FIG. 1 (b). ing〕.

Next, using the photoresist film 9a as a mask, the n ⁺ -GaAs contact layer 6 is selectively side-etched using a sulfuric acid-based etchant to form a first recess [FIG. 1 (c)]. . After that, vapor deposition of aluminum is performed to form the gate electrode 10, and the unnecessary aluminum film is removed together with the photoresist film 9a, thereby completing the fabrication of the field effect transistor according to this embodiment [FIG.
(D)].

[0015]

As described above, in the method of manufacturing a field effect transistor of the present invention, a spacer layer made of a semiconductor having a different etching property from the electron transit layer and the contact layer is interposed between the electron transit layer and the contact layer. Since the double recess structure is formed by utilizing the etching selection ratio of these semiconductor layers, according to the present invention, the recess height of the second step can be set as the film thickness of the spacer layer. Since the shape of the double recess can be uniquely determined by the film thickness of the epitaxial growth layer, it is possible to suppress variations in withstand voltage characteristics of the device. Further, it becomes possible to prevent the deterioration of the high frequency characteristics and to manufacture with a high yield. Further, since the double recess can be formed by one photolithography process, the process can be simplified.

[Brief description of drawings]

1A to 1D are cross-sectional views in order of the processes, for explaining an embodiment of the present invention.

FIG. 2 is a sectional view in order of steps of a conventional example.

[Explanation of symbols]

1 semi-insulating GaAs substrate 2 i-GAAs buffer layer 3 InGaAs electron transit layer 4 n-AlGaAs electron supply layer 5 n-InGaP spacer layer 5a n ^-- GaAs spacer layer 6 n ⁺ -GaAs contact layer 7 source electrode 8 drain electrode 9a, 9b, 9c Photoresist film 10 Gate electrode

Claims (3)

[Claims] 1. An electron transit layer, an electron supply layer, a spacer layer made of a material having an etching property different from that of the electron supply layer, and an etching property of the spacer layer on the high resistance compound semiconductor substrate. A step of sequentially growing contact layers made of different materials; (2) a step of forming a photoresist film having an opening on a gate electrode formation region on the contact layer; (3) a mask of the photoresist film And (4) a step of selectively etching the spacer layer by using the photoresist film as a mask to form a second recess portion, and (5) the photoresist film Forming a first recess portion by selectively side-etching the contact layer using the mask as a mask; (6) Schottky for the electron supply layer Method of manufacturing a field effect transistor, characterized in that it comprises a step of forming a gate electrode material to form a wall and filled in the second recess. 2. The electron transit layer is InGaAs or G
aAs and the electron supply layer is AlGaAs
The method for manufacturing a field effect transistor according to claim 1, wherein the field effect transistor is formed by: 3. The method of manufacturing a field effect transistor according to claim 1, wherein the spacer layer is formed of InGaP and the contact layer is formed of GaAs.