JPH09326436A - Formation of wiring - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for forming wiring on of a semiconductor device without wormholes and voids by depositing blanket W-shaped films to form buried plugs in minute contact holes. SOLUTION: The opening 14 of a contact hole is formed, a titanium film 15 and a titanium nitride film 16 are deposited, and a first blanket W-shaped film 18 is deposited on the condition of CVD which may prevent occurrence of wormholes. The first film 18 overhanging on the upper portion of the opening 14 is etched back, then a second blanket W-shaped film 19 is deposited on the CVD condition which may produce good step coverage. This method enables higher integration of semiconductor devices.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a wiring in a semiconductor device, and more particularly to a method for forming a wiring in a semiconductor device in which a blanket W film formed by a CVD method is used to form a buried plug in a contact hole.

[0002]

2. Description of the Related Art As semiconductor devices have become highly integrated, the rules for processing dimensions in semiconductor manufacturing processes have become more and more stringent, and various process technologies for semiconductor devices having a half-micron rule or less are now being actively developed. As one of the developments of this process technology, a conductor film is embedded in each element and wiring in a semiconductor device or a connection portion between wirings of a multi-layer wiring, so-called contact hole portion, and then patterning of the wiring is performed to form a space between each element. There is a wiring technique for forming wiring.

As a method of embedding a conductor film in a contact hole portion having a contact hole diameter of a half micron rule or less, a high temperature Al alloy sputtering method performed while the substrate is heated to a high temperature, and a buried plug forming method by a selective growth method of W. , A buried plug forming method that combines blanket W film formation by CVD and subsequent etch back and the like. When the contact hole is filled by the high temperature Al alloy sputter method, the conductive film sputtered by the high temperature Al alloy is then patterned to form wiring, and when the contact hole is filled by the selective growth method of W or the blanket W film. After that, a conductor film is deposited, and the conductor film is patterned to form wiring. When the conductor film is directly used to fill the contact hole by the above method, in the subsequent heat treatment step, the reaction between the conductor film and the underlying semiconductor substrate or the metal of the conductor film diffuses into the semiconductor substrate, Since there is a risk of deteriorating or destroying the device characteristics, a barrier layer having both adhesion to the underlying Si substrate and prevention of metal diffusion is usually formed before embedding the metal in the contact hole. Generally, this barrier layer is formed by stacking a Ti film and a TiN film.

As an example of a conventional method of burying a conductor film in the above-mentioned contact hole, a wiring forming method using a buried plug forming method in which blanket W film formation by CVD and subsequent etchback are combined is described. It will be described with reference to the schematic cross-sectional view of the semiconductor device of No. 3. First, as shown in FIG. 3A, M constituting the semiconductor device is formed.
Semiconductor substrate 1 on which OS transistor elements and the like are formed
An inter-layer insulating film 12 is deposited on the surface 1. Then, a contact hole opening 14 is formed in the contact hole portion 1 where an electrode is formed in the impurity diffusion layer 13 such as the source / drain layer. Next, the ohmic contact between the impurity diffusion layer 13 and the electrode is secured, and the interlayer insulating film and the electrode (embedded plug).
The Ti film 15 is deposited to a thickness of about 30 nm by the sputtering method in order to secure the adhesiveness with the blanket W film that becomes the target. Then, a TiN film 16 serving as a barrier metal is deposited to a thickness of about 70 nm by the same sputtering method. After that, RTA (Rapid Thermal)
Annealing) furnace is used to perform a heat treatment for a short time in an N ₂ gas atmosphere to react the Ti film 15 with the surface portion of the impurity diffusion layer 13 of the semiconductor substrate 11 so that the TiSi ₂ layer 1 is formed.
At the same time as forming No. 7, the barrier property against metal diffusion of the TiN film 16 is improved.

Next, as shown in FIG. 3B, WF ₆ /
A first blanket W film 18 is deposited to a thickness of about 50 nm by a CVD method using SiH ₄ / H ₂ / Ar gas,
Then, the second blanket W film 19 is deposited to a thickness of about 600 nm by the CVD method using WF ₆ / H ₂ / Ar. The reason why the blanket W film is formed in these two steps is that when the CVD condition for forming the first blanket W film 18 is used, the TiN film 16 of the barrier layer in the peripheral portion of the bottom of the opening 14 of the contact hole is generally thin. Because it is formed, it is difficult to generate a worm hole (Worm Hole) formed by erosion of Si of the semiconductor substrate by the WF ₆ gas. However, this first blanket W
The blanket W film according to the CVD conditions for forming the film 18 has a poor step coverage and a slow growth rate. Therefore, the blanket W film is formed by two steps as described above.

Next, as shown in FIG. 3C, the first and second blanket W films 18 and 19 are etched back to form a tungsten plug 20 in the contact hole portion 1. Next, a Ti film 21 and a TiN film 22 are deposited by a sputtering method, and subsequently 1% Si used as a wiring film is formed.
An Al alloy film 23 containing is deposited by a sputtering method. After that, although illustration is omitted, wiring is formed by patterning the Al alloy film 23.

However, in the above-described method for forming a wiring of a semiconductor device, when the opening diameter of the contact hole becomes smaller and the aspect ratio of the contact hole becomes larger, a blanket W film is formed, and then, as shown in FIG. There is a problem that voids 24 are generated below the opening 14 of the contact hole. This is because when the aspect ratio of the contact hole becomes large, the step coverage at the contact hole opening 14 of the Ti film 15 or the TiN film 16 deposited by the sputtering method becomes poor, and the Ti film 15 or the TiN film 16 opens at the contact hole. At 14 parts, an overhang-shaped deposited film is formed, and at the opening 14 part of this overhang-shaped contact hole, there is an effect of suppressing the generation of worm holes, but the reaction is rate-controlling C
This is because the opening 14 of the contact hole has a larger overhang shape because the first blanket W film 18 is deposited under the VD condition.

In this case, the upper portion of the contact hole opening 14 becomes considerably small, and the second blanket W film 1 is formed under the CVD condition in which the reaction is surface reaction rate limiting.
Even when 9 is deposited, a void 24 is formed in the lower part of the contact hole opening 14 in the state where the upper part of the contact hole opening 14 is connected by the deposited film, that is, a void 24. A buried plug formed by etching back such a blanket W film has a problem that a desired buried plug shape cannot be obtained.

[0009]

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems in the method for forming a wiring of a semiconductor device. That is, it is an object of the present invention to provide a wiring forming method for a semiconductor device capable of forming a buried plug by a blanket W film that does not generate a worm hole or a void in a fine contact hole portion.

[0010]

A method for forming a wiring of a semiconductor device according to the present invention is proposed to solve the above-mentioned problems and includes a step of forming a buried plug using a blanket W film. In the wiring forming method, the step of forming a contact hole, the step of depositing a first blanket W film by CVD, and the etching back of the first blanket W film deposited in an overhang shape on the contact hole are removed. Process and CVD
And a step of depositing a second blanket W film by.

According to the present invention, the first method is used under the CVD condition that suppresses the generation of wormholes around the bottom of the contact hole.
Blanket W film of the first blanket W having an overhang shape formed on the contact hole
By removing the overhang shape by etching back the film and then depositing the second blanket W film under the CVD condition with good step coverage, it becomes possible to form a blanket W film without voids. A good buried plug can be formed by etching back the blanket W film.

[0012]

Embodiments of the present invention will be described below with reference to the accompanying drawings. The same components as those in FIG. 3 referred to in the description of the prior art are denoted by the same reference numerals.

Example 1 This example is an example in which the present invention is applied to a wiring forming method for a semiconductor device, and this will be described with reference to FIGS. 1 and 2. First, as shown in FIG. 1A, a BPSG (Boro-Ph) is formed by a CVD method on a semiconductor substrate 11 on which MOS transistor elements and the like constituting a semiconductor device are formed.
An interlayer insulating film 12 of an osso Silicate Glass) film is deposited to a film thickness of about 600 nm. After that, the contact hole portion 1 for forming an electrode (buried plug) in the impurity diffusion layer 13 such as the source / drain layer
Then, the opening 14 of the contact hole is formed.

Next, in order to secure ohmic contact between the impurity diffusion layer 13 and the electrode and adhesion between the interlayer insulating film and the blanket W film, the Ti film is sputtered by using a sputtering apparatus using a collimator plate. 15 is deposited to a film thickness of about 30 nm. The sputtering conditions for the Ti film 15 are as follows, for example. [Sputtering condition of Ti film 15] Ar gas flow rate: 100 sccm Pressure: 0.5 Pa Substrate temperature: 150 ° C Sputtering power supply power: 8 kW

Next, the TiN film 16 to be the barrier layer is sputtered by using a normal sputter apparatus to a film thickness of about 70.
nm is deposited. The sputtering conditions of this TiN film 16 are as follows, for example. [Sputtering Conditions of TiN Film 16] Ar gas flow rate: 30 sccm N ₂ gas flow rate: 80 sccm Pressure: 0.4 Pa Substrate temperature: 150 ° C. Sputtering power supply power: 5 kW May also be deposited by a CVD method with good step coverage. After that, RTA (Rapid Thermal Anne)
aing) furnace at a temperature of 65 in a N ₂ gas atmosphere.
Heat treatment is performed at 0 ° C. for 30 seconds to react the Ti film 15 with Si on the surface of the impurity diffusion layer 13 of the semiconductor substrate 11 to form the TiSi ₂ layer 17, and at the same time, the TiN film 1
6 improves the barrier property against metal diffusion.

Next, a first blanket W film 18 having a film thickness of about 70 nm is deposited under the CVD conditions for suppressing the generation of worm holes when the blanket W film is formed. The CVD conditions for forming the first blanket W film 18 are as follows, for example. [CVD conditions for the first blanket W film 18] WF ₆ gas flow rate: 15 sccm SiH ₄ gas flow rate: 7 sccm H ₂ gas flow rate: 800 sccm Ar gas flow rate: 1000 sccm Pressure: 600 Pa Substrate temperature: 450 ° C

Next, in order to remove the overhang-shaped first blanket W film 18 above the contact hole opening 14 of the contact hole portion 1, the first blanket W film 18 is sputter-etched to about 40.
Etch back by about nm. The sputter etching conditions for the first blanket W film 18 are as follows, for example. [Sputter Etching Conditions of First Blanket W Film 18] Ar gas flow rate: 50 sccm Pressure: 4 Pa Substrate temperature: 300 ° C. RF power: 400 W

By the above-described sputter etching of the first blanket W film 18, the first blanket W film 18 formed in the overhang shape on the interlayer insulating film 12 and the contact hole opening 14 is mainly etched, Since the lower portion of the contact hole opening 14 is not etched so much, the shape of the contact hole portion 1 as shown in FIG. 1B, that is, the shape of the upper opening and the lower opening of the contact hole portion 1 does not change much. Becomes

Next, as shown in FIG. 1 (c), the second blanket W is formed under the CVD conditions for the blanket W film which is surface reaction rate-controlled, has good step coverage, and has a large deposition rate.
The film 19 is deposited to a film thickness of about 550 nm. The CVD conditions for the second blanket W film 19 are as follows, for example. [CVD condition of second blanket W film 19] WF ₆ gas flow rate: 75 sccm H ₂ gas flow rate: 500 sccm Ar gas flow rate: 2800 sccm pressure: 10.6 kPa substrate temperature: 450 ° C

Next, as shown in FIG. 2D, the first and second blanket W films 18 and 19 are etched back to form a tungsten plug 20. The etch back conditions are as follows, for example. [Etchback Conditions for First and Second Blanket W Films 18 and 19] SF ₆ gas flow rate: 150 sccm Ar gas flow rate: 75 sccm Pressure: 26.7 kPa RF power: 600 W After that, Ti film 21 and TiN film 22 is deposited by a sputtering method, and subsequently, an Al alloy film 23 containing 1% Si is formed as a wiring film by a sputtering method.
After that, although not shown, the Al alloy film 2
3 is patterned to form wiring.

According to the above-described method for forming the wiring of the semiconductor device, the first method under the CVD condition for suppressing the generation of wormholes is used.
After the blanket W film 18 is deposited, the overhang-shaped first blanket W film 18 formed on the upper part of the opening 14 of the contact hole is removed by sputter etching. Thereafter, the reaction is a surface reaction rate-determining step coverage is good,
By forming the second blanket W film 19 and the second blanket W film 19 in a two-step deposition under a CVD condition with a high deposition rate, the blanket W having no void in the opening 14 of the contact hole
A film can be formed, and a good tungsten plug 20 can be formed.

Embodiment 2 This embodiment is an example in which the present invention is applied to a wiring forming method of a semiconductor device, and this will be described with reference to FIGS. 1 and 2. First, as shown in FIG. 1A, the interlayer insulating film 12 is deposited on the semiconductor substrate 11, the opening 14 of the contact hole is formed, the Ti film 15 and the TiN film 1 as in the first embodiment.
6. Deposit the first blanket W film 18.

Next, in order to remove the first blanket W film 18 formed in the overhang shape on the upper part of the contact hole opening 14 of the contact hole portion 1, the first blanket W film 18 is removed by RIE (Reactive Io).
Etching back is performed by about 40 nm. The RIE conditions for the first blanket W film 18 are as follows, for example. [RIE Condition of First Blanket W Film 18] SF ₆ gas flow rate: 140 sccm Ar gas flow rate: 25 sccm Pressure: 50 Pa RF power: 250 W

The first condition under the above-mentioned RIE condition with poor anisotropy
The first blanket W film 18 on the interlayer insulating film 12 and the first blanket W film 18 formed in the overhang shape above the contact hole opening 14 are mainly etched by the etching of the blanket W film 18 of FIG. Since the lower portion of the contact hole opening 14 is not etched so much, the shape of the contact hole portion 1 as shown in FIG. 1B, that is, the size of the upper opening and the lower opening of the contact hole portion 1 does not change much. It becomes the shape.

Next, as shown in FIG. 1C, the first embodiment
A second blanket W film 19 is deposited in the same manner as.
Thereafter, as shown in FIG. 2D, the first and second blanket W films 18 and 19 are etched back in the same manner as in Example 1 to form a tungsten plug 20, and a Ti film 21 and a TiN film 22 are formed. After depositing the Al alloy film 23, these films are patterned to form wiring.

According to the above-described method for forming the wiring of the semiconductor device, the first method under the CVD condition for suppressing the generation of wormholes is used.
After the blanket W film 18 is deposited, the overhang-shaped first blanket W film 18 formed on the upper portion of the opening 14 of the contact hole is removed by RIE etchback, and then the reaction is surface reaction rate-determining and the step coverage is good. The second blanket W film 19 is deposited under the CVD condition with a high deposition rate.
By the two-step deposition of the film, a blanket W film without voids can be formed in the opening 14 of the contact hole, and the excellent tungsten plug 20 can be formed.

Although the present invention has been described with reference to the two examples, the present invention is not limited to these examples. For example, Al containing 1% Si as a wiring film
Although an alloy film is used for the description, an Al alloy film containing Cu or an Al alloy film containing Si and Cu may be used.
Alternatively, a refractory metal film such as W or Mo, a refractory metal silicide film, or a Cu film may be used. In addition, within the scope of the technical concept of the present invention, the process apparatus and process conditions can be appropriately changed.

[0028]

As is apparent from the above description, according to the method for forming a wiring of a semiconductor device of the present invention, a buried plug can be formed in a fine contact hole by a blanket W film without the generation of wormholes and voids. The device can be highly integrated.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a semiconductor device for explaining the first half of steps of Examples 1 and 2 to which the present invention is applied, in the order of steps,
(A) shows a state in which the first blanket W film is formed,
(B) is a state in which the first blanket W film is etched back, and (c) is a state in which the second blanket W film is formed.

FIG. 2 is a schematic cross-sectional view of a semiconductor device for explaining the latter half of the steps of Examples 1 and 2 to which the present invention is applied, in the order of steps;
(D) a tungsten plug is formed, a Ti film, TiN
In this state, the film and the Al alloy film are deposited.

3A and 3B are schematic cross-sectional views of a semiconductor device illustrating steps of a conventional example in the order of steps. FIG. 3A is a state in which a Ti film and a TiN film are deposited, and FIG. 3B is a first blanket W film and a first blanket W film. A blanket W film is deposited, and (c) is a state where a tungsten plug is formed and a Ti film, a TiN film, and an Al alloy film are deposited.

FIG. 4 is a schematic cross-sectional view of a semiconductor device illustrating a void generated in a contact hole portion having a large aspect ratio when a blanket W film is deposited by a conventional wiring forming method.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Contact hole part, 11 ... Semiconductor substrate, 12 ... Interlayer insulating film, 13 ... Impurity diffusion layer, 14 ... Opening, 15, 2
1 ... Ti film, 16, 22 ... TiN film, 17 ... TiSi ₂
Film, 18 ... First blanket W film, 19 ... Second blanket W film, 20 ... Tungsten plug, 23 ... Al
Alloy film, 24 ... Void

Claims (4)

[Claims] 1. A method for forming a wiring of a semiconductor device, including the step of forming a buried plug using a blanket W film, the step of forming a contact hole, the step of depositing a first blanket W film by CVD, A semiconductor device comprising: a step of etching back and removing the first blanket W film deposited in the form of an overhang on the contact hole; and a step of depositing a second blanket W film by CVD. Wiring formation method. 2. The wiring forming method for a semiconductor device according to claim 1, wherein the reaction gas at the time of depositing the first blanket W film contains WF ₆ gas and SiH ₄ gas. 3. The wiring forming method for a semiconductor device according to claim 1, wherein either one of a sputter etching method and an RIE method is used for the etch back. 4. The wiring forming method for a semiconductor device according to claim 1, wherein the reaction gas at the time of depositing the second blanket W film includes WF ₆ gas and H ₂ gas.