JPH09326416A - Semiconductor element mounting method and product thereof - Google Patents
Semiconductor element mounting method and product thereofInfo
- Publication number
- JPH09326416A JPH09326416A JP14274596A JP14274596A JPH09326416A JP H09326416 A JPH09326416 A JP H09326416A JP 14274596 A JP14274596 A JP 14274596A JP 14274596 A JP14274596 A JP 14274596A JP H09326416 A JPH09326416 A JP H09326416A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- circuit board
- metal paste
- solvent
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 67
- 238000000034 method Methods 0.000 title claims abstract description 41
- 229910052751 metal Inorganic materials 0.000 claims abstract description 26
- 239000002184 metal Substances 0.000 claims abstract description 26
- 239000002904 solvent Substances 0.000 claims abstract description 21
- 238000001704 evaporation Methods 0.000 claims abstract description 13
- 238000010304 firing Methods 0.000 claims abstract description 6
- 239000000843 powder Substances 0.000 claims abstract description 4
- 239000010931 gold Substances 0.000 claims description 12
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 8
- 229910052737 gold Inorganic materials 0.000 claims description 8
- 229910000510 noble metal Inorganic materials 0.000 claims description 5
- 229910052709 silver Inorganic materials 0.000 claims description 5
- 239000004332 silver Substances 0.000 claims description 5
- 239000011882 ultra-fine particle Substances 0.000 claims description 3
- 230000008646 thermal stress Effects 0.000 abstract description 6
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 12
- 229910000679 solder Inorganic materials 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 5
- 238000005476 soldering Methods 0.000 description 5
- 239000008188 pellet Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000006185 dispersion Substances 0.000 description 3
- 239000010419 fine particle Substances 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 239000010970 precious metal Substances 0.000 description 3
- 239000010949 copper Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000007602 hot air drying Methods 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 238000005272 metallurgy Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 238000009834 vaporization Methods 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/11332—Manufacturing methods by local deposition of the material of the bump connector in solid form using a powder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/8184—Sintering
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
Landscapes
- Wire Bonding (AREA)
Abstract
(57)【要約】
【課題】半導体装置に熱応力の影響を与えることなく、
微細ピッチの電極への接続であっても隣の電極とショー
トする危険性がなく、信頼性の高い電気接続を実現でき
る半導体素子の実装方法およびその製品を提供する。
【解決手段】半導体素子を回路基板の端子電極部に実装
する方法であって、回路基板の端子電極上に、金属の超
微粉末を溶剤に分散させて調製した金属ペーストのボー
ルを形成する工程と、半導体素子の電極を、回路基板の
端子電極上に形成した金属ペーストのボール上にフェー
スダウン法で接続する工程と、金属ペースト中の溶剤を
蒸発させて半導体素子と回路基板とを電気的に接続する
工程、もしくは、溶剤を蒸発させた後、低温焼成により
半導体素子と回路基板とを電気的に接続する工程を、少
なくとも用いる半導体素子の実装方法とその製品。
(57) 【Abstract】 PROBLEM TO BE SOLVED: To prevent a semiconductor device from being affected by thermal stress.
Provided are a semiconductor element mounting method and a product thereof which can realize reliable electrical connection without the risk of short-circuiting with an adjacent electrode even when connecting to a fine pitch electrode. A method of mounting a semiconductor element on a terminal electrode portion of a circuit board, wherein a ball of a metal paste prepared by dispersing ultrafine metal powder in a solvent is formed on the terminal electrode of the circuit board. And a step of connecting the electrodes of the semiconductor element to the balls of the metal paste formed on the terminal electrodes of the circuit board by a face-down method, and evaporating the solvent in the metal paste to electrically connect the semiconductor element and the circuit board. A semiconductor element mounting method and its product, which use at least a step of connecting to a semiconductor element or a step of electrically connecting a semiconductor element and a circuit board by low-temperature firing after evaporating a solvent.
Description
【０００１】[0001]
【発明の属する技術分野】本発明は半導体素子（チッ
プ、ペレットまたはダイ等）の電極部と、回路基板上の
端子電極部とを電気的に接続する方法に係り、特に金属
超微粒子を含む低温接合用金属ペーストを用いたフェー
スダウンボンディング法による半導体素子の実装方法お
よびその方法で作製した半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for electrically connecting an electrode portion of a semiconductor element (chip, pellet or die, etc.) and a terminal electrode portion on a circuit board, and particularly to a low temperature containing ultrafine metal particles. The present invention relates to a semiconductor element mounting method by a face-down bonding method using a bonding metal paste and a semiconductor device manufactured by the method.
【０００２】[0002]
【従来の技術】従来、電子部品の接続端子と回路基板上
の回路パターン端子との接続には、はんだ付けがよく利
用されてきたが、近年、例えば、ＩＣフラットパッケー
ジ等の小型化と、接続端子の増加により、接続端子間、
いわゆるピッチ間隔が次第に狭くなり、従来の半田付け
技術では対処することが次第に難しくなってきている。
そこで、最近では、例えば、裸の素子と呼ばれている外
装されていない能動、受動素子であるチップ（chip）、
ペレット（pellet）、ダイ（die）等と呼ばれている半
導体素子を回路基板上に接続する場合に、あらかじめ半
導体素子の電極パッド上に、Ｃr（クロム）、Ｃu（銅）
およびＡu（金）の３層の金属蒸着膜部を形成した後、
レジストを用いて、はんだやメッキあるいは蒸着によっ
て金属蒸着膜部を形成し、余分なレジストと金属蒸着膜
を除去して形成した、はんだバンプ電極面を、回路基板
の端子電極に対向して下向きに配置し、高温に加熱して
融着する方法が、接続後の機械的強度が強く、かつ電気
的接続が一括して行えることから有効な半導体素子の実
装方法とされていた。2. Description of the Related Art Conventionally, soldering has been often used to connect a connection terminal of an electronic component to a circuit pattern terminal on a circuit board. In recent years, however, for example, IC flat packages have been downsized and connection has been made. Due to the increase in the number of terminals,
The so-called pitch interval is becoming narrower and it is becoming more difficult to deal with it with conventional soldering techniques.
Therefore, recently, for example, a chip that is an active or passive element that is not packaged, which is called a bare element,
When semiconductor elements called pellets, dies, etc. are connected to a circuit board, Cr (chrome), Cu (copper) are preliminarily placed on the electrode pads of the semiconductor element.
And after forming a three-layer metal vapor deposition film part of Au (gold),
The solder bump electrode surface was formed by forming a metal deposition film part by soldering, plating or vapor deposition using a resist and removing the excess resist and the metal deposition film. The method of arranging, heating to a high temperature, and fusing is considered to be an effective method for mounting a semiconductor element because mechanical strength after connection is high and electrical connection can be performed at once.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、上述し
た従来のはんだバンプ電極による半導体素子の実装方法
においては、以下に示す問題があった。 （１）はんだを溶融する際に高温に加熱する必要があ
り、そのため半導体装置が熱応力の影響を受け易い。 （２）はんだバンプ電極を形成するはんだが、加熱溶融
の際に広がり、隣の電極とショートする危険性がある。However, the above-described conventional method of mounting a semiconductor element using solder bump electrodes has the following problems. (1) It is necessary to heat the solder to a high temperature when melting it, and therefore the semiconductor device is easily affected by thermal stress. (2) There is a risk that the solder forming the solder bump electrode spreads during heating and melting and short-circuits with the adjacent electrode.
【０００４】本発明の目的は、上記従来技術における問
題点を解消し、半導体素子に熱応力の影響を与えること
なく、微細ピッチの電極への接続であっても隣の電極と
ショートする危険性がなく、信頼性の高い電気接続を実
現できる半導体素子の実装方法およびその方法で作製し
た種々の半導体装置を提供することにある。The object of the present invention is to solve the above problems in the prior art, and to prevent the semiconductor element from being short-circuited with an adjacent electrode even if it is connected to an electrode having a fine pitch without being affected by thermal stress. It is an object of the present invention to provide a semiconductor element mounting method that can realize a highly reliable electrical connection and a variety of semiconductor devices manufactured by the method.
【０００５】[0005]
【課題を解決するための手段】上記本発明の目的を達成
するために、本発明は特許請求の範囲に記載のような構
成とするものである。すなわち、本発明は請求項１に記
載のように、半導体素子（チップ、ペレット、ダイなど
と呼ばれている素子）を回路基板の端子電極部に実装す
る方法であって、上記回路基板の端子電極上に、金属の
超微粉末を溶剤に分散させて調製した金属ペーストのボ
ールを形成する工程と、半導体素子の電極を、上記回路
基板の端子電極上に形成した金属ペーストのボール上に
フェースダウン法で接続する工程と、上記金属ペースト
中の溶剤を蒸発させて半導体素子と回路基板とを電気的
に接続する工程、もしくは、上記溶剤を蒸発させた後、
低温焼成により半導体素子と回路基板とを電気的に接続
する工程を、少なくとも用いた半導体素子の実装方法と
するものである。また、本発明は請求項２に記載のよう
に、請求項１において、金属ペーストは、金もしくは銀
の超微粒子を含む低温接合用貴金属ペーストを用いる半
導体素子の実装方法とするものである。また、本発明は
請求項３に記載のように、請求項１において、金属ペー
スト中の溶剤を蒸発させて半導体素子と回路基板とを電
気的に接続する工程は、１００〜１５０℃の温度範囲で
行う半導体素子の実装方法とするものである。また、本
発明は請求項４に記載のように、請求項１において、低
温焼成により半導体素子と回路基板とを電気的に接続す
る工程は、２００〜２５０℃の温度範囲で行う半導体素
子の実装方法とするものである。また、本発明は請求項
５に記載のように、請求項１ないし請求項４のいずれか
１項に記載の半導体素子の実装方法を用いて、回路基板
上に半導体素子を電気的に強固に接続した半導体装置と
するものである。本発明は上記した方法によって、回路
基板上の電極パッド部に、溶剤により適度に希釈した低
温接合用金属（金や銀等）ペーストの微細なボールを形
成し、該ボール上に、半導体素子の電極部をフェースダ
ウン法により接合し、溶剤の蒸発もしくは、上記溶剤の
蒸発と低温焼成を行うことにより、従来のはんだ付けの
際の高温加熱による熱応力の影響を受けることなく、ま
た、はんだの加熱溶融の際の横広がりによるショートの
危険性もなく、微小ピッチの接続であっても隣の電極と
ショートすることのない強固で信頼性の高い半導体素子
の電気的接続を実現できる効果がある。In order to achieve the above-mentioned object of the present invention, the present invention has a constitution as set forth in the claims. That is, the present invention provides a method of mounting a semiconductor element (element called a chip, pellet, die, etc.) on a terminal electrode portion of a circuit board as described in claim 1, wherein the terminal of the circuit board is A step of forming a metal paste ball prepared by dispersing ultrafine metal powder in a solvent on the electrode, and an electrode of the semiconductor element is faced on the ball of the metal paste formed on the terminal electrode of the circuit board. The step of connecting by the down method, the step of electrically connecting the semiconductor element and the circuit board by evaporating the solvent in the metal paste, or after evaporating the solvent,
The step of electrically connecting the semiconductor element and the circuit board by firing at low temperature is a method of mounting the semiconductor element using at least the method. Further, as described in claim 2, the present invention provides the method for mounting a semiconductor element according to claim 1, wherein the metal paste is a noble metal paste for low temperature bonding containing ultrafine particles of gold or silver. Further, according to the present invention, as in claim 3, in the step of evaporating the solvent in the metal paste to electrically connect the semiconductor element and the circuit board, the temperature range of 100 to 150 ° C. The method for mounting the semiconductor element is described in 1. Further, according to the present invention, as in claim 4, in claim 1, the step of electrically connecting the semiconductor element and the circuit board by low-temperature firing is performed in a temperature range of 200 to 250 ° C. It is a method. According to a fifth aspect of the present invention, the method for mounting a semiconductor element according to any one of the first to fourth aspects is used to electrically secure the semiconductor element on a circuit board. This is a connected semiconductor device. According to the present invention, fine balls of a low temperature bonding metal (gold, silver, etc.) paste appropriately diluted with a solvent are formed on the electrode pad portion on the circuit board by the above-described method, and the balls of the semiconductor element are formed on the balls. By joining the electrode parts by the face-down method and evaporating the solvent, or by evaporating the solvent and baking at a low temperature, there is no influence of thermal stress due to high temperature heating during conventional soldering, and There is no risk of short-circuiting due to lateral spread during heating and melting, and there is an effect that it is possible to realize a strong and reliable electrical connection of a semiconductor element that does not short-circuit with an adjacent electrode even with a fine pitch connection. .
【０００６】[0006]
【発明の実施の形態】図１（ａ）〜（ｃ）は、本発明の
実施の形態で例示する半導体素子の実装方法の工程を示
す図である。図１（ａ）は、本発明の半導体素子を実装
する場合の電極接続部の拡大図を示すもので、１は回路
基板、２は端子電極部、３は低温接合用貴金属ペースト
（真空冶金（株）製パーフェクトゴールド）で、Ａu
（金）微粒子（平均径が約０.０１μｍ程度）と分散溶
剤としてトルエンを含むペーストを用いて、高さ約２μ
ｍのボール状に形成したものである。まず、図１（ａ）
に示すように、回路基板１上の端子電極部２に、マイク
ロピペットを用いて、上記低温接合用貴金属ペースト３
を滴下し、高さ約２μｍ程度のボールを形成した。図１
（ｂ）は、上記低温接合用貴金属ペースト３のボール部
に対応する半導体素子４の電極パット部をフェースダウ
ン法でマウントした時の正面を示す模式図である。上記
の図１（ｂ）に示すように、ワイヤを用いないで直接ペ
レットをステムの導体にフェースダウンボンディングす
るフリップチップボンディング法により半導体素子４を
実装し、５分間、半導体素子４の重量によるレベリング
の後、１００〜１５０℃で約１０分間の熱風乾燥炉によ
り加熱して、低温接合用貴金属ペースト３中に含まれて
いるＡu微粒子の分散溶剤であるトルエンを蒸発、気化
させて電気的接続を行った〔図１（ｃ）〕。図１（ｃ）
は、トルエン気化後の、回路基板１および半導体素子４
の正面を示す模式図である。さらに、２００〜２５０℃
で３０分間の熱風炉により低温焼成を行うことにより、
より強固で信頼性の高い電気的接続を実現することがで
きた。なお、上記実施の形態では、Ａu（金）微粒子
（平均径が約０.０１μｍ程度）と分散溶剤としてトル
エンを含むペーストを用いたが、Ａｇ（銀）微粒子を使
用した場合も上記実施の形態と同様の信頼性の高い電気
的接続を実現することができた。1 (a) to 1 (c) are views showing steps of a semiconductor element mounting method exemplified in the embodiment of the present invention. FIG. 1 (a) is an enlarged view of an electrode connecting portion when a semiconductor element of the present invention is mounted. 1 is a circuit board, 2 is a terminal electrode portion, 3 is a noble metal paste for low temperature bonding (vacuum metallurgy ( Perfect Gold) made by Au
Using gold (fine) particles (average diameter of about 0.01 μm) and toluene as a dispersion solvent, a height of about 2 μm
It is formed in a ball shape of m. First, FIG. 1 (a)
As shown in FIG. 2, the above-mentioned low temperature bonding precious metal paste 3 is applied to the terminal electrode portion 2 on the circuit board 1 by using a micropipette.
Was dropped to form a ball having a height of about 2 μm. FIG.
(B) is a schematic diagram showing a front surface when the electrode pad portion of the semiconductor element 4 corresponding to the ball portion of the low temperature bonding precious metal paste 3 is mounted by a face-down method. As shown in FIG. 1B, the semiconductor element 4 is mounted by a flip chip bonding method in which the pellet is directly face-down bonded to the conductor of the stem without using a wire, and the leveling is performed by the weight of the semiconductor element 4 for 5 minutes. After that, it is heated in a hot air drying oven at 100 to 150 ° C. for about 10 minutes to evaporate and vaporize toluene, which is a dispersion solvent of Au fine particles contained in the noble metal paste 3 for low temperature bonding, to establish an electrical connection. It was carried out [Fig. 1 (c)]. FIG. 1 (c)
Is the circuit board 1 and the semiconductor element 4 after vaporization of toluene.
It is a schematic diagram which shows the front of. Furthermore, 200-250 ℃
By performing low temperature firing in a hot air oven for 30 minutes at
We were able to realize a stronger and more reliable electrical connection. In the above embodiment, a paste containing Au (gold) fine particles (average diameter of about 0.01 μm) and toluene as a dispersion solvent is used, but the case where Ag (silver) fine particles are used is also the same as the above embodiment. It was possible to realize a highly reliable electrical connection similar to.
【０００７】[0007]
【発明の効果】本発明の半導体素子の実装方法によれ
ば、請求項１に記載のように、回路基板の端子電極上
に、金属の超微粉末を溶剤に分散させて調製した低温接
合用金属ペーストのボールを形成する工程と、半導体素
子の電極を、上記回路基板の端子電極上に形成した金属
ペーストのボール上にフェースダウン法で接続する工程
と、上記金属ペースト中の溶剤を蒸発させて半導体素子
と回路基板とを電気的に接続する工程、もしくは、上記
溶剤を蒸発させた後、低温焼成により半導体素子と回路
基板とを電気的に接続する工程を、少なくとも用いる半
導体素子の実装方法としているので、従来のはんだ付け
のような高温加熱による熱応力を受けたり、また、はん
だの横広がりによるショートの危険性が全然なく、電極
の間隔が狭く、微細ピッチの電極接続であっても隣の電
極とショートすることなく、低温接合用金属ペーストに
より強固で信頼性の高い電気接続を実現できる効果があ
る。また、請求項２に記載のように、請求項１におい
て、金属ペーストは、金もしくは銀等の超微粒子を含む
低温接合用貴金属ペーストを用いるので、上記請求項１
の共通の効果に加えて、高性能の電気接続を実現できる
効果がある。また、請求項３に記載のように、請求項１
において、金属ペースト中の溶剤を蒸発させ、半導体素
子と回路基板とを電気的に接続する工程は１００〜１５
０℃の温度範囲で行うので、上記請求項１の共通の効果
に加えて、半導体素子等に熱応力を与えることなく信頼
性の高い電気接続を実現できる効果がある。また、請求
項４に記載のように、請求項１において、低温焼成によ
り半導体素子と回路基板とを電気的に接続する工程は２
００〜２５０℃の温度範囲で行うので、上記請求項１の
共通の効果に加えて、いっそう信頼性の高い電気接続を
実現できる効果がある。また、請求項５に記載のよう
に、請求項１ないし請求項４のいずれか１項に記載の半
導体素子の実装方法を用いて、回路基板に半導体素子を
電気的に接続して半導体装置を構成するため、上記請求
項１の共通の効果に加えて、信頼性の高い電気接続を有
する種々の半導体装置を実現できる効果がある。According to the method for mounting a semiconductor element of the present invention, as described in claim 1, for low temperature bonding prepared by dispersing ultrafine metal powder in a solvent on a terminal electrode of a circuit board. A step of forming a ball of metal paste; a step of connecting the electrode of the semiconductor element to a ball of metal paste formed on the terminal electrode of the circuit board by a face-down method; and evaporating the solvent in the metal paste. Method for electrically connecting the semiconductor element and the circuit board, or a step for electrically connecting the semiconductor element and the circuit board by low-temperature baking after evaporating the solvent, and at least a semiconductor element mounting method Therefore, there is no risk of thermal stress due to high temperature heating such as in conventional soldering, and there is no risk of short circuit due to lateral spreading of solder, the gap between electrodes is narrow, Without even switch electrode connected to the short and the adjacent electrodes, there is an effect that can realize a firm and reliable electrical connection by low-temperature bonding metal paste. Further, as described in claim 2, in claim 1, since the metal paste is a noble metal paste for low-temperature bonding containing ultrafine particles of gold or silver, the above-mentioned claim 1
In addition to the common effects of, there is an effect that a high-performance electrical connection can be realized. In addition, as described in claim 3,
In 100 to 15 steps of evaporating the solvent in the metal paste and electrically connecting the semiconductor element and the circuit board
Since the process is performed in the temperature range of 0 ° C., in addition to the common effect of the first aspect, there is an effect that a highly reliable electrical connection can be realized without applying thermal stress to the semiconductor element and the like. Further, as described in claim 4, in claim 1, the step of electrically connecting the semiconductor element and the circuit board by low temperature firing is 2
Since it is performed in the temperature range of 0 to 250 ° C., in addition to the common effect of the above-mentioned claim 1, there is an effect that a more reliable electric connection can be realized. Further, as described in claim 5, a semiconductor device is electrically connected to a circuit board by using the semiconductor element mounting method according to any one of claims 1 to 4 to form a semiconductor device. Because of the configuration, in addition to the common effects of claim 1, various semiconductor devices having highly reliable electrical connection can be realized.
【図１】本発明の実施の形態で例示した半導体素子の実
装方法の工程を示す図。FIG. 1 is a diagram showing a process of a method for mounting a semiconductor element illustrated in an embodiment of the present invention.
１…回路基板 ２…端子電極部 ３…低温接合用貴金属ペースト ４…半導体素子 DESCRIPTION OF SYMBOLS 1 ... Circuit board 2 ... Terminal electrode part 3 ... Low temperature bonding precious metal paste 4 ... Semiconductor element
Claims (5)
する方法であって、 上記回路基板の端子電極上に、金属の超微粉末を溶剤に
分散させて調製した金属ペーストのボールを形成する工
程と、 半導体素子の電極を、上記回路基板の端子電極上に形成
した金属ペーストのボール上にフェースダウン法で接続
する工程と、 上記金属ペースト中の溶剤を蒸発させて半導体素子と回
路基板とを電気的に接続する工程、 もしくは、上記溶剤を蒸発させた後、低温焼成により半
導体素子と回路基板とを電気的に接続する工程を、少な
くとも用いることを特徴とする半導体素子の実装方法。1. A method of mounting a semiconductor element on a terminal electrode portion of a circuit board, wherein balls of a metal paste prepared by dispersing ultrafine metal powder in a solvent are formed on the terminal electrode of the circuit board. The step of connecting the electrodes of the semiconductor element to the balls of the metal paste formed on the terminal electrodes of the circuit board by the face-down method, and evaporating the solvent in the metal paste to form the semiconductor element and the circuit board. And a step of electrically connecting the semiconductor element and the circuit board by low-temperature baking after evaporating the solvent, or at least a step of electrically connecting the semiconductor element and the circuit board.
しくは銀の超微粒子を含む低温接合用貴金属ペーストで
あることを特徴とする半導体素子の実装方法。2. The method for mounting a semiconductor element according to claim 1, wherein the metal paste is a noble metal paste for low temperature bonding containing ultrafine particles of gold or silver.
を蒸発させて半導体素子と回路基板とを電気的に接続す
る工程は、１００〜１５０℃の温度範囲で行うことを特
徴とする半導体素子の実装方法。3. The semiconductor device according to claim 1, wherein the step of evaporating the solvent in the metal paste to electrically connect the semiconductor device and the circuit board is performed in a temperature range of 100 to 150 ° C. How to implement.
素子と回路基板とを電気的に接続する工程は、２００〜
２５０℃の温度範囲で行うことを特徴とする半導体素子
の実装方法。4. The process according to claim 1, wherein the step of electrically connecting the semiconductor element and the circuit board by low temperature firing is 200 to
A method for mounting a semiconductor element, which is performed in a temperature range of 250 ° C.
記載の半導体素子の実装方法を用いて、回路基板に半導
体素子を電気的に接続してなることを特徴とする半導体
装置。5. A semiconductor device, characterized in that the semiconductor element is electrically connected to a circuit board by using the semiconductor element mounting method according to any one of claims 1 to 4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14274596A JPH09326416A (en) | 1996-06-05 | 1996-06-05 | Semiconductor element mounting method and product thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14274596A JPH09326416A (en) | 1996-06-05 | 1996-06-05 | Semiconductor element mounting method and product thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09326416A true JPH09326416A (en) | 1997-12-16 |
Family
ID=15322597
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14274596A Pending JPH09326416A (en) | 1996-06-05 | 1996-06-05 | Semiconductor element mounting method and product thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09326416A (en) |
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