JPH09275321A - Quadrature modulator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a quadrature modulator with an excellent modulation error characteristic by providing an active filter by a source follower between a phase shifter and a double balance mixer and providing a negative feedback differential amplifier to an output terminal side. SOLUTION: Two-system sine wave signals of a carrier frequency are fed to biphase signals to a 90 deg. phase shifter 11 and two sine wave signals whose phases are shifted by 90 deg. are generated. Twosystems of Lo and inverse of LO signals pass through active filter circuits 12, 12 and through an SCFL circuit 13. Outputs of the circuits 13, 13 are given to a double balance mixer 14, in which the signals are multiplied with a base band signal Ich or Qch. Current outputs of a couple of the mixers 14, 14 are added by an adder15, and an output of the adder 15 is given to a source follower 16, in which spurious radiation of a degree is reduced and given to a differential amplifier 17, and an output of the differential amplifier 17 is given to a source follower 18.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a quadrature modulator suitable for use in digital mobile communication, and more particularly to a quadrature modulator capable of reducing a modulation error.

[0002]

2. Description of the Related Art In recent years, with the progress of an advanced information society, research and development of systems and devices relating to mobile communication are becoming popular. In this research and development, for digital communication terminals such as digital mobile phones, digital car phones, and digital cordless phones, miniaturization and low power consumption have become problems.

From such a viewpoint, there is a direct conversion system as a modulation system suitable for miniaturization. This method directly up-converts a digital signal to a carrier frequency. According to this method,
Unlike the conventionally used super-heterodyne system, there is no need for processing in the intermediate frequency band, so there is an advantage that the size can be reduced.

As described above, the direct conversion system is suitable for miniaturization, but the quadrature modulator of the transmission section must process a high carrier frequency in the GHz band. For this reason, it is inevitable that this system will have difficulty in reducing the modulation error, which is considered important in digital signal transmission.

FIG. 7 is a conceptual diagram of a quadrature modulator. As can be seen from this figure, in this modulator, the sine wave signal (LO) of the carrier frequency is input, and the 90 degree phase shifter 1 produces two sine wave signals that are 90 degrees out of phase with each other.
A system LO signal is generated. The LO signals of these two systems are input to the different multipliers 2 and 3, respectively, and are multiplied by the baseband signals of the different systems. The outputs from these multipliers 2 and 3 are added in the adder 4 to become an output signal as a quadrature modulator.

The ideal output S (t) of such a quadrature modulator can be expressed by the following equation.

S (t) = Ich (t) · Cos (ωc · t) + Qch (t) · Sin (ωc · t) (a) where ωc is the angular frequency of the LO signal, Ich (t), Qch
Each (t) indicates a baseband signal. The baseband signal is not a sine wave, its frequency band is 100 KHz
It is about the order of magnitude and is orders of magnitude lower than the LO signal. Therefore, in the following description, the baseband signal is treated as a DC signal. Note that the amplitude is standardized to 1 in the expression (a).

Multiplier (2,3) used in the quadrature modulator
Is a four-quadrant multiplier in which the output voltage is obtained as being directly proportional to the product of the two voltages, regardless of the polarity of the input. A double balance mixer having a differential circuit configuration is used as the four-quadrant multiplier. FIG. 8 shows eight Fs.
It is a circuit diagram as an example of the double balance mixer comprised from ET T1 to T8. The outputs of the two double balance mixers as multipliers are current-added, and the output voltage is generated by the load resistance. Since the multiplier is configured as a differential circuit as a double balance mixer,
Both phase signals are required as the LO signal and the baseband signal input to this.

In digital signal communication, modulation accuracy is one of the important performances. As a factor of the modulation error generated in the quadrature modulator, the amplitude difference between the two systems of LO signals input to the quadrature modulator is first considered. If there is an amplitude difference, a modulation error will occur after multiplication and addition. This difference in amplitude is caused by variations in the characteristics of the elements that form the circuit.

Now, it is assumed that the quadrature modulator is a completely ideal circuit for performing multiplication / addition of the mathematical formula represented by the formula (a).
Then, consider the case where the two systems of LO signals input to the quadrature modulator have the following amplitude differences.

(1 + a) ΔV (1-a) ΔV At this time, the modulation error ME is expressed by the following equation.

ME = a / ΔV

[0013]

The inventor of the present invention has made an independent study and has come to understand and know the following.

From the above equation, it is clear that in order to reduce the modulation error ME, a should be reduced or the amplitude ΔV should be increased. This a is caused by variations in the elements, and it is practically difficult to reduce it by circuit design. However, it is not impossible to increase the amplitude ΔV. That is, if the amplitude ΔV of the LO signal input to the quadrature modulator can be increased, the modulation error can be reduced.
In order to increase the amplitude ΔV, it seems that an amplifier for amplifying the amplitude should be inserted between the 90 ° phase shifter and the quadrature modulator. However, the present inventors consider that this method has the following three problems.

(1) Problem of Minimum Allowable Input Amplitude of Differential Amplifier As described above, the multiplier, which is the core of the quadrature modulator, is a differential circuit, so that the amplifier at the preceding stage is also configured by a differential circuit. Will be However, considering the element variations that actually exist, the differential circuit may not be able to amplify an input signal with a small amplitude. It is considered that the pair of FETs in the differential circuit actually have variations in element characteristics such as threshold values. This is substantially equivalent to the difference between the DC levels of the input two-phase signals. And, this means that the duty ratio of the LO signal deviates from 50% of the ideal value.
If the substantial DC level difference between the two-phase signals exceeds the amplitude, the duty ratio falls below 0%. That is, the signal does not exist, and the differential amplifier can no longer output a sine wave. Even if the situation is not so bad, if the duty ratio of the LO signal deviates from 50%, it causes deterioration of the modulation error.

(2) Problem that phase difference occurs due to multistage amplifiers To input a sufficiently large amplitude LO signal to the multiplier, an amplifier having a sufficient gain is required.

When an FET is used as a basic element, the circuit type is SCFL. However, in this case, the FET
The transconductance of is smaller than that of a bipolar transistor, and the gain of one stage of SCFL is relatively small. Therefore, in this case, a large gain is obtained by the multistage connection. This lengthens the path of the two LO signals. This may cause a difference in path delay between the two systems due to variations in element characteristics. If there is a difference in path delay, the phase difference between the two LO signals may deviate from the ideal value of 90 degrees.
When the phase difference between the LO signals of the two systems deviates from the ideal value and becomes ΔV · cos (ωc · t + b) ΔV · sin (ωc · t-b), the modulation error ME is expressed by the following equation.

ME = b [rad] Therefore, if a multi-stage amplifier is arranged in front of the quadrature modulator in order to reduce the amplitude difference, a new phase difference will occur this time even if the purpose can be achieved. This causes a problem that this phase difference causes a modulation error. Further, the multi-stage amplifier causes a problem of increasing power consumption.

(3) The problem that the maximum allowable input amplitude for the LO signal of the double balance mixer is small In the following, the case where the circuit is composed of FETs will be described as an example.

As shown in FIG. 8, the double balance mixer is composed of two vertically stacked SCFLs. The baseband signals B and / B are input to the lower stage, and the LO signals LO and / LO are input to the upper stage. A pair FET that receives the baseband signal
The sources of T5 and T6 are connected via a resistor R _S, and negative feedback is applied to the baseband inputs B and / B. By sufficiently increasing the value of the resistor R _S , the linearity of the circuit with respect to the baseband inputs B and / B is significantly improved and the maximum allowable input amplitude is also increased. In the multiplier, the linearity of the baseband signal is very important.
This is because the non-linearity of the baseband signal directly causes a modulation error.

On the other hand, no means for improving the linearity is applied to the inputs of the LO signals LO and / LO. The reason is that the upper pair FETs T1, R3; T2, T4 must have non-linearity in order to realize the function of multiplication. What if the upper pair FET
When T1, R3; T2, T4 operate linearly, multiplication is no longer performed. Therefore, in the essence, the double balance mixer has a problem that the linearity with respect to the LO signal is poor and the maximum allowable input amplitude is small.

In the above consideration by the present inventor, the multiplier has been considered as ideally for performing mathematical multiplication. On that assumption, in order to suppress the modulation error, LO
It has been explained that it is effective to increase the signal amplitude. However, in reality, when a LO signal having a large amplitude is input to the multiplier, the output signal is distorted due to the non-linearity of the input section and spurious is generated. Unlike the spurs in the amplifier, the spurs in the multiplier are modulated by the baseband signal. That is, the amplitude and phase of each spurious changes depending on the baseband signal. As will be described later, the spurious component having such a property causes a modulation error in the subsequent stage of the quadrature modulator.

First, the phenomenon in which the spurious output of the quadrature modulator is modulated by the baseband signal will be described.

The baseband signal input to the quadrature modulator is in an order of magnitude lower frequency band than the LO signal.
For simplicity of explanation, the baseband signal is treated as a DC signal here. This is equivalent to considering a time domain in which the baseband signal can be regarded as a “constant value”.

Now, as a modulation method, π / 4 used in the personal handyphone system (PHS).
Assuming the shift-QPSK method, the baseband signals (Ich, Qch) have the following 8 at the sampling time.
Take one of the three combinations.

(1,0) (1/2 ^1/2 , ^{1/2 1/2} ) (0,1) (-1/2 ^1/2 , ^{1/2 1/2} ) (-1,0) (-1/2 ^1/2, -1 / 2 ^1/2) (0, -1) ^(1/2 1/2, -1 / 2 ^1/2) Note that the eight vectors of the ideal Signal vector of the output signal of the quadrature modulator itself, that is, the Cos (ωc · t) component of the output signal is the x-coordinate component, and Sin (ωc · t)
It is the vector itself when the t) component is the y coordinate component. Also, the above baseband signals (Ich, Qch) are
It is standardized that the magnitude of the vector becomes 1.

Now, consider the case where the baseband signals (Ich, Qch) are (1, 0) and (1/2 ^1/2 , ^{1/2 1/2} ).

As described above, the quadrature modulator is composed of a double balance mixer having a differential circuit structure.
Due to its symmetry, other baseband signals (Ich, Q
The output waveform for ch) will match either of the output waveforms in the above two cases by appropriately shifting the phase in units of 45 degrees. Here, since the purpose is to analyze spurious, only the above two cases need to be considered.

First, the ideal case will be considered. That is, as described above, the quadrature modulators have 90
Consider an ideal situation where a sinusoidal LO signal is input with a phase shift of 0 degrees and the maximum allowable input amplitude for the LO signal of the multiplier is sufficiently large compared to the amplitude of the LO signal. In such a situation, the output S of the quadrature modulator
(t) is given by the equation (a). Baseband signal (I
When (ch, Qch) is (1, 0), S (t) = cos (ωc · t), and (Ich, Qch) is (1/2 ^1/2 , ^{1/2 1/2} )
In the case of, S (t) = sin (ωc · t + π / 4). Therefore, in such an ideal situation, the quadrature modulator always outputs only the sine wave of the fundamental frequency, and spurious is not generated.

On the other hand, as described above, actually, in the double balance mixer which is the multiplier of the quadrature modulator,
The maximum allowable input amplitude for the LO signal input is small. In order to express this situation by an equation, it is necessary to consider the LO signal as a kind of rectangular wave instead of a sine wave. In order to enable intuitive analysis, the LO signals L01 (t) and L02 (t) of the two systems are regarded as the following rectangular waves as the most extreme rectangular waves.

L01 (t) = L0 (t) = 0 (when ωc · t = 0, π) = 1 (when 0 <ωc · t <π) = −1 (π <ωc · t <2π L02 (t) = L0 (t− (π / 2)) (b) At this time, the output signal S (t) of the quadrature modulator is expressed as follows.

When (Ich, Qch) is (1, 0) S (t) = LO (t) (Ich, Qch) is (1/2 ^1/2 , ^{1/2 1/2} ) (c ) S (t) = (1/2 ^1/2 ) [LO (t) + Lo (t- (π / 2))] (d) Now, the rectangular wave defined by Lo (t) is as follows. Fourier expanded to.

Lo (t) = (4 / π) {sin (ωc · t) + (1/3) sin (3ωc · t) + ...} (e) Here, regarding the lowest-order third-order spurious To analyze.

Substituting equation (e) into equation (c) and equation (d) yields the following results:

When (Ich, Qch) is (1, 0) S (t) = (4 / π) {sin (ωc · t) + (1/3) sin (3ωc · t) + ...} ( f) When (Ich, Qch) is (1/2 ^1/2 , ^{1/2 1/2} ) S (t) = (4 / π) {sin (ωc · t ')-(1/3) sin (3ωc · t ′) + ...} (g) Here, t ′ is a new time axis obtained by shifting the origin of the time axis t as in the following equation.

T '= t- (π / (4ω · c)) In the equations (f) and (g), the sign of the second term is opposite. This is a caveat. From this, the following can be understood. That is, it can be seen that although the magnitude of the third-order spurious does not change even if the baseband signal changes, the phase of the third-order spurious with respect to the fundamental wave changes by π. This phenomenon that the phase changes is a factor that causes a modulation error because the amplifier arranged and connected in the subsequent stage of the quadrature modulator has nonlinearity.

Actually, due to the presence of higher-order spurious, the amplitude of the third-order spurious also changes depending on the baseband signal. Naturally, the change in the amplitude of the third-order spurious also causes a modulation error. However, the influence of the change in the amplitude of the third-order spurious on the modulation error is sufficiently smaller than that of the change in the phase. The present inventor has confirmed this by circuit simulation.

Next, the modulation error caused by the synergistic effect of the spurious depending on the baseband signal and the nonlinearity of the amplifier in the subsequent stage of the quadrature modulator will be described.

When the expressions (f) and (g) are summarized, the output of the quadrature modulator when the third-order spurious is considered is expressed by the following expression.

S (t) = sin (ωc · t) + (1/3) sin (3ωc · t + φ) (h) Again, the amplitude is normalized to 1. In addition, in order to avoid complicated formulas, the time axis t is
It is assumed that the time axis is shifted as represented by n (ωc · t). In practice, when the baseband signal changes, the phase of the output fundamental wave changes in 45 degree units.

In the devices so far, the baseband signals (Ich, Qch) are (1, 0) and (1/2 ^1/2 , 1).
Although only two points of / 2 ^1/2 ) have been considered, the equation (h) actually holds over eight points.

Here, the concept of the modulation error will be described. The (amplitude, phase) of the fundamental frequency component of the signal S (t) represented by the equation (h) is always (1, 0) regardless of the baseband signal. Since the time axis is defined as described above, the phase is always 0 in the ideal situation. Therefore, it can be said that this is a situation in which there is no modulation error. However, if the (amplitude, phase) of the fundamental wave component does not become (1,0) × (constant value) after the signal S (t) passes through the non-linear circuit, a modulation error occurs. It will be a matter.

Now, the important point is that the second part of the equation (h) is used.
It means that the phase φ in the term takes a value of 0 or π depending on the baseband signal.

The output S (t) of the quadrature modulator is distorted by the amplifier arranged in the subsequent stage. Here, consider a case where the amplifier has an input / output characteristic including a third-order distortion represented by the following equation.

W (t) = S (t) −k · S (t) ³ (i) In this equation (i), W (t) is the output of the amplifier and S (t)
Is an input, which is a trigonometric function as represented by equation (h). Further, k is a coefficient indicating the magnitude of the third-order distortion. Substituting equation (h) into equation (i) and transforming into a spectrally decomposed expression, the vector (amplitude, phase) of the fundamental frequency (LO frequency) is derived. The expression becomes quite complicated, but when expanded with the power of k representing the magnitude of nonlinearity, sin (φ) and cos (φ) appear in the first-order coefficient of k. Even if there is a third-order spurious in S (t), if the phase φ does not change, the signal point vector becomes (1,0) × (constant value) and no modulation error occurs. However, as described above, the phase of the third-order spurious is actually changed by the baseband signal, so that the fundamental wave vector deviates from the original signal point vector due to the change of the baseband signal. This means that a modulation error has occurred. That is, the third-order quadrature modulator (or higher-order spurious that has not been discussed here) and the third-order distortion of the latter-stage amplifier (or higher-order nonlinearity not discussed here). Modulation error occurs due to the synergistic effect with distortion.

Further, this phenomenon becomes more serious due to the presence of the variable attenuator provided between the quadrature modulator and the amplifier as described below.

In the portable radio, it is necessary to adjust the output power of the transmitted radio wave according to the situation. For this reason, a variable attenuator is provided before the amplifier. The output signal of the quadrature modulator having spurious components has a larger spurious component due to the attenuator in the next stage. The reason is that the frequency characteristic of the attenuator, contrary to that of the amplifier, decreases as the frequency becomes higher. As described above, the presence of the attenuator increases the generation of the modulation error due to the non-linearity of the amplifier in the latter stage of the attenuator.

As described above, the direct conversion system is a system suitable for downsizing of wireless terminals, but the modulation error generated in the quadrature modulator of the transmitter and the output signal of the quadrature modulator depend on the baseband signal. Generate spurious. There is a problem that a modulation error occurs due to the synergistic effect of this spurious and the non-linearity of the amplifier arranged in the subsequent stage of the circuit.

[0049]

SUMMARY OF THE INVENTION A first aspect of the present invention is as follows.
A phase shifter that inputs a local signal and outputs a pair of output signals that are out of phase by a predetermined angle, and inputs a pair of output signals from this phase shifter, respectively, using a source follower pair, A pair of active filters and a pair of double balance mixers that receive outputs from each of these pair of active filters, and a common output from these pair of double balance mixers. And a dynamic circuit.

A second aspect of the present invention is a 90-degree phase shifter that outputs a pair of sine wave signals that are substantially 90 degrees out of phase with each other based on the input of a local signal, and the pair of sine wave signals. In a quadrature modulator including a pair of double balance mixers for inputting each of the above, at least one stage of active filter is provided between the 90-degree phase shifter and the double balance mixer. The respective output sides of the source followers are connected to the gate electrodes of the current source FETs of the source followers on the other side through capacitors, and the gate electrodes are connected to the power source through resistors, and the capacitors And the resistor is configured as such that a maximum gain is obtained at the frequency of the local signal. Further, a differential amplifier is connected to the latter stage of the common output terminals of the pair of double balance mixers. In this differential amplifier, source electrodes of a pair of FETs that receive input signals of both phases are connected to each other. In addition, a load is provided at the output terminal, and the frequency characteristic is such that the attenuation of the gain starts at a frequency lower than the frequency three times the frequency of the local signal.

[0051]

BEST MODE FOR CARRYING OUT THE INVENTION Prior to a detailed description of the embodiments of the present invention, a brief description will be given of how and how the problems (1) to (3) described above were solved. To do.

As means for solving the above problems (1) and (2), in the present invention, a basic circuit having the following structure is provided between the 90-degree phase shifter and the doubler balance mixer in one or more stages. Provided.

That is, the basic circuit is a kind of active filter based on a pair of source followers, and has a suitable value with the gate electrode of the current source FET of the source followers in which the pair of source follower outputs face each other. The gate electrode is connected via a capacitance Cf, and the gate electrode is connected to a DC potential via a resistor Rb having an appropriate value. The capacitance Cf and the resistor Rb are set so that the gain of the active filter by the source follower becomes maximum at the frequency of the LO signal.

Since the active filter based on the source follower operates as a normal source follower pair in terms of DC, it operates independently for signals of both phases. Therefore, even if the DC levels of the two-phase input signals are deviated, they do not affect each other, and the signals do not disappear in the source follower. Therefore, the first problem of not operating at all when the DC level fluctuation due to element variation exceeds the amplitude does not occur. Further, the AC has a configuration in which positive feedback is applied, and has characteristics as a so-called active filter. Feedback capacitance Cf, and
By optimizing the value of the resistor Rb that forms an RC network for DC cut in pairs with the capacitor Cf, L
It is possible to realize a gain of about 13 dB at the O signal frequency. In this way, a sufficiently large gain can be realized with one stage, so that the amplitude of the LO signal given to the multiplier can be increased with a small number of stages, such as about two stages. Therefore, the paths of the LO signals of the two systems are shorter than in the conventional case, and the phase difference due to element variation is reduced. That is, with such a configuration, the two systems of LO input to the multiplier are
It can be reduced based on the amplitude difference and phase difference between signals. As a result, it is possible to reduce important modulation error in digital signal communication. Further, the active filter based on the source follower has a flip-flop-like circuit concept in terms of AC, and therefore operates in a complementary manner. As a result, for example, when the amplitudes of the input signals of both phases are deviated from each other, or when the duty ratio is an ideal value of 5
When it deviates from 0%, it has an excellent effect of returning to the original condition of the same amplitude and 50% duty ratio. This action also greatly contributes to the reduction of the modulation error caused by the variation of the elements.

As means for solving the problem (3), the present invention provides an amplifier having the following configuration and frequency characteristics between the quadrature modulator and the variable attenuator.

That is, the amplifier is a differential amplifier, in which the source electrodes of the FET pair for receiving the input signals of both phases are connected via a resistor having an appropriate value, and the output terminal has an appropriate size. Capacity is provided. This capacitance may be the input capacitance of the next stage or the wiring capacitance. The frequency characteristic of the LO signal starts to be attenuated at a frequency lower than three times the LO signal frequency.

The differential amplifier provided immediately after the quadrature modulator has the structure of a negative feedback amplifier in which the sources of the pair FETs are connected via a resistor, and the input / output characteristics are excellent in linearity. It can be something. Therefore, there is no occurrence of a modulation error due to the synergistic effect of the non-linearity of the differential amplifier and the spurious of the third order or higher which the output signal of the quadrature modulator has. Moreover, since it is designed so that the attenuation of the gain starts at a frequency equal to or lower than three times the fundamental frequency, it is possible to suppress a spurious signal of the third order or higher. Therefore, it is possible to suppress the occurrence of a modulation error due to the synergistic effect of the non-linearity of the preamplifier or the power amplifier arranged in the subsequent stage and the spurious of the output signal of the quadrature modulator.

FIG. 1 schematically shows an embodiment of a quadrature modulator according to the present invention.

At the LO signal input terminal, the carrier wave frequency (here, 1.9 GHz which is the carrier wave frequency of the personal handyphone system). These two systems of sine wave signals (LO, / LO) are both phases. Input as a signal,
It is added to the 90-degree phase shifter 11. The phase shifter 11 generates two sine wave signals that are 90 degrees out of phase with each other. Each of the two systems of LO signals LO, / LO passes through the two-stage active filter circuits 12, 12 by the source follower which is the first feature of the present invention, and further the general-purpose S signal.
It passes through the CFL circuit 13. Sufficient gain has already been given by the two stages of the active filter circuits 12 and 12 by the source follower, but this SCFL circuit 13 is an LO fed to the double balance mixer 14.
It is provided for level adjustment to make the DC level of the signal the optimum value. In order to achieve the purpose of level adjustment, the load resistance value of the differential section of the SCFL circuit 13 and the level shift amount of the source follower section are adjusted. The outputs of the SCFL circuits 13 and 13 are input to the double balance mixer 14, respectively. Each of the double balance mixers 14, 14 multiplies the output of each SCFL circuit 13 by the baseband signal Ich or Qch. A pair of double balance mixers 14,1
The outputs of 4 are current-added by the adder 15 and flowed through a common load resistor to generate a desired output signal. The output from the adder 15 is then input to the source follower 16. The source follower 16 is provided to enhance the current driving capability and reduce spurious to some extent. Since the source follower 16 is a circuit having excellent linearity, there is no possibility that a modulation error will occur in this circuit. The differential amplifier 17, which is the second feature of the present invention, is arranged next to the source follower 16.
It is connected. The amplifier 17 is configured as a negative feedback amplifier in which the sources of the pair FETs are connected via a resistor Rs (see FIG. 8). The frequency characteristic of the gain of the resistor Rs, which is determined by the relationship between the load resistance of the circuit and the load capacitance (in this case, the input capacitance of the source follower circuit in the next stage), attenuates at a frequency lower than the frequency three times the carrier frequency. Is set. At the final stage as the output side of the differential amplifier circuit 17, the source follower 18 is connected,
This source follower is provided as an output circuit of the quadrature modulator. Although not shown in FIG. 1, the output of the source follower 18 is followed by a variable gain amplifier,
The preamplifier and the power amplifier will be connected in that order.

FIG. 2 shows details of an example of an active filter circuit 12 (hereinafter referred to as a source follower active filter) by a source follower in the embodiment of FIG. A pair of source follower FETs 21,
The current source F of the source follower in which the outputs of 21 are opposite to each other
ET22,22 gate electrode and capacitance Cf, C of appropriate value
It is connected via f. Moreover, the gate electrode of each FET 22 is connected to the DC potential Vb through the resistor Rb having an appropriate value. The capacitance Cf and the resistor Rb are set so that the gain of the active filter 12 by the source follower becomes maximum at the frequency of the LO signal input. FIG. 3 shows frequency characteristics of the source follower active filter 12. LO
It can be seen that the gain reaches the maximum value of 13 dB at the signal frequency (1.9 GHz). In this embodiment, the source follower active filter 12 is connected in two stages, thereby realizing a gain of 26 dB.

FIG. 4 shows the double balance mixer 1 of FIG.
4 is a detail of the differential amplifier circuit 17 arranged in the latter stage of FIG.
The sources of the pair FETs 31 and 31 are connected to each other via a resistor Rs to form a negative feedback amplifier. For this reason,
The linearity of input / output characteristics is excellent. When the value of the resistance Rs is increased, the linearity of input / output is improved, but the band in the frequency characteristic is reduced. This can be considered a disadvantage when designing a wide band amplifier, but in the present invention, this characteristic is positively used to cut a signal component of 3 times or more the fundamental frequency. Load resistance 32,
By optimizing 32, the resistance Rs, and the load capacitance (here, the input capacitance of the source follower in the next stage), the third-order spurious can be attenuated by 5 dB.

FIG. 5 is a schematic diagram of a conventional quadrature modulator.
Since this is well known, detailed description is omitted. The first difference between the circuit of FIG. 5 and the circuit of the embodiment according to the present invention shown in FIG. 1 is that the normal SCFL circuit 13 is provided between the 90-degree phase shifter 11 and the double balance mixer 14. It is a point that is connected in stages.

A mobile radio terminal is required to have low power consumption, and its power supply voltage is required to be as low as about 3V. S that can be realized under this low power supply voltage
The CFL gain is about 6 dB at most. Therefore, at least 5 stages are required to realize a gain similar to that of the present embodiment. When the SCFL is divided into a differential stage and a source follower stage and several stages are provided, the LO amplifier of the conventional example has 10 stages, whereas the LO amplifier of the present example has 4 stages, which is half that of the conventional example. You can see that it is as follows. As described above, since the number of SCEL stages is reduced, according to the present embodiment, the difference in path delay due to element variation, that is, the phase difference which is one factor of the modulation error can be reduced.

The second difference between this embodiment and the conventional example is that in the conventional example, the output stage of the quadrature modulator is not provided with a circuit for removing spurious generated in the double balance mixer. is there. As described above, if the spurious generated by the double balance mixer is ignored, a modulation error will occur in the amplifier in the subsequent stage due to the spurious. According to the circuit simulation by the present inventor, in the conventional quadrature modulator, the magnitude of the third-order spurious is (−19d).
Bc). On the other hand, the magnitude of the third-order spurious of the quadrature modulator according to the embodiment of the present invention is (-26 dB).
c). In this embodiment, the source follower 16 in the preceding stage of the spurious eliminating differential circuit 17 is also designed to remove the third-order spurious as much as possible by intentionally providing a load capacitance. Therefore, compared to the conventional example, 7
I was able to remove spurious by only dB.

The present inventor investigated the quantitative relationship between the third-order spurious generated by the quadrature modulator and the modulation error caused by the non-linearity of the amplifier arranged after the quadrature modulator by circuit simulation. In this simulation, the latter-stage amplifier was treated with a static third-order distortion model. As a result, the modulation error generated by the amplifier in the subsequent stage is caused by the magnitude a of the third-order spurious which the output signal of the quadrature modulator has and the third-order spurious caused by the non-linearity of the amplifier arranged in the latter stage of the quadrature modulator. We have learned that it is given by the graph of FIG. 6 as a function of the size b and the sum (a + b). FIG.
The horizontal axis of (a) is (a + b), and the vertical axis is the modulation error generated by the synergistic effect of the spurious of the quadrature modulator and the non-linearity of the amplifier in the subsequent stage.

Now, as an example, the amplifier at the latter stage is (-20
The case where it has a nonlinearity that generates a third-order spurious of (dBc) is examined. The modulation error generated by the synergistic effect of this non-linearity and the spurious of the quadrature modulator is 3.3% in the conventional example, but may be 1.5% or less than half in the present embodiment. Do you get it.

The FET used in the circuit simulation
The model of MESFE is configured by using tungsten nitride in which an active layer is formed by selective ion implantation of Si on a semi-insulating substrate and tungsten is stacked on the gate.
T, which is formed by using a P layer embedding process with a gate length of 0.6 μm.

Next, parameters of main circuits of the embodiment shown in FIG. 1 will be described.

The power supply voltage Vcc is 2.7V, and the threshold voltage of the FET is -0.3V.

(1) Source follower active filter The source follower active filter has a two-stage configuration. First, the former stage will be described. FET gate width is 1
0 μm, feedback capacitance Cf is 100 fF, resistance R
b is 5 KΩ, and the bias voltage Vb applied to the gate of the constant current source FET is 0V.

The gate width of the second-stage FET is 20 μm, C
f is 200 fF and Rb is 2.5 KΩ.

(2) Double balance mixer The gate width of all FETs is 20 μm, and the paired FETs in the lower stage
The resistance Rs provided between the sources of the FET is 500Ω, the bias voltage applied to the gate of the constant current source FET is 0V,
The load resistance common to two double balance mixers is 50.
0Ω.

(3) Differential amplifier circuit after the double balance mixer The gate width of the pair FET is 20 μm, the gate width of the constant current source FET is 10 μm, the load resistance is 1.1 KΩ, the pair FET
The resistance provided between the sources is 500Ω, and the bias voltage applied to the gate of the constant current source FET is 0V.

[0074]

As described above, according to the present invention, the active filter by the source follower is provided between the phase shifter and the double balance mixer, and the negative feedback type differential amplifier is provided at the output end side. Since it is provided, it is possible to obtain a quadrature modulator having a modulation error superior to the conventional one, and thus it is possible to realize a transmission module for a mobile terminal including such a quadrature modulator.

[Brief description of drawings]

FIG. 1 is a schematic diagram of an embodiment of a quadrature modulator according to the present invention.

FIG. 2 is a circuit diagram of a source follower active filter in FIG.

[Fig.3] Frequency characteristics of gain of source follower active filter

FIG. 4 is a circuit diagram of a differential amplifier in the latter stage of the double balance mixer in FIG.

FIG. 5 is a schematic diagram of a conventional quadrature modulator.

FIG. 6 is a graph showing the relationship between the sum of the third-order spurious (a) of the quadrature modulator and the third-order spurious (b) caused by the non-linearity of the amplifier in the subsequent stage, and the modulation error generated by this synergistic effect.

FIG. 7 is a conceptual diagram of a quadrature modulator.

FIG. 8 is a circuit diagram of a double balance mixer using FETs.

[Explanation of symbols]

Ich, Qch, B Baseband signal LO Local signal SCFL Source coupled FET logic (Source C
oupled FFT Logic) SF Source Follower DBM Double Balance Mixer IN Input Terminal OUT Output Terminal Cf Feedback Capacitance Rb Bias Resistance Rs Resistance Connected Between Sources of Pair FET of Differential Circuit

Claims (2)

[Claims] 1. A phase shifter for inputting a local signal to output a pair of output signals whose phases are shifted by a predetermined angle, and a source follower for inputting each of a pair of output signals from the phase shifter. A pair of active filters using a pair, a pair of double balance mixers that receive the output from each of these pair of active filters, and a common output from the pair of double balance mixers. A quadrature modulator, which comprises: 2. A pair of sine wave signals that are substantially 90 degrees out of phase with each other based on the input of a local signal are output.
A quadrature modulator including a 0-degree phase shifter and a pair of double balance mixers for inputting each of the pair of sine wave signals, wherein at least one active stage is provided between the 90-degree phase shifter and the double balance mixer. A filter is provided, and in this active filter, each output side of the pair of source followers is connected to the gate electrode of the current source FET of the source follower on the other side through a capacitor, and each gate electrode is a resistor. Is connected to a power source through the capacitor, and the capacitance and the resistor are set so as to obtain a maximum gain under the frequency of the local signal, and the pair of A differential amplifier is connected after the common output terminal of the double balance mixer. The source electrodes of a pair of FETs that receive the signal are connected to each other, a load is provided at the output terminal, and the frequency at which gain attenuation starts at a frequency lower than three times the frequency of the local signal. A quadrature modulator characterized in that it is configured as having characteristics.