JPH09191092A - Method of forming polycrystalline silicon film and method of manufacturing capacitor of semiconductor device using the same - Google Patents

Abstract

(57) Abstract: A method for manufacturing a silicon film and a method for manufacturing a capacitor storage electrode using the same are provided. A silicon film is formed of SiH ₄ gas and Si ₂ H ₆
Gas is sequentially injected to form SiH ₄ gas and S
It is formed by adjusting the mixing ratio with the i ₂ H ₆ gas and simultaneously injecting. According to the method for forming a silicon film of the present invention, it is possible to prevent the occurrence of voids in the silicon film formed in a contact hole or a portion having a large step on the semiconductor substrate, thereby increasing the reliability of the silicon film and locally crystallization. HSG polycrystalline silicon is not partially formed because the film formation rate is improved without occurrence of bald defect (bald defec
t) The phenomenon is also prevented. Particularly, when applied to a capacitor manufacturing process, a storage electrode having a defect-free surface area maximized can be formed, and the capacitance of the capacitor can be improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to silane (SiH ₄ ) gas and disilane (S).
A silicon film capable of preventing the generation of voids by forming a silicon film using i ₂ H ₆ ) gas and forming uniform hemispherical grain (HSG) polycrystalline silicon on the entire surface of the silicon film. And a method for manufacturing a capacitor storage electrode using the same.

[0002]

2. Description of the Related Art DRAM (Dynamic Random Access Memory)
Comprises a memory cell composed of one capacitor and one transistor. In particular, capacitors used as a means for storing information are very important in DRAM devices. By the way, in order to enable the division of information, a charge amount of a certain magnitude or more is required. Therefore,
A certain amount of charge or more should be induced in the capacitor.
The charge amount Q of the capacitor is the capacitance C of the capacitor.
And the operating voltage V are multiplied. However, at this time, the operating voltage is gradually decreasing. Therefore, the capacitance must be increased in order to obtain a specific charge or more.

Capacitance can be increased by first increasing the effective area of the capacitor, by using a second, high dielectric constant dielectric, and third by decreasing the thickness of the dielectric. Particularly, as the integration degree of the DRAM device increases, the area occupied by the capacitor gradually decreases. Therefore, it is essential to increase the surface area of the storage electrode in order to form a capacitor suitable for a highly integrated DRAM device. Methods used to increase the surface area of the storage electrode include a structural method of three-dimensionally forming the structure of the electrode and a physical property deformation method of forming HSG polycrystalline silicon on the surface of the storage electrode.

The method of forming HSG polycrystalline silicon uses a unique physical phenomenon that occurs during the process of phase conversion of amorphous silicon into polycrystalline silicon. When amorphous silicon is vapor-deposited on the substrate and then heated, the amorphous silicon forms fine hemispherical grains or the like, and undergoes phase conversion into intermediate polycrystalline silicon having an uneven surface. The uneven surface formed through the transformation process increases the surface area by a factor of 2 to 3 compared to the flat surface.

Hereinafter, a method of manufacturing a storage electrode using the method of forming HSG polycrystalline silicon will be described. First, as shown in FIG. 1, after forming a field oxide film 12 on a semiconductor substrate 10, a gate insulating film 14 and a gate electrode 16 are sequentially formed on an active region, and then impurities are doped. To form the impurity region 17. Then, after forming the first insulating film 18 on the entire surface of the resultant structure,
First contact hole 19 exposing impurity region 17
Is formed in the first insulating film 18, the first contact hole 19 is buried as a conductive film, and the conductive film is formed on the first insulating film 18 so as to have a predetermined thickness. Then, the conductive film is patterned to form the bit line 20. Then, a second layer is formed on the entire surface of the resultant structure where the bit line 20 is formed.
After forming the insulating film 22, a second contact hole 23 for connecting the impurity region 17 and a storage electrode formed in a subsequent process is formed.

Next, as shown in FIG. 2, the second contact hole 23 is buried and a silicon film 24 is formed on the second insulating film 22 to have a predetermined thickness. The silicon film 24 is formed using a silane-based gas as a source gas. Then, the silicon film 24 is patterned to form a storage electrode pattern 24A as shown in FIG.
The resulting product is heat-treated to form HSG polycrystalline silicon 26 on the surface of the storage electrode pattern 24A as shown in FIG.

By the way, SiH is used as the silane-based gas.
_When the silicon film 24 is formed by using _four gases, the film formation rate is low, and the in-situ doping gas competes with the doping gas for the deposition position.
Therefore, the film forming rate changes greatly depending on the injection amount of the doping gas, and it is not easy to control the thickness. In addition, there is a disadvantage that the process temperature is high. Then, during the heat treatment process for forming the HSG polycrystalline silicon, the storage electrode pattern 2 is formed.
Since crystallization is locally performed in a predetermined region of 4A, the amorphous silicon moves to the nucleus of the locally crystallized silicon, so that the crystal grains of the HSG polycrystalline silicon 26 and the like are deposited on the entire surface of the storage electrode pattern 24A. The uniform crystal growth stage is blocked. Therefore, unlike the region A of FIGS. 4 and 5, the HSG polycrystalline silicon 26 is not formed on the surface of the storage electrode pattern, and the balde defect (ba
ld defect) occurs.

On the other hand, a CO ₂ gas using Si ₂ H ₆ gas is used.
A silicon film 2 is formed on a portion having a large step like a contact hole for a storage electrode having a (capacitor on bit line) structure
4 is formed, a defective silicon film having a step difference of 60% or less is formed. Therefore, there is a problem that a void is generated like the region B in FIG. 6 and the reliability of the silicon film is lowered.

[0009]

The object of the present invention is to solve the above problems by using SiH ₄ gas and Si ₂ H ₆ gas.
It is an object of the present invention to provide a method for forming a silicon film which can prevent the generation of voids by forming a silicon film using a gas and can form HSG polycrystalline silicon on the entire surface of the silicon film.

Another object of the present invention is to provide a method of manufacturing a capacitor in which HSG polycrystalline silicon can be uniformly formed on the surface of a capacitor storage electrode.

[0011]

In order to achieve the above object, the method of manufacturing a silicon film according to the present invention is such that, in the step of forming a silicon film on a semiconductor substrate, (a) SiH ₄ gas is used as a source gas for the first silicon. A method of forming a silicon film, comprising: forming a film; and (b) forming a _second silicon film on the first silicon film using Si ₂ H ₆ gas as a source gas. To do.

In the present invention, the step (a) is 490.
˜560 ° C., and step (b) is preferably 480˜560 ° C. Then, the SiH ₄ gas and Si
₂ H ₆ gas is in-situ doped with a doping gas to form a first silicon film and a second silicon film,
The doping gas is PH ₃ , diluted PH ₃ , A
sH _3, AsH ₃ diluted, it is desirable to use any one among the diluted B.

To achieve the above object, the present invention also provides a method of forming a silicon film on a semiconductor substrate, the method comprising:
Provided is a method for forming a silicon film, which comprises forming a silicon film by injecting a mixed gas of H ₄ gas and Si ₂ H ₆ gas.

In the present invention, the injection of the mixed gas is 4
It is performed at 80 to 560 ° C., and the SiH ₄ gas and Si ₂ H _{6 are} added.
The mixing ratio with the gas is preferably 2: 1 to 100: 1. The mixed gas is preferably in-situ doped with a doping gas to form a silicon film, and the doping gas is PH ₃ and diluted P.
It is desirable to use any one of H ₃ , AsH ₃ , diluted AsH ₃ , and diluted B.

In order to achieve the above-mentioned other object, the method of manufacturing a capacitor according to the present invention comprises the step of: (a) forming a contact hole exposing an impurity region of a transistor in an interlayer insulating film formed on a semiconductor substrate. When,
(B) forming a first silicon film that fills the contact hole using SiH ₄ gas as a source gas;
(C) forming a second silicon film on the first silicon film using Si ₂ H ₆ gas as a source gas; and (d) forming a storage electrode pattern through a photo-etching process of the second silicon film and the first silicon film. Forming stage into
(E) forming polycrystalline silicon having hemispherical grains on the surface of the storage electrode pattern.

In the present invention, the first silicon film is 5
The second silicon film has a thickness of 00 to 3000Å and a thickness of 10
It is desirable to form it with a thickness of 00 to 10000Å.
In step (e), the storage electrode pattern is annealed in a high vacuum, and the storage electrode pattern is subjected to a phase conversion from amorphous silicon to polycrystalline silicon in SiH ₄ or Si ₂ H ₆ gas. Chemical vapor deposition of one of the two forms HSG polycrystalline silicon nuclei on the storage electrode pattern, and anneals the resultant product in which the HSG polycrystalline silicon nuclei are formed. Is desirable. Preferably, the method further comprises the step of forming a bit line under the interlayer insulating layer before the step (a).

To achieve the other object of the present invention, the present invention also includes (a) forming a contact hole exposing an impurity region of a transistor in an interlayer insulating film formed on a semiconductor substrate, b) SiH ₄ gas and Si
Forming a silicon film inside the contact hole and on the interlayer insulating film using a mixed gas of ₂ H ₆ gas as a source gas; and (c) forming the silicon film into a storage electrode pattern through a photo-etching process, (D) a step of forming polycrystalline silicon having hemispherical grains on the surface of the storage electrode pattern, the method for manufacturing a capacitor of a semiconductor device.

In the present invention, the silicon film is 300
It is desirable to form it with a thickness of 0 to 15000Å. Then, in the step (d), a method of annealing the storage electrode pattern in a high vacuum is used, and either SiH ₄ or Si ₂ H ₆ gas is used at a temperature at which the amorphous silicon is converted to polycrystalline silicon on the storage electrode pattern. Chemical vapor deposition of one of them is performed on the storage electrode pattern by HS.
It is preferable to use any one of the methods of forming G polycrystal silicon nuclei and annealing the resultant product in which the HSG polycrystal silicon nuclei are formed. Preferably,
Before the step (a), a step of forming a bit line under the interlayer insulating layer may be further included.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION SiH ₄ gas and S are shown in FIGS.
A method of sequentially injecting i ₂ H ₆ gas to form HSG polycrystalline silicon on the surface of the storage electrode is shown.

Referring to FIG. 7, after forming a field oxide film 102 on a semiconductor substrate 100, a gate insulating film 104 and a gate electrode 106 are sequentially formed on an active region. Next, impurities are doped to form the impurity regions 107. Subsequently, a first insulating layer 108 is formed on the entire surface of the resultant structure, and then the first impurity layer is exposed.
The contact hole 109 is formed in the first insulating film 108. After depositing a conductive film having a predetermined thickness on the first insulating film by burying the first contact hole,
The bit lines 110 are formed by patterning. Subsequently, a second insulating film 112 is formed on the entire surface of the resultant structure having the bit line 110, and then a second contact hole 113 for connecting the impurity region 107 and a storage electrode formed in a subsequent process is formed.

Next, as shown in FIG. 8, a first silicon film 114 which fills the second contact hole 113 is formed using SiH ₄ as a source gas. Subsequently, a second silicon film 116 is formed on the first silicon film 114 by using Si ₂ H ₆ as a source gas. The first silicon film 114
The second silicon film 116 and the first silicon film 114 are formed in situ using a chemical vapor deposition method.
The second silicon film 116 is formed at a temperature of about 560 ° C.
It is desirable to form at 0 to 560 ° C. The first silicon film 114 has a thickness of 500 to 3000Å,
The second silicon layer 116 has a thickness of 1000 to 1000.
It is desirable to form with 0Å. In addition, the SiH ₄ gas and the Si ₂ H ₆ gas each form a first silicon film 114 and a second silicon film 116 that are in-situ-doped and doped with a doping gas. At this time, the in-situ doping gas used is preferably any one of PH ₃ , diluted PH ₃ , AsH ₃ , diluted AsH ₃ , and diluted B.

Then, the first silicon film 114 and the second silicon film 114
By patterning the silicon film 116 with a photo-etching process, HS is formed on the surfaces of the storage electrode patterns 114A and 116A.
The G polycrystalline silicon 118 is formed. The HSG polycrystalline silicon 118 is formed by a first method of heat-treating the storage electrode patterns 114A and 116A having no natural oxide film in a high vacuum, and a second storage electrode pattern 1.
Chemical vapor deposition of SiH ₄ or Si ₂ H ₆ gas is performed on the storage electrode patterns 114A and 116A at a temperature at which amorphous silicon is converted to polycrystalline silicon on the storage electrode patterns 114A and 116A. The HSG polycrystalline silicon may be formed by any one of a method of forming HSG polycrystalline silicon by forming a polycrystalline silicon nucleus and performing a heat treatment on the resultant product on which the HSG polycrystalline silicon nucleus is formed.

According to the present invention described above, after the contact hole 113 is filled with SiH ₄ gas in which no void is generated during the formation of the silicon film, the film formation rate is high, and the film formation rate does not change due to the doping impurities. Most of the storage electrode pattern is formed by Si ₂ H ₆ gas that does not cause the selective crystallization. Therefore, since voids are not generated inside the contact hole, the reliability of the silicon film is increased, and local crystallization does not occur, so that HSG polycrystalline silicon is not partially formed.
efect) phenomenon is also prevented.

Referring to FIG. 10, the second contact hole 113 is formed by the method shown in FIG. Then, the mixing ratio of SiH ₄ : Si ₂ H ₆ gas is 2: 1 to 1
SiH ₄ gas is 100 to 1000 so that it becomes 00: 1.
At a flow rate of sccm, Si ₂ H ₆ gas is injected at a flow rate of 1 to 100 sccm to bury the contact hole 113 and form a silicon film 120 with a predetermined thickness on the insulating layer 112 in which the contact hole 113 is formed. To do. The silicon film 120 is preferably formed to a thickness of 3000 to 15000Å at 480 to 560 ° C. At this time, the SiH ₄
And a mixed gas of Si ₂ H ₆ and the doping gas form an in-situ doped impurity-doped silicon film. The doping gas used at this time is PH ₃ , diluted PH ₃ , AsH ₃ , diluted A.
It is desirable that it is one of sH ₃ and diluted B.

Next, as shown in FIG. 11, the silicon film 120 is patterned to form a storage electrode pattern 120A, and then the storage electrode pattern 1 is formed.
HSG polycrystalline silicon 122 is formed on the surface of 20A. The HSG polycrystalline silicon 122 is formed by
The storage electrode pattern 120A having no natural oxide film
Second, heat treatment is performed on the storage electrode pattern 120A in a high vacuum, and SiH ₄ or Si ₂ H ₆ is chemically vaporized on the storage electrode pattern 120A at a temperature at which the amorphous silicon is converted into polycrystalline silicon. Either of the method of forming HSG polycrystalline silicon nuclei on the storage electrode pattern 120A by phase vapor deposition and the step of heat-treating the resultant product in which the HSG polycrystalline silicon nuclei are formed. It can be formed by one.

According to the invention described above, SiH ₄ and Si
By adjusting the flow rate of ₂ H ₆ , the step of the deposited silicon film can be improved and uniform HSG polycrystalline silicon can be formed on the surface of the silicon film. The reason is as follows. Generally, when depositing a silicon film using SiH ₄ as a source gas, the step difference of the deposited silicon film is 90% or more, but depositing the silicon film using Si ₂ H ₆ as a source gas. In this case, the step difference of the deposited silicon film is only about 60%. Therefore, when a silicon film is formed inside the contact hole, that is, when the step is to be improved, the flow rate of SiH ₄ is increased to mainly form the silicon film where HSG polycrystalline silicon is to be formed. Is S
It is formed by increasing the flow rate of i ₂ H ₆ . Therefore, no void is formed in the silicon film that fills the contact hole, and uniform HSG polycrystalline silicon can be formed on the surface of the storage electrode. Therefore, when applied to the formation of the storage electrode of the present invention, a storage electrode having a maximum defect-free surface area can be formed and the capacitance of the capacitor can be increased.

[0027]

EXAMPLES The features of the present invention will be described in more detail through examples. However, the present invention is not necessarily limited to this, and it is obvious that many variations can be implemented by a person having ordinary skill in the art within the technical idea of the present invention.

[First Embodiment] After forming a contact hole for connecting a storage electrode and an impurity region by a conventional process, SiH ₄ gas is injected into a chamber at 510 ° C. and a pressure of 0.8 Torr to make a contact. 20 on the insulating layer where the hole is buried and the contact hole is formed.
A first silicon film having a thickness of 00Å was formed. At this time, P
H ₃ , diluted PH ₃ , AsH ₃ , diluted AsH
_{3. In} situ doping was performed with the SiH ₄ gas using any one of the diluted B as a doping gas to form a first silicon film doped with impurities. Then, after adjusting process conditions in the chamber at 510 ° C. and 0.5 Torr pressure, Si ₂ H ₆ gas was injected to form a second silicon film having a thickness of 6000 Å on the first silicon film. When the Si ₂ H ₆ gas was injected, the doping gas was injected at the same time as the SiH ₄ gas to form the second silicon film doped with impurities. Then, the first
The silicon film and the second silicon film were patterned to form a storage electrode pattern. After that, 750 ℃, 10
^After placing the semiconductor substrate on which the storage electrode pattern is formed in a chamber under ^-7 Torr pressure and flowing Si ₂ H ₆ gas at 18 sccm to form HSG polycrystalline silicon nuclei, CVD HSG polycrystalline silicon nuclei are formed. The process condition in the chamber is 750 ° C. to heat the formed product.
Adjusted to 10 ^-7 Torr. HSG polycrystalline silicon was formed on the storage electrode pattern as a result of the heat treatment.

As shown in the scanning electron micrographs shown in FIGS. 12 and 13, no voids were formed inside the contact holes, and HSG polycrystalline silicon was uniformly formed on the surface of the storage electrode.

[Second Embodiment] As in the first embodiment, after forming a contact hole for connecting the storage electrode and the impurity region of the transistor, 510 ° C., 0.
SiH the chamber under 5Torr pressure _4: Si ₂ H ₆ gas is 40: 7 so as to SiH ₄ gas flow rate 400sccm
Then, a mixed gas of Si ₂ H ₆ gas was injected at a flow rate of 70 sccm to bury the contact hole, and a silicon film having a thickness of 8000 Å was formed on the insulating layer in which the contact hole was formed. Subsequent steps proceeded in the same manner as in the first embodiment to form HSG polycrystalline silicon on the storage electrode pattern.

As shown in the scanning electron micrographs shown in FIGS. 14 and 15, voids do not occur inside the contact holes as in the first embodiment, and HSG polycrystalline silicon is uniformly formed on the surface of the storage electrode. It was

[0032]

As described above, according to the method of forming a silicon film and the method of forming a storage electrode of a capacitor using the same according to the present invention, SiH ₄ gas and film formation that does not generate voids during the formation of a silicon film. A silicon film is formed by sequentially or mixed injection with Si ₂ H ₆ gas, which has a high speed and does not change the film formation speed due to doping impurities, and does not cause local crystallization during the formation of a silicon thin film. Therefore, it is possible to prevent the occurrence of voids in the silicon film formed in the contact hole or the stepped portion on the semiconductor substrate, increase the reliability of the silicon film, and prevent the local crystallization from occurring to improve the film formation rate. Partly HSG
Bald defects (ba
ld defect) phenomenon is also prevented. Such an effect may increase the capacitance of the capacitor by forming a storage electrode having a maximum defect-free surface area, especially when applied to a capacitor manufacturing process.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a conventional method of manufacturing a storage electrode.

FIG. 2 is a cross-sectional view showing a conventional storage electrode manufacturing method.

FIG. 3 is a cross-sectional view showing a conventional storage electrode manufacturing method.

FIG. 4 is a cross-sectional view showing a conventional storage electrode manufacturing method.

FIG. 5 is a scanning electron micrograph of the upper surface of a storage electrode formed by using SiH ₄ gas as a source gas.

FIG. 6 is a scanning electron micrograph of a cross section of a storage electrode formed by using Si ₂ H ₆ gas as a source gas.

FIG. 7 is a cross-sectional view showing a method of forming a storage electrode by sequentially injecting SiH ₄ gas and Si ₂ H ₆ gas according to the present invention.

FIG. 8 is a cross-sectional view showing a method of forming a storage electrode by sequentially injecting SiH ₄ gas and Si ₂ H ₆ gas according to the present invention.

FIG. 9 is a cross-sectional view showing a method of forming a storage electrode by sequentially injecting SiH ₄ gas and Si ₂ H ₆ gas according to the present invention.

FIG. 10 is a cross-sectional view showing a method of forming a storage electrode by injecting a mixed gas of SiH ₄ gas and Si ₂ H ₆ gas according to the present invention.

FIG. 11 is a cross-sectional view showing a method of forming a storage electrode by injecting a mixed gas of SiH ₄ gas and Si ₂ H ₆ gas according to the present invention.

FIG. 12 is a scanning electron micrograph of a cross section of a storage electrode formed according to the first example.

FIG. 13 is a scanning electron micrograph of the upper surface of the storage electrode formed according to the first example.

FIG. 14 is a scanning electron micrograph of a cross section of a storage electrode formed according to a second example.

FIG. 15 is a scanning electron micrograph of the upper surface of the storage electrode formed according to the second embodiment.

[Explanation of symbols]

 100 ... Semiconductor substrate, 102 ... Field oxide film, 104 ... Gate insulating film, 106 ... Gate electrode, 107 ... Impurity region, 108 ... First insulating film, 109 ... First contact hole, 110 ... Bit line, 112 ... Second Insulating film, 113 ... Second contact hole, 114 ... First silicon film, 116 ... Second silicon film, 114A, 116A ... Storage electrode pattern, 120 ... Silicon film.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Satoshi An, No. 24, Satoyama, Seosan, Yongin-eup, Yongin-si, Gyeonggi-do, Republic of Korea

Claims (32)

[Claims] 1. A step of forming a silicon film on a semiconductor substrate, comprising the steps of: (a) forming a first silicon film using SiH ₄ gas as a source gas; and (b) forming Si ₂ H on the first silicon film. Forming a second silicon film using ₆ gas as a source gas. 2. The method for forming a silicon film according to claim 1, wherein the step (a) is performed at 490 to 560 ° C. 3. The method according to claim 1, wherein the step (b) is performed at 480 to 560 ° C. 4. The SiH ₄ gas and the Si ₂ H ₆ gas are respectively doped with a doping gas in situ, and the first silicon film and the second silicon film are doped with impurities.
The method for forming a silicon film according to claim 1, wherein a silicon film is formed. 5. The doping gas according to claim 4, wherein the doping gas is one of PH ₃ , diluted PH ₃ , AsH ₃ , diluted AsH ₃ , and diluted B. Method for forming a silicon film. 6. A step of: (a) forming a contact hole in an interlayer insulating film formed on a semiconductor substrate to expose an impurity region of a transistor; and (b) filling the contact hole with SiH ₄ gas as a source gas. Forming a first silicon film, (c) forming a second silicon film on the first silicon film by using Si ₂ H ₆ gas as a source gas, and (d) forming the second silicon film and the second silicon film. 1. A capacitor of a semiconductor device comprising: a step of patterning a silicon film with a storage electrode pattern; and (e) a step of forming polycrystalline silicon having hemispherical grains on the surface of the storage electrode pattern. Production method. 7. The method for manufacturing a capacitor of a semiconductor device according to claim 6, wherein the step (b) is performed at 490 to 560 ° C. 8. The method for manufacturing a capacitor of a semiconductor device according to claim 6, wherein the step (c) is performed at 480 to 560 ° C. 9. The first silicon film is 500-3000.
The second silicon film has a thickness of 1000 to 1000.
The method for manufacturing a capacitor of a semiconductor device according to claim 6, wherein the capacitor is formed with a thickness of 0Å. 10. The SiH ₄ gas and the Si ₂ H ₆ gas are in-situ doped with a doping gas, respectively, and a first silicon film and a second silicon film are doped with impurities.
7. The method for manufacturing a capacitor of a semiconductor device according to claim 6, wherein a silicon film is formed. 11. The doping gas is any one of PH ₃ , diluted PH ₃ , AsH ₃ , diluted AsH ₃ , and diluted B. 1.
0. A method of manufacturing a capacitor of a semiconductor device according to 0. 12. The method for manufacturing a capacitor of a semiconductor device according to claim 6, wherein the step (e) is performed by a method of annealing the storage electrode pattern in a high vacuum. 13. In the step (e), one of SiH ₄ gas and Si ₂ H ₆ gas is chemically vapor deposited on the storage electrode pattern at a temperature at which amorphous silicon is transformed into polycrystalline silicon. The method for manufacturing a capacitor of a semiconductor device according to claim 6, wherein the method is performed by the method described above. 14. The step (e) may be performed by forming HSG polycrystalline silicon nuclei on the storage electrode pattern and annealing a resultant product in which the HSG polycrystalline silicon nuclei are formed. The method for manufacturing a capacitor of a semiconductor device according to claim 6. 15. The semiconductor according to claim 14, wherein the HSG polycrystalline silicon nuclei are formed on the storage electrode pattern by a method of flowing SiH ₄ or Si ₂ H ₆ gas by a chemical vapor deposition method. Method for manufacturing device capacitor. 16. The method as claimed in claim 6, further comprising the step of forming a bit line under the interlayer insulating film before the step (a). 17. A method of forming a silicon film on a semiconductor substrate, which comprises injecting a mixed gas of SiH ₄ gas and Si ₂ H ₆ gas to form the silicon film. 18. The injection of the mixed gas is 480 to 560.
The method of forming a silicon film according to claim 17, wherein the method is performed at a temperature of ℃. 19. The method for forming a silicon film according to claim 17, wherein a mixing ratio of the SiH ₄ gas and the Si ₂ H ₆ gas is 2: 1 to 100: 1. 20. The method of claim 17, wherein the mixed gas forms a silicon film doped in-situ with the doping gas and doped with impurities. 21. The doping gas is any one of PH ₃ , diluted PH ₃ , AsH ₃ , diluted AsH ₃ , and diluted B. 2.
0. The method for forming a silicon film according to 0. 22. (a) forming a contact hole exposing an impurity region of a transistor in an interlayer insulating film formed on a semiconductor substrate; and (b) mixing SiH ₄ gas and Si ₂ H ₆ gas. Forming a silicon film inside the contact hole and on the interlayer insulating film using gas as a source gas; (c) patterning the silicon film with a storage electrode pattern; and (d) a hemisphere on the surface of the storage electrode pattern. Forming a polycrystalline silicon having the shape of a grain, the method of manufacturing a capacitor of a semiconductor device. 23. The injection of the mixed gas is 480 to 560.
23. The method of manufacturing a capacitor for a semiconductor device according to claim 22, wherein the method is performed at a temperature of C. 24. The method of manufacturing a capacitor of a semiconductor device according to claim 22, wherein the mixing ratio of the SiH ₄ gas and the Si ₂ H ₆ gas is 2: 1 to 100: 1. 25. The silicon film has a thickness of 3000 to 1
The method for manufacturing a capacitor of a semiconductor device according to claim 22, wherein the capacitor is formed with a thickness of 5000Å. 26. The method of claim 22, wherein the mixed gas forms a silicon film doped in-situ with the doping gas and doped with impurities. 27. The doping gas is any one of PH ₃ , diluted PH ₃ , AsH ₃ , diluted AsH ₃ and diluted B. 2.
2. The method for manufacturing a capacitor for a semiconductor device according to 2. 28. The method of claim 22, wherein the step (d) is performed by a method of annealing the storage electrode pattern in a high vacuum. 29. In the step (d), one of SiH ₄ gas and Si ₂ H ₆ gas is chemically vapor deposited on the storage electrode pattern at a temperature at which amorphous silicon is transformed into polycrystalline silicon. 23. The method for manufacturing a capacitor of a semiconductor device according to claim 22, wherein the method is performed by the method described above. 30. The step (d) is performed by forming HSG polycrystalline silicon nuclei on the storage electrode pattern and annealing the resultant product in which the HSG polycrystalline silicon nuclei are formed. 23. The method for manufacturing a capacitor of a semiconductor device according to claim 22. 31. The semiconductor according to claim 30, wherein the HSG polycrystalline silicon nuclei are formed on the storage electrode pattern by flowing SiH ₄ or Si ₂ H ₆ gas by a chemical vapor deposition method. Method for manufacturing device capacitor. 32. The method of claim 22, further comprising the step of forming a bit line under the interlayer insulating film before the step (a).