JPH09185441A - Parallel interface circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily perform the bidirectional transfer of a control signal even in the case of using one connector by performing an operation while switching the input/output directions of control signal corresponding to whether a connected opposite party is a host device or a peripheral device. SOLUTION: A host/peripheral setting part 400 is provided for setting whether the opposite party to be connected is the host device or the peripheral device or whether or not automatic discrimination is to be performed. When it is set that the connected opposite party is the 'host device', the operation is performed as the peripheral device and when it is set that the connected opposite party is the 'peripheral device', the operation is performed as the host device so that the input/output of control signal and the operation can be easily and surely switched corresponding to whether the connected opposite party is the host device or the peripheral device. Besides, when it is set that the 'automatic discrimination' is to be performed, the discrimination of whether the connected opposite party is the host device or the peripheral device and the switching of the input/output direction of control signal and the operation are automated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device such as an electronic still camera, and more particularly to a parallel interface circuit for connecting and receiving a host computer, a printer and the like to exchange data symbols, control signals and the like.

[0002]

2. Description of the Related Art A parallel interface circuit is used to exchange data signals and control signals between a host device such as a personal computer (hereinafter abbreviated as PC) and a peripheral device controlled by a PC such as a printer. Used.

As a parallel interface circuit of this type, a Centronics interface circuit or P
A C parallel interface is used.

In order to make data transfer bidirectional, an interface function that extends various transfer modes has an IEEE st
d 1284 is standardized. This standard includes
Compatibility Mode, Nibble Mode and Byte Mode (Byte Mo
de), ECP mode, and EPP mode are included. The compatible mode is a mode that is compatible with the conventional parallel interface and transfers data from the host device to the peripheral device. The nibble mode and the byte mode are modes in which data is transferred from a peripheral device to a host device for bidirectional data transfer in combination with the compatible mode. The ECP mode is a mode in which data is transferred from the host device to the peripheral device upon request from the host device side, and data is transferred from the peripheral device to the host device upon request from the peripheral device side. The EPP mode is a mode in which data is written from the host device to the peripheral device and data is read from the peripheral device to the host device in response to a request from the host device side.

According to the IEEE 1284 standard, the host device indicates Host Logic Hig to indicate a communicable state.
The h (HLH) signal is activated, and the peripheral device is set to P
Activates the eripheral Logic High (PLH) signal. Therefore, by monitoring the HLH signal and the PLH signal, it is possible to determine the presence of the other party connected to the device and its power-on. Note that the HLH signal and the PLH signal are not essential in the IEEE 1284 standard, and these signals may not be detected depending on the connector used.

At the time of initialization of the operation according to the IEEE 1284 standard, a compatible mode for transferring data from the host device to the peripheral device is set. An operation timing chart of the compatible mode is shown in FIG. In FIG. 2, D
ATA signal {n bytes of Data [8: 1]}, n Strobe signal, Bu
A timing chart of the sy signal, nAck signal, and nSelectIn signal is shown.

In the host device conforming to the IEEE 1284 standard, first of all, the peripheral device is IEEE 1
It is confirmed whether or not it complies with the H.284 standard, and if it complies, it is recommended to use any one of the extended communication modes (nibble mode, byte mode, ECP mode, EPP mode). Negotiations required for the device. Specifically, the host device uses the extension request value (Extensib
ility Request Value) is output to the data bus. 00h is assigned to the nibble mode, 01h to the byte mode, 10h to the ECP mode, and 40h to the EPP.

In the negotiation operation, as shown in the timing chart of FIG.
84 Active signal (above nSelectIn: signal name in compatible mode and conventional parallel interface. The same is in parentheses in the following description) (hereinafter abbreviated as ACT signal), “High”, Host Busy signal (nAutoFd) (hereinafter ,
"Low" is output to the HB signal). In response, the peripheral device sends the PtrClk signal (nAck above).
(Hereinafter, abbreviated as PTC signal) is "Low", nDataAvai
l signal (nFault) (hereinafter abbreviated as NDA signal) "High", XFlag signal (Select) (hereinafter abbreviated as XF signal) "High", AckData Request signal (PError)
"High" is output to (hereinafter abbreviated as ADR signal). In FIG. 3, the DATA signal indicates the required value, the HC signal indicates the above Hostclk (nStrobe), and the PB signal indicates that the peripheral device is not ready to receive data. Prt Busy (Bus
y) respectively.

Even when the peripheral device side is a conventional parallel interface and does not comply with the IEEE 1284 standard, the NDA signal and the ADR signal among the response signals of the peripheral device become "High" at the same time. In this case, the host device can confirm that the peripheral device complies with the IEEE 1284 standard.

As described above, IEEE 1284
According to the standard, only the data bus is bidirectional,
For other control signals, either the output on the host device side or the output on the peripheral device side is fixed, so
That is, since the control signal is transferred in one direction, for example, an electronic camera which is attracting attention as one of image acquisition means for generating image data obtained by digitally processing an image signal obtained by an image sensor such as a CCD is used. When transferring image data to a peripheral device such as a host computer or printer in a predetermined operation mode using one connector, it is determined whether the connected party is a host computer or a printer. It is necessary to switch the operation of the interface with the person connected to the electronic camera. That is, when the other party is a host computer, the electronic camera sets the interface operation so that the control signal output from the host side is in the input state and the control signal output from the peripheral device side is in the output state. The camera acts as a peripheral device to the host computer.

On the other hand, when the other party to which the electronic camera is connected is a printer or the like, the interface operation is such that the control signal output from the host side is in the output state and the control signal output from the peripheral device side is in the input state. The electronic camera itself operates as a host for the printer. In order to switch the above operation, it is necessary to judge by some method whether the partner connected to the electronic camera is a host computer or a printer.

[0012]

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a parallel interface circuit that enables bidirectional transfer of control signals even with a single connector.

[0013]

In order to solve the above problems, a parallel interface circuit according to the present invention controls transfer data and data transfer between a host device and a peripheral device controlled by the host device. A control signal from the host device to the peripheral device,
And a parallel interface circuit for controlling transmission and reception of a control signal from the peripheral device for controlling data transfer to the host device, the input and output of the control signal depending on whether the connection partner is a host device or a peripheral device. It is configured to operate by switching directions.

Here, the above-mentioned parallel interface circuit can be added with the following configuration.

Setting means for setting whether the connection partner is a host device or a peripheral device.

A control signal from the host device indicating that the host device side is communicable to the peripheral device is monitored as an input signal, and when it is detected that this control signal is active, the connection partner is the host device. Works as is.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION In the basic embodiment of the present invention, a partner device connected to the apparatus (for example, an electronic still camera) is a host device such as a personal computer (PC) or a peripheral device such as a printer. When the partner device is the host device, the output control signal of the host device is input, the device is made to function as a peripheral device, and the output control signal is output.
On the other hand, when the partner device is a peripheral device such as a printer, the device is made to function as a host device,
The output control signal of the device is transferred to the peripheral device side, and the control signal which is the output of the peripheral device is received as an input.

The determination as to whether the connected partner device is a host device or a peripheral device is made by detecting the setting state of a setting means for setting whether the partner device is a host device or a peripheral device by the operator. Alternatively, as described in detail below, it is possible to comprehensively judge the signal state received from the partner device.

When the setting means is provided, the input / output direction of the control signal is switched according to the detection result of detecting the setting state, and the function is performed as a peripheral device or a host device.

Although it is easy to switch the input / output direction of the control signal depending on the setting state of the setting means, for example, for an operator who handles an electronic still camera, every time the connection is changed to a personal computer, a printer, or the like, It is troublesome to change the setting of the setting means and to check whether the setting is correct or not.

Therefore, another embodiment will be described in which setting means is not provided and whether the partner device is a host device or a peripheral device is judged by judging the output signal state from the connected partner device.

As described above, the IEEE 1284 standard indicates that the host device and the peripheral device are in a communicable state by correspondingly activating the HLH signal and the PLH signal. In the present embodiment, normally, all signals (data and control signals) are kept in an input state, these HLH signals and PLH signals are monitored, and when the HLH signals become active, the connection partner is the host device. When it is determined that the peripheral device is present, the control signal output from the peripheral device is set to the output state, and the peripheral device operates.

When the PLH signal becomes active, it is determined that the connection partner is a peripheral device, the control signal output from the host side is output, and the host device operates.

By the way, the above two signals are not essential in the IEEE 1284 standard as described above, and these signals may not be input depending on the connector used. In addition, these two signals are IEEE
It is a signal newly added in the 1284 standard and does not exist in the conventional parallel interface. Therefore, it is impossible to make a determination by monitoring the HLH signal and the PLH signal as described above.

Therefore, in the parallel interface circuit according to the present embodiment, in addition to these two signals, in the compatibility mode, the ACT signal indicating that the host device selects the peripheral device is monitored and the ACT signal is detected.
When the signal becomes active (Low), it is determined that the connected partner is the host device, the control signal which is the peripheral device side output is set to the output state, and the peripheral device operates.

Further, in compatible mode, P indicates that the peripheral device is not ready to receive data.
When the B signal is monitored and the PB signal becomes inactive (Low), it is determined that the connected partner is a peripheral device, and the control signal that is the output of the host device is set to the output state and Take action.

Although the connection destination can be determined in this manner, a problem may occur depending on the signal state. That is, as described above, the host device compliant with the IEEE 1284 standard outputs an extended request value indicating the requested communication mode to the data bus to start negotiation, and the ACT signal is "High" and the HB signal is "High". "Low" is output. Here, since the ACT signal is used as the nSelectIn signal in the compatibility mode, as described above, when the ACT signal is active (Low), it is only judged that the connected partner is the host device. Then, when the negotiation is started, it is determined that the connection with the host device is broken.

Therefore, in the parallel interface circuit of the present embodiment, these two signals ACT signal and H
B signal is monitored, and when the ACT signal is "High" and the HB signal is "Low", it is judged that the connected partner is the host device and the control signal which is the peripheral device side output is output. In addition to the status, it returns a negotiation response and operates as a peripheral device.

[0029]

1 is a block diagram showing the configuration of a parallel interface circuit according to an embodiment of the present invention. The parallel interface circuit of this embodiment has, as a basic configuration, a control unit 100 that controls the entire operation, and a bidirectional transceiver group 200 that has an input / output direction control input.
A host / peripheral setting unit 4 for setting a connector 300, a function for setting whether the connection partner is a host device or a peripheral device, and a function for automatically discriminating these devices.
00.

The control unit 100 controls the data input / output terminal T1 of Data [8: 1] and the HC signal {Host Clk which is a control signal.
(NStrobe)}, HB signal {Host Busy (nAutoFd)},
NRR signal {n Reverse Request (nInit)}, ACT
Input / output terminal T for each control signal of signal {1284 Active (nSelectIn)} and HLH signal {Host Logic High}
2, T3, T4, T5 and T6, and PB
Signal {Ptr Busy (Busy)}, PCT signal {PtrClk (nAc
k)}, ADR signal {Ackn Data Req (PError)}, XF
Signal {X flag (Select)}, NDA signal {n Data Avai
l (nfault)}, PLH signal {Peripheral Logic Hig
h} control signal input / output terminals T7, T8, T9, T1
0, T11 and T12. The control unit 100 also controls the DD signal (Data Dir), which is a control signal for instructing the data transfer direction, the HD signal (Host Drv) for instructing the transfer direction of the control signal for controlling the host device, and the peripheral device. PD signal (PrphDrib) output terminals T13, T14 and T for instructing the transfer direction of the control signal for control
15

The connector 300 is a terminal T of the controller 100.
1 corresponding to data signal terminal T31 and terminals T2 to T1
2 and the corresponding control signal terminals T32 to T42, which are connected to the terminals T1 to T12 of the control unit 100 via the corresponding transceivers 201 to 212, respectively.

The transceiver group 200 includes transceivers 201 to 212 each having one end connected to the output terminals T1 to T12 of the control unit 100, and the other end connected to a pull-up resistor or a pull-down resistor and a corresponding terminal of the connector 300. Has been done. That is, the transceiver 2
06 and 212 are connected to pull-down resistors 226 and 232, one ends of which are grounded, and corresponding terminals T36 and T42 of the connector 300. In addition, the transceiver 201
The other ends of 205 and 207 to 211 are pull-up resistors 221-225 and 227-231 whose one ends are grounded,
Corresponding terminals T31 to T35 and T37 of the connector 300
Each of them is connected to T42.

Input / output direction control terminals T201-T201 for defining the input / output directions of the transceivers 201-212.
T212 indicates terminals T13 to T1 of the control unit 100, respectively.
One of the control signals output from 5 is input. That is, the terminal T201 of the transceiver 201 is
The DD signal is input from the terminal T13 of the control unit 100, and the terminals T202 to T206 of the transceivers 202 to 206 are input.
The HD signal from the terminal T14 of the control unit 100 is input to. In addition, the terminals T of the transceivers 207 to 212
The PD signal from the terminal T15 of the control unit 100 is input to 207 to T212.

In FIG. 1, terminals T2 to T2 of the control unit 100 are shown.
Control signals HC, HB, NRR, AC output from T6
The T and HLH signals are output signals on the host side, and the transceivers 202 to 2 to which these control signals are input.
The input / output direction control terminals T202 to T206 of 06 are connected to the host side control signal input / output control output terminal T14 of the control unit 100. HD signal is being input.

The PB, PTC, ADR, XF, NDA and PLH signals output from the terminals T7 to T12 of the control unit 100 are output signals on the peripheral device side, and transceivers to which these six control signals are input. 207 ~
The input / output direction control terminals T207 to T212 of 212 are connected to the peripheral device side control signal input / output control output terminal T15 output from the control unit 100, and the PD signal is input.

The operation of the embodiment shown in FIG. 1 will be described below. First, when the host / peripheral setting unit 400 instructs the control unit 100 that the connection partner is a host device such as a personal computer, the HD signal from the terminal T14 of the control unit 100 is set to “Low”. The transceivers 202 to 206 which have received this “Low” HD signal are connected to the connector 300.
The side becomes the input state, and the control signal which is the output side of the host side becomes the input. Further, the control unit 100 sets the PD signal output from the terminal T15 to “High”, and the transceiver 207
˜212, the connector 300 side is put into an output state, and the control signal whose peripheral device side is an output becomes an output. Further, the control unit 100 sets the DD signal from the terminal T13 to “Low”, controls the transceiver 201, and sets the connector 300 side to the input state.

In this way, the control unit 100 controls the input / output directions of the data signal and the control signal, and immediately thereafter, the terminal T
The PLH signal output from 12 is activated to start the operation as the peripheral device in the compatibility mode, which is in the initialized state.

On the other hand, the host / peripheral setting unit 400
When the control unit 100 is instructed that the connection partner is a peripheral device, the control unit 100 sets the HD signal from the terminal T14 to “High” and puts the connector 300 side into an output state.
The control signal output from the host side is output. In addition, the control unit 100 controls the transceivers 207 to 212 by setting the PD signal from the terminal T15 to “Low” to control the connector 3
The 00 side is set to the input state, the peripheral device side is set to the output control signal, and the DD signal from the terminal T13 is set to "High" to set the connector 300 side to the output state.

As described above, the control unit 100 controls the input / output directions of the data signal and the control signal, and immediately thereafter, the HL
The H signal is activated to start the operation as the compatible mode host device in the initialized state.

When the host / peripheral setting unit 400 selects the mode for automatically determining whether the connection partner is the host device or the peripheral device and instructs the control unit 100, the control unit 100 causes the terminal T13, T14 and T15
The DD signal, HD signal and PD signal output from the
As w ″, all the transceivers 201 to 212 are controlled so that the connector 300 side is in the input state and the connector 300
All the data and control signals input via the terminals are set to the input state, and the HLH signal and P input to the terminals T6 and T12 are set.
Monitor the LH signal.

As a result of this monitoring, when the HLH signal is active, it is determined that the connection partner is the host device, and the operation when the host / peripheral setting section 400 instructs the connection of the host device. Similarly, immediately after controlling the input / output directions of data and control signals, P
The LH signal is activated to start the operation as the peripheral device in the compatible mode in the initialized state.

The control unit 100 also receives the HLH signal and the PL signal.
In addition to the H signal, the ACT signal indicating that the host device is selecting the peripheral device in the compatible mode and the PB signal indicating that the peripheral device is not ready to receive data are monitored.

Here, the ACT signal is active (Low)
When it is determined that the connection partner is the host device, the host / peripheral setting unit 400 instructs the connection partner to be the host device, similarly to the case.
Immediately after controlling the input / output directions of the data and control signals, the PLH signal is activated to start the operation as the peripheral device in the compatible mode in the initialized state.

When the PB signal becomes inactive, it is determined that the connection partner is a peripheral device, and the host / peripheral setting means 400 instructs the connection partner to be a peripheral device. After controlling the input / output directions of the data and the control signal, the HLH signal is immediately activated to start the operation as the host device in the compatible mode in the initialized state.

Further, the control unit 100 monitors the ACT signal and the HB signal used when starting the negotiation, and the ACT signal is "High" and the HB signal is "Low".
If it is determined that the connection partner is the host device, the host / peripheral setting means 400 inputs the data and the control signal in the same manner as when the partner connected is the host device. After controlling the output direction,
Immediately, the PLH signal is activated, the response of the negotiation is returned, and the operation as the peripheral device is started.

As described above, in the various embodiments of the present invention, the host / peripheral setting section 400 for setting whether the connected partner is the host, the peripheral device, or the automatic determination is provided. , The other party is a "host device"
If it is set as a peripheral device, and if the connection partner is set as a "peripheral device", it operates as a host device to determine whether the connection partner is a host device or a peripheral device. Therefore, the input / output direction and operation of the control signal are easily and surely switched.

In addition, by the host / peripheral setting unit 400,
When the connection determination is set to "automatic determination" regardless of the setting information, the control signal HLH signal and the PLH signal are monitored, and when it is detected that the HLH signal is active, it is determined as a peripheral device. When it is detected that the PLH signal is active, the operation as the host device is performed to determine whether the connection partner is the host device or the peripheral device, the input / output direction of the control signal, and The operation switching is automated.

Further, the control signal, HLH signal and PL
Even if the H signal is not connected, the ACT signal and the PB signal, which are control signals in the compatible mode, are monitored and
When it is detected that the CT signal is active, it operates as a peripheral device, and when it detects that the PB signal is inactive, it operates as a host, so that the other party is a host device. It is possible to automatically switch the input / output direction of the control signal and the operation depending on whether it is a peripheral device or a peripheral device.

At this time, even if the ACT signal becomes inactive in order to start the negotiation operation on the host device side, the ACT signal and the HB signal are monitored, and the ACT signal is "High" and the HB signal is "Low". If it is detected that the other device is a host device, it operates as a peripheral device and automatically switches the control signal input / output direction and operation. You can

If a device such as an electronic still camera is used as the device in the above description and one connector is used to connect to a host device such as a PC or a peripheral device such as a printer, it is most suitable for the connected device. You can take action.

In the above description of the embodiment, the host / peripheral setting unit 400 sets three types of "host", "peripheral device", and "automatic determination". It is not necessary to perform the automatic determination as the two types. Further, the host / peripheral setting unit 400 may not be specially provided, and the automatic determination operation may be performed by the processing of the control unit 100.

Other structural points of the present invention other than the description of the "claims" are as follows.

(1) A control signal from the peripheral device indicating that the peripheral device side is communicable to the host device is monitored as an input signal, and when it is detected that this control signal is active, the connection partner is connected. The parallel interface circuit according to claim 1, which operates as a peripheral device. Effect due to (1): When it is detected that the control signal from the peripheral device indicating that the peripheral device can communicate with the host device is active, it is assumed that the partner to be connected is the peripheral device ,
It is possible to determine that the other party is a peripheral device and automatically switch the input / output direction of the control signal and the operation.

(2) The host device monitors the control signal from the host device to the peripheral device, which indicates that the peripheral device is selecting the peripheral device, as an input signal, and detects that the control signal is active. , The connection partner operates as a host device.
The parallel interface circuit described in. Effect due to (2): When it is detected that the control signal from the host device to the peripheral device indicating that the host device is selecting the peripheral device is active, it is determined that the partner to be connected is the host device. Even if the control signal from the host device to the peripheral device, which indicates that the host device side can communicate, is not connected by operating, it is determined that the other party is the host device and the control signal It is possible to automatically switch the input / output direction and operation.

(3) A control signal from the peripheral device to the host device indicating that the peripheral device is not ready to receive data is monitored as an input signal,
The parallel interface circuit according to claim 1, wherein when the control signal detects that the control signal is not active, the partner to be connected operates as a peripheral device. Effect of (3): When the peripheral device detects that the control signal from the peripheral device to the host device indicating that the peripheral device is not ready to receive data is inactive, the connected device is the peripheral device. As a result, even if the control signal from the peripheral device indicating that the peripheral device side can communicate is not connected to the host device by operating, It is possible to automatically switch the input / output direction of the signal and the operation.

(4) First and second different active levels from the host device to the peripheral device which have a plurality of transfer modes having different data transfer directions and are used for activating the procedure for selecting the transfer mode. The parallel interface circuit according to claim 1, wherein the parallel interface circuit operates as a host device when the control signal is monitored as an input signal and the activation of the procedure for selecting the transfer mode is detected. Effect due to (4): The first and second control signals having different active levels from the host device to the peripheral device, which are used for activating a procedure for selecting a plurality of transfer modes having different data transfer directions and the like. When it is monitored as an input signal and activation of the procedure for selecting the transfer mode is detected, it is assumed that the other party to be connected is the host device, and by operating, it indicates that the host device side can communicate. The control signal from the host device to the peripheral device is not connected, and the connected host device selects the peripheral device to activate the transfer mode selection procedure. When the control signal from the host device to the peripheral device indicating that the Determine that the device,
It becomes possible to automatically switch the input / output direction of the control signal and the operation.

[0057]

As described above, the transfer data signal,
A parallel interface circuit of the present invention, which controls exchange of signals including a control signal from a host device controlling data transfer to a peripheral device and a control signal from a peripheral device controlling data transfer to a host device, is provided in a personal computer or the like. When applied to a device such as an electronic still camera that transfers data between the host device of 1 above and a peripheral device such as a printer, the following special effects are obtained.

Effect of (Claim 1): By switching the input / output direction of the control signal to operate depending on whether the connected party is a host device or a peripheral device, a device such as an electronic still camera can be operated. Using one connector, it is possible to connect to a host device such as a PC and a peripheral device such as a printer.

Effect of (Claim 2): Whether the partner is the host device or not is provided by having a setting means that enables the operator to set whether the partner to be connected is the host device or the peripheral device. Depending on whether the device is a peripheral device, it is possible to easily and surely switch the input / output direction and operation of the control signal.

Effect of (Claim 3): When it is detected that the control signal from the host device to the peripheral device indicating that the host device side is communicable is active, it is determined that the other party to be connected is the host device. By operating, it is possible to determine that the other party is the host device and automatically switch the input / output direction of the control signal and the operation.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of a parallel interface circuit according to an embodiment of the present invention.

FIG. 2 is an operation timing chart of a compatibility mode at the time of initialization of an operation according to the IEEE 1284 standard.

FIG. 3 is a timing chart of a negotiation operation according to the IEEE 1284 standard.

[Explanation of symbols]

 100 Control Unit 200 Transceiver Group 201-212 Transceiver 221-225, 227-231 Pull-up Resistor 226,232 Pull-down Resistor 300 Connector 400 Host / Peripheral Setting Unit

Claims (3)

[Claims] 1. Transfer data between a host device and a peripheral device controlled by the host device, a control signal from the host device for controlling the data transfer to the peripheral device, and the peripheral for controlling the data transfer. A parallel interface circuit that controls the transmission and reception of a control signal from a device to the host device, and operates by switching the input / output direction of the control signal depending on whether the connection partner is a host device or a peripheral device. Characteristic parallel interface circuit. 2. The parallel interface circuit according to claim 1, further comprising setting means for setting whether the connection partner is a host device or a peripheral device. 3. A control signal from the host device to a peripheral device, which indicates that the host device side is communicable, is monitored as an input signal, and when it is detected that the control signal is active, the connection partner is The parallel interface circuit according to claim 1, which operates as a host device.