JPH09116815A - Solid-state image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a polygonal line approximation characteristics in a device without causing unevenness of a fixed pattern to an image. SOLUTION: In the broad dynamic range CCD solid-state image pickup device having high sensitivity pixels 11 and low sensitivity picture elements 12 at a prescribed picture element arrangement, a signal charge is read out of the high sensitivity pixels 11 and the low sensitivity picture elements 12 to a vertical CCD register 13 and transferred to a horizontal CCD register 14, in which a point sequential signal is obtained. The signal charge of the high sensitivity picture elements 11 is clipped by a single limiter 15 and the clipped signal charge and the signal charge of the other sensitivity are mixed by a floating diffusion capacitor of a charge mixture section 16.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device, and more particularly to a so-called wide dynamic range CCD (Charge Coupled Device) having a wide dynamic range with respect to an optical input.
ce) A solid-state imaging device.

[0002]

2. Description of the Related Art In a CCD solid-state image pickup device, since the signal output becomes constant after the signal charges photoelectrically converted and accumulated in each pixel overflow from the pixel, a signal output corresponding to a larger amount of incident light can be obtained. And therefore has a narrow dynamic range for optical input. In order to expand this dynamic range, as shown in FIG.
Types of pixels, such as high sensitivity pixel 101 and low sensitivity pixel 10
2 are arranged adjacent to each other, and the signal charge of the high-sensitivity pixel 101 is read out to the vertical CCD register 103 after a limiter is applied in the pixel, and the signal charge of the high-sensitivity pixel 101 and the low-sensitivity pixel 102 are read in the register 103. There is a solid-state imaging device having a structure in which the signal charges of (1) are mixed and then transferred to the charge detection unit 105 via the horizontal CCD register 104 to be converted into an electric signal (see Japanese Patent Laid-Open No. 3-117281).

In such a CCD solid-state image pickup device, when the amount of incident light exceeds a certain amount, the signal charge of the high-sensitivity pixel 101 is subject to a limiter.
By mixing the signal charge of 1 and the signal charge of the low-sensitivity pixel 102, the input / output characteristic of the broken line approximation shown in FIG. 13 is obtained, and a wide dynamic range is realized. In addition, as a means for applying a limiter to each pixel, the use of an overflow drain is shown as a specific example in the above publication.

[0004]

However, in the conventional CCD solid-state image pickup device having the above-described structure in which the limiter is applied to each pixel in the high-sensitivity pixel 101, in reality, the overflow characteristic varies from pixel to pixel. As shown in FIG. 14, there is an offset in the polygonal line characteristic. Therefore, the high sensitivity pixel 101
When the amount of incident light is such that the image is saturated, there is a problem that unevenness of the fixed pattern occurs in the image due to different overflow characteristics for each pixel. Further, when the signal compressed by the polygonal line approximation is expanded, this offset is also expanded at the same time, and the problem becomes more serious.

The present invention has been made in view of the above problems, and an object thereof is to obtain a solid line approximation characteristic in a device without causing unevenness of a fixed pattern in an image. An object is to provide an imaging device.

[0006]

A solid-state image pickup device according to the present invention transfers an image pickup section for obtaining two or more types of signal charges having different sensitivities and a signal charge having different sensitivities transferred from the image pickup section as a dot-sequential signal. Charge transfer unit, a single limiter that clips at least the signal charge other than the signal charge with the minimum sensitivity among the signal charges transferred by this charge transfer unit, and the signal charge clipped by this limiter and other sensitivity And a charge mixing section for mixing the signal charges of the above.

In the solid-state image pickup device having the above structure, when two or more kinds of signal charges having different sensitivities are transferred from the image pickup part to the charge transfer part, the charge transfer part makes these signal charges having different sensitivities into dot-sequential signals. Transfer to. Then, at least the signal charges other than the minimum sensitivity signal charges are clipped by a single limiter, and then the clipped signal charges and the other sensitivity signal charges are mixed in the charge mixing section.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a configuration diagram showing a first embodiment of the present invention. In FIG. 1, for example, two types of pixels having different sensitivities, that is, a row of high-sensitivity pixels 11 and a row of low-sensitivity pixels 12 are alternately arranged in a stripe shape in the horizontal direction (left-right direction in the drawing) in the imaging unit 10. Has been done. Here, as a method of changing the sensitivity of the pixel,
Possible methods include changing the opening area of the sensor portion that constitutes the pixel, changing the magnification of the on-chip lens, attaching a filter having different transmittance, and changing the signal charge storage time. In the drawings, the high-sensitivity pixels 11 are schematically shown by □ with a large area, and the low-sensitivity pixels 12 are schematically shown by □ with a small area.

The high-sensitivity pixel 11 and the low-sensitivity pixel 12 are made of, for example, photodiodes, photoelectrically convert incident light,
The signal charge is converted into a signal charge having an amount corresponding to the amount of light, and the signal charge is accumulated. A vertical CCD register 13 is arranged for each pixel row of the high sensitivity pixel 11 and the low sensitivity pixel 12. The vertical CCD register 13 is composed of a packet group capable of independently transferring the signal charge of each pixel. This makes it possible to read out the signal charges of all pixels independently (so-called all-pixel reading method). A horizontal CCD register 14 is arranged below the image pickup unit 10 in the drawing.

The horizontal CCD register 14 is used in the image pickup unit 1.
The signal charges transferred from 0 are sequentially horizontally transferred in pixel units. A limiter 15 is provided beside the output end of the horizontal CCD register 14. The limiter 15 is for uniformly clipping the signal charges sequentially transferred in pixel units. On the output side of the horizontal CCD register 14, for example, a charge detection unit 16 having a floating diffusion amplifier configuration is arranged. In the charge detection unit 16, a predetermined DC voltage is applied to the reset drain (RD) and a reset gate pulse is applied to the reset gate (RG). Further, the reset frequency (frequency of the reset gate pulse) fs of the charge detection unit 16 is the driving frequency 2f of the horizontal CCD register 14.
It is set to 1/2 of s.

FIG. 2 shows a concrete configuration of the limiter 15.
This is shown in the section taken along the line XX 'in FIG. In FIG. 2, a horizontal CCD channel 22 is formed by an N-type impurity layer formed on the front surface side of a P-type substrate 21, and a horizontal CCD gate electrode 24 is disposed on the horizontal CCD channel 22 via a gate insulating film 23, thereby horizontally The CCD register 14 is configured. Adjacent to the horizontal CCD register 14, N ^- drain 26 of the overflow barrier 25 and N-type impurity layer made of type impurity layer is provided, the limiter 15 is constituted by the overflow barrier 25 and the drain 26 . A predetermined DC voltage E1 is applied to the drain 26.

In the limiter 15 having the above structure, the overflow barrier 25 is formed depending on the concentration of the N ^-- type impurity layer.
The height of the potential of is determined, and the height of this potential becomes the clip level. Then, in the horizontal CCD register 14, when the signal charges of the high-sensitivity pixels are sequentially transferred and accumulated in the packet on the side of the limiter 15, when the charge amount exceeds the clip level, the excess charge is drained 26. The signal charges of the high-sensitivity pixels are limited by being thrown away. The transfer direction of the horizontal CCD register 14 is perpendicular to the paper surface.

In this embodiment, the overflow barrier 2
Although the description has been given by taking the case where the height of the potential of 5, that is, the clip level is fixed as an example, as shown in FIG.
An overflow gate electrode 27 is provided above the overflow barrier 25 separately from the horizontal CCD gate electrode 24,
By controlling the DC voltage E2 applied to the overflow gate electrode 27, the clip level can be made variable. It is also possible to eliminate the N ⁻ type impurity layer and set the clip level only by the DC voltage E2 applied to the overflow gate electrode 27.

In the CCD solid-state image pickup device according to the first embodiment having the above structure, signal charges obtained by photoelectric conversion in the high sensitivity pixel 11 and the low sensitivity pixel 12 are vertical CCDs.
This is read out to the register 13 and this vertical CCD register 1
3 to the horizontal CCD register 14 sequentially in pixel units. At this time, the signal charges of the high sensitivity pixels 11 and the signal charges of the low sensitivity pixels 12 are alternately arranged in the horizontal CCD register 14. Therefore, the horizontal CCD register 14
By operating the high sensitivity pixel 11 and the low sensitivity pixel 12
Each of the signal charges is transferred to the output side as a dot-sequential signal.

In this horizontal transfer operation, the high sensitivity pixel 1
When the signal charge of 1 is accumulated in the packet beside the limiter 15, the charge amount of the accumulated signal charge is limited by the limiter 1.
If the clamp level of 5 is exceeded, the excess charge is clipped. The clipped signal charges are transferred to the floating diffusion capacitance of the charge detection unit 16.

Since the reset frequency fs of the charge detector 16 is set to 1/2 of the driving frequency 2fs of the horizontal CCD register 14, it is transferred to the floating diffusion capacitance of the charge detector 16 first. Since the signal charge for the next one pixel is transferred before the signal charge for one pixel is reset, the signal charge for two pixels, that is, each signal charge of the high sensitivity pixel 11 and the low sensitivity pixel 12 floats. -Mixed by the diffusion capacitance, where it is converted to an electrical signal. FIG. 4 shows the horizontal CCD register 1
4 shows the timing relationship between the horizontal drive pulse of No. 4, the reset gate pulse of the charge detection unit 16, and the CCD output waveform.

As described above, C according to the first embodiment
In the CD solid-state imaging device, after transferring the signal charge of the high sensitivity pixel 11 and the signal charge of the low sensitivity pixel 12 to the horizontal CCD register 14 so as to become a dot-sequential signal, A limiter 15 provided beside the output end of the horizontal CCD register 14 applies a limiter, and then the signal charge of the high sensitivity pixel 11 and the signal charge of the low sensitivity pixel 12 are floated by the charge detection unit 16.
Since the signal charges of the high-sensitivity pixels 11 are limited by the common limiter 15 by mixing with the diffusion capacitance, it is possible to suppress the occurrence of unevenness of the fixed pattern in the image.

FIG. 5 is a block diagram showing a second embodiment of the present invention. In the figure, the same parts as those in FIG. 1 are designated by the same reference numerals. In the second embodiment, the horizontal CCD register in the first embodiment (hereinafter referred to as the first horizontal CC
Between the output end of the D register) 14 and the charge detection unit 16,
Second horizontal CCD of at least 1 bit (1 packet)
The register 17 is provided continuously to the first horizontal CCD register 14, and the drive frequency of the second horizontal CCD register 17 is set to 2 fs for the drive frequency of the first horizontal CCD register 14.
The configuration is set to 1/2.

In the CCD solid-state image pickup device, the horizontal CCD register is generally provided with a so-called idle feed portion that does not simply transfer the signal charges from the image pickup portion 10 due to the structure, but only performs horizontal transfer. Since the extra bits are provided, this idle feed section may be used to provide the second horizontal CCD register 17. Therefore, in comparison with the configuration of the first embodiment, the second horizontal CC
The drive frequency of the idle feed section which becomes the D register 17 is only changed from 2fs to fs, and there is no need to change it structurally.

In the CCD solid-state image pickup device according to the second embodiment having the above structure, the signal charges obtained by photoelectric conversion in the high-sensitivity pixel 11 and the low-sensitivity pixel 12 are similar to those in the first embodiment. The data is read out to the vertical CCD register 13 and the first horizontal CC is read from this vertical CCD register 13.
The data is sequentially transferred to the D register 14. The signal charges of the high sensitivity pixel 11 and the low sensitivity pixel 12 are transferred to the first horizontal CCD.
It is transferred to the output side as a dot-sequential signal by the register 14.

In this horizontal transfer operation, the high sensitivity pixel 1
When a signal charge of 1 is accumulated in the packet beside the limiter 15, if the charge amount exceeds the clamp level of the limiter 15, the excess charge is clipped. This clipped signal charge is transferred to the second horizontal CCD.
It is transferred to the register 17. At this time, the second horizontal CC
Since the driving frequency fs of the D register 17 is set to 1/2 of the driving frequency 2fs of the first horizontal CCD register 14, the signal charge for one pixel previously transferred to the second horizontal CCD register 17 is set. Since the signal charge for the next one pixel is transferred before the charge is transferred to the charge detection unit 16, the second
The horizontal CCD register 17 mixes the signal charges of the high-sensitivity pixel 11 and the low-sensitivity pixel 12.

The mixed signal charges are transferred to the charge detector 1
It is transferred to the floating diffusion capacitor 6 and converted into an electric signal to be a CCD output. FIG. 6 shows the timing relationship between the drive pulse of the first horizontal CCD register 14, the horizontal drive pulse of the second horizontal CCD register 17, the reset gate pulse of the charge detector 16 and the CCD output waveform.

As described above, C according to the second embodiment
In the CD solid-state imaging device, the signal charges of the high-sensitivity pixels 11 and the signal charges of the low-sensitivity pixels 12 are transferred to the first horizontal CCD register 14 so as to become dot-sequential signals, and then the signals of the high-sensitivity pixels 11 are transferred. In the case of the first embodiment, the limiter is applied to the charges, and then the signal charges of the high sensitivity pixel 11 and the signal charges of the low sensitivity pixel 12 are mixed by the second horizontal CCD register 17. Similarly to the above, a common limiter 15 for each signal charge of the high sensitivity pixel 11 is used.
Since the limiter is applied, it is possible to suppress the occurrence of non-uniformity of the fixed pattern in the image, and it is also possible to set a wide sampling period for the CCD output waveform, as is apparent from the timing waveform chart of FIG.

FIG. 7 is a block diagram showing a third embodiment of the present invention. In the figure, the same parts as those in FIG. 1 are designated by the same reference numerals. In the third embodiment, the charge detector 1
The drive timing of 6 is changed, the signal charge of the high-sensitivity pixel 11 is first limited by the floating diffusion of the charge detection unit 16, and then the signal charges of the high-sensitivity pixel 11 and the low-sensitivity pixel 12 are mixed. Has become.

That is, as is apparent from FIG. 8, the drive frequency fs of the charge detector 16 is set to 1/2 of the drive frequency 2fs of the horizontal CCD register 14, and the reset gate pulse is set to three values. Then, the reset gate is turned on and off at the maximum value (hereinafter, referred to as "H" level) and the minimum value (hereinafter, referred to as "L" level) of the reset gate pulse, and an intermediate value (hereinafter, referred to as "M"). The “level” is set so that the saturated signal charge of the high sensitivity pixel 11 can be clipped.

In the CCD solid-state image pickup device according to the third embodiment having the above structure, the signal charge obtained by photoelectric conversion in the high sensitivity pixel 11 and the low sensitivity pixel 12 is the same as in the case of the first embodiment. The data is read out to the vertical CCD register 13 and the first horizontal CC is read from this vertical CCD register 13.
The data is sequentially transferred to the D register 14. The signal charges of the high sensitivity pixel 11 and the low sensitivity pixel 12 are transferred to the first horizontal CCD.
It is transferred to the output side as a dot-sequential signal by the register 14 and supplied to the charge detection unit 16.

On the other hand, in the charge detecting section 16, the resetting of the floating diffusion capacitance is completed by changing the reset gate pulse from the “H” level to the “M” level. After that, the signal charge of the high sensitivity pixel 11 is transferred from the horizontal CCD register 14 to the floating diffusion capacitor. At this time, since the reset gate is at the “M” level, when the signal charge is excessive, it is discharged from the floating diffusion capacitance through the reset gate to the reset drain, so that the signal charge is clipped.

After that, the reset gate is set to the “L” level while the signal charge of the high-sensitivity pixel 11 is held in the floating diffusion capacitance to secure a sufficient dynamic range of the charge detection unit 16, and then the horizontal CCD register 14 is used. The signal charge of the low sensitivity pixel 12 is transferred to the floating diffusion capacitance. As a result, FIG.
As shown in the inside CCD output waveform, the clipped signal charges of the high-sensitivity pixel 11 and the clipped signal charges of the low-sensitivity pixel 12 are mixed by the floating diffusion capacitance.

As described above, C according to the third embodiment
In the CD solid-state imaging device, the signal charge of the high sensitivity pixel 11 and the signal charge of the low sensitivity pixel 12 are transferred to the horizontal CCD register 14 so as to be a dot-sequential signal, and then the signal charge of the high sensitivity pixel 11 is first charged. The floating diffusion capacitance of the detection unit 16 is transferred to a limiter, and then the signal charge of the low sensitivity pixel 12 is transferred to the high sensitivity pixel 1.
By mixing the signal charge of 1 with the signal charge of 1, a limiter is applied to each signal charge of the high-sensitivity pixel 11 in the charge detection unit 16 at a common clip level, so that unevenness of a fixed pattern occurs in an image. Can be suppressed.

Further, unlike the case of the first and second embodiments, it is not necessary to make a structural change such as providing the limiter 15 specially, and the drive timing of the charge detection unit 16 is slightly changed, and the existing There is also an effect that the intended purpose can be achieved by making a slight change to the structure of the CCD solid-state image pickup device of the all-pixel readout system, in which two kinds of pixel sensitivities are set.

In each of the above-described embodiments, the two types of pixels having different sensitivities are arranged in a vertical stripe pattern, but the present invention is not limited to this, and the high sensitivity pixels are transferred to the horizontal CCD register 14. It suffices that the signal charge of 11 and the signal charge of the low-sensitivity pixel 12 are dot-sequential signals. Therefore, as shown in FIG. 9, a CCD solid-state imaging device having a configuration in which high-sensitivity pixels 11 and low-sensitivity pixels 12 are arranged in a checkered pattern, or as shown in FIG. 10, high-sensitivity pixels 11 and low-sensitivity pixels 12 CC in which and are arranged in a horizontal stripe pattern
Another example is a D solid-state image pickup device.

In the case of the checkerboard arrangement shown in FIG. 9, the vertical CC
By transferring the signal charges of the high-sensitivity pixel 11 and the low-sensitivity pixel 12 read out to the D register 13 to the horizontal CCD register 14 one by one (one line) in order, the high-sensitivity pixel 11 is stored in the horizontal CCD register 14. And the signal charges of the low-sensitivity pixels 12 are alternately arranged to form a dot-sequential signal. On the other hand, in the case of the horizontal stripe arrangement of FIG. 10, the high-sensitivity pixel 1 read out to the vertical CCD register 13
1 and the signal charges of the low sensitivity pixel 12 are first stored in one row (1
Line) to the horizontal CCD register 14, then the horizontal CCD register 14 is shifted by 1 bit, and then the signal charge for the next one row is transferred to the horizontal CCD register 14 to obtain a dot sequential signal. Become.

Further, in each of the above-described embodiments, the case where the present invention is applied to the all-pixel readout type CCD solid-state image pickup device having an independent packet for the signal charge of each pixel has been described. For example, as shown in FIG. In the case of mixing the signal charges of a total of 4 pixels of 2 high-sensitivity pixels and 2 low-sensitivity pixels, the present invention is also applied to a CCD solid-state imaging device having a structure of 1 packet for the signal charges of 2 pixels. It is clear that you can do it.

Further, in each of the above-described embodiments, the signal charges having different sensitivities are obtained by making the sensitivities of the pixels different, but the sensitivity is changed by changing the signal charge storage time in a single pixel. It is also possible to obtain signal charges different from each other, and the present invention is applicable to such a CCD solid-state imaging device.

Furthermore, in each of the above embodiments,
High-sensitivity pixel 11 and low-sensitivity pixel 1 as pixels with different sensitivities
2 are provided, but the number is not limited to these two. When the sensitivity is set to three or more, after transferring the signal charge of each pixel to the horizontal CCD register 14,
It suffices to apply a limiter to the signal charges of at least the pixels other than the pixel of the minimum sensitivity and then mix the signal charges of the pixels of each sensitivity.

[0036]

As described above, according to the present invention,
In a wide-dynamic-range solid-state imaging device capable of obtaining two or more types of signal charges having different sensitivities, the signal charges having different sensitivities transferred from the imaging unit are transferred so as to become a dot-sequential signal, and at least the minimum sensitivity is obtained. After the signal charges other than the signal charges are clipped by a single limiter, the clipped signal charges and the signal charges of other sensitivities are mixed, so that the incident light amount that saturates the high-sensitivity pixels is reduced. In this case, since each saturated signal charge is clipped by the common limiter, it is possible to obtain the polygonal line approximation characteristic in the device without causing unevenness of the fixed pattern in the image.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing a first embodiment of the present invention.

FIG. 2 is a sectional view showing an example of the configuration of a limiter.

FIG. 3 is a cross-sectional view showing another example of the configuration of the limiter.

FIG. 4 is a timing waveform chart for explaining the operation of the first embodiment.

FIG. 5 is a configuration diagram showing a second embodiment of the present invention.

FIG. 6 is a timing waveform chart for explaining the operation of the second embodiment.

FIG. 7 is a configuration diagram showing a third embodiment of the present invention.

FIG. 8 is a timing waveform chart for explaining an operation of the third embodiment.

FIG. 9 is a configuration diagram showing another example of a pixel array.

FIG. 10 is a configuration diagram showing still another example of a pixel array.

FIG. 11 is a configuration diagram of a CCD solid-state imaging device having a one-packet structure for two pixels.

FIG. 12 is a configuration diagram showing a conventional example.

FIG. 13 is an input / output characteristic diagram of a polygonal line approximation.

FIG. 14 is an input / output characteristic diagram when an offset occurs.

[Explanation of symbols]

10 Imaging Unit 11 High Sensitivity Pixel 12 Low Sensitivity Pixel 13 Vertical CCD Register 14 Horizontal CCD Register (First Horizontal CCD Register) 15 Limiter 16 Charge Detector 17 Second Horizontal CCD Register 22 Horizontal CCD Channel 24 Horizontal CCD Gate Electrode 25 Overflow barrier

Claims (4)

[Claims] 1. An image pickup section for obtaining n kinds of signal charges having different sensitivities (n is an integer of 2 or more), and a charge transfer section for transferring the signal charges having different sensitivities transferred from the image pickup section as a dot-sequential signal. Among the signal charges transferred by the charge transfer unit, a single limiter that clips at least a signal charge other than the signal charge having the minimum sensitivity, and a signal charge clipped by the limiter and a signal charge having another sensitivity are provided. A solid-state imaging device, comprising: a charge mixing unit for mixing. 2. The limiter is provided so as to clip a signal charge in the charge transfer section, and the charge mixing section converts a signal charge transferred from the charge transfer section into an electric signal. 2. The solid-state imaging device according to claim 1, wherein the solid-state imaging device has a drive frequency set to 1 / n of a drive frequency of the charge transfer unit. 3. The limiter is provided so as to clip a signal charge in the charge transfer section, and the charge mixing section is provided with a second charge continuously provided at an output end of the charge transfer section. The solid-state imaging device according to claim 1, wherein the solid-state imaging device is a transfer unit, and a drive frequency thereof is set to 1 / n of a drive frequency of the charge transfer unit. 4. The limiter and the charge mixer are
A charge detection unit including a floating diffusion amplifier that converts the signal charge transferred from the charge transfer unit into an electric signal, and its drive frequency is set to 1 / n of the drive frequency of the charge transfer unit. , The reset gate pulse has three values, clips the high-sensitivity-side signal charge transferred from the charge transfer unit to the floating diffusion capacitance, and then transfers at least the minimum sensitivity from the charge transfer unit to the floating diffusion capacitance. A solid-state imaging device characterized by being mixed with the signal charge of.