JPH09116169A - Semiconductor quantum dot device and method of using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a magnetism-sensitive element of high sensitivity by controlling movement of carriers between quantum dots constituting a quantum dot line laminated in a longitudinal direction, with a magnetic field. SOLUTION: When a magnetic field is applied to a semiconductor quantum dot device, a carrier 10 moves from a base level 9 of one side of a quantum dot 6 to a base level 9 of the other side of a quantum dot 6. That is, the electron 10 is affected by a vertical magnetic field B for performing cyclotron motion, and according to it, the energy of the electron 10 is varied. So that, since the larger effect of cyclotron motion is produced the more intense the magnetic field is, the transition probability of the electron is made small, so that transition of the electron is controlled with the magnetic field. That is, the quantum dot 6 is formed in the condition aligned in the longitudinal direction, by distortion based on differences of lattice constant between a well layer 2 and a barrier layer 5, and a spacer layer 3. By this, a magnetism-sensitive element of high sensitivity is realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor quantum dot device and a method of using the same, and more particularly to a semiconductor quantum dot device and a semiconductor quantum dot device adapted to control a carrier transport phenomenon between stacked quantum dots by a magnetic field. It is about how to use it.

[0002]

2. Description of the Related Art Conventionally, a magnetic disk has been used as a recording medium having a large information processing capability, and MR (M
agneto-resistance) materials and GMR
(Giant Magneto-resistance
e) Material is used.

In particular, GMR materials have been attracting attention as high-sensitivity elements in the future, but GMR materials have various problems in practical use because their characteristics are severely deteriorated by temperature and their power consumption is large.

Further, a semiconductor magneto-sensitive element such as a Hall effect element using a semiconductor as a channel layer has a Hall voltage V _H
Is determined by the magnetic flux density B and the thickness d of the channel layer,
That is, V _H = R _H · B · I / d (where R _H is the Hall coefficient, I
Is the current flowing through the Hall effect element), so the magnetic susceptibility (V _H / B) depends on the value of I / d, but there is a limit to the amount of current that can flow, and there is also a limit to how thin the channel layer can be made. Therefore, the magnetic susceptibility could not be made sufficiently large.

On the other hand, recently, a technique for forming fine quantum dots (quantum boxes) in a semiconductor has been born, and a photo hole burning memory using this quantum dot, a three-dimensional quantum well semiconductor laser, or a single electron tunnel. New functional devices such as transistors have been proposed.

Quantum dots have a size as small as 300 Å or less and can have a very high density.
In addition, since the energy level is quantized three-dimensionally and only a certain energy state is allowed, a normal semiconductor or another quantum well, that is, a one-dimensional quantum well, or 2
It has distinctive features different from the dimension quantum well (quantum wire).

Various methods for producing such quantum dots have been proposed. Recently, GaAs has been formed on a GaAs substrate.
It has been proposed that InAs quantum dots are self-generated due to strain energy by epitaxially growing InAs having different lattice constants (for example, Y. SUGIYAMA, Y. NAKATA,
K. IMAMURA, S.M. MUTO, N.M. YOKOYA
MA, Extended Abstracts of
he 1995 International Conf
erence on Solid State Dev
ices and Materials, Osaka,
1995-8, p. 773 to 775), the description will be made with reference to FIG. Note that FIG. 6 is a copy of a TEM (transmission electron microscope) photograph.

Referring to FIG. 6A, first, on a (001) plane GaAs substrate (not shown),
Using the MBE method (molecular beam epitaxial growth method) under the substrate temperature condition of 510 ° C., the thickness of 1.8 ML (monolayer) is formed via the GaAs buffer layer 61 having a thickness of 200 nm.
r: monoatomic layer) InAs layer 62, Ga having a thickness of 10 nm
As spacer layer 63, thickness 1.8 ML (monolay)
er: monoatomic layer) InAs layer 62 and thickness 150
nm GaAs barrier layer 64 is grown continuously. Note that 1.8 ML represents the nominal thickness of the epitaxial layer that grows when the raw material is supplied in 1.8 times the supply amount required to grow 1 ML as the supply amount of atoms.

In this case, a plurality of InAs quantum dots 6 having a lateral size of 30 nm or less due to strain energy are used.
5 is automatically formed, and InAs quantum dots 6 are formed.
During the period 5, a wetting layer 66 having a composition of about In _0.2 Ga _0.8 As is formed.

Further, the InAs quantum dots 6 of the first layer
When No. 5 is formed, the strain on the No. 5 also increases, and therefore a quantum dot row is formed in the vertical direction so as to be substantially aligned with the InAs quantum dots 65 of the first layer.

See FIG. 6B. This vertical quantum dot array is formed in multiple layers as shown in FIG. 6B. In this case, Ga of the (001) plane is formed.
An InAs layer 62 having a thickness of 1.8 ML is formed on an As substrate (not shown) using a MBE method (molecular beam epitaxial growth method) under a substrate temperature condition of 510 ° C. via a GaAs buffer layer 61 having a thickness of 200 nm. And GaA with a thickness of 15 nm
The s spacer layers 63 are alternately grown for 50 cycles.

In this case, about 4 layers of InAs quantum dots 65 were observed to be vertically stacked, and the maximum was 6 layers.
When the thickness of the InAs layer 62 was set to 2.5 ML, a maximum of 9 quantum dot arrays in the vertical direction were observed.

[0013]

However, in the above proposal, only the phenomenon that the InAs quantum dot arrays in the vertical direction are formed has been confirmed, and the application thereof is an optical storage device or a multiple tunnel junction. The single element device used is only abstractly suggested, and the specific element structure,
Also, the operating mechanism has not been proposed.

Therefore, according to the present invention, this vertical In
It is intended to propose a specific structure of a semiconductor quantum dot device such as a magnetic sensitive element using an As quantum dot array and a method of using the same to aim at practical application of a vertical InAs quantum dot array. .

[0015]

FIG. 1 is an explanatory view of the principle configuration of the present invention, and means for solving the problems in the present invention will be described with reference to FIG. See FIG. 1 (a). (1) The present invention is characterized in that, in a semiconductor quantum dot device, the movement of carriers 10 between quantum dots 6 constituting a vertically stacked quantum dot array is controlled by a magnetic field. To do.

1B and 1C, when a magnetic field is applied to such a semiconductor quantum dot device, it moves from the ground level 9 of one quantum dot 6 to the ground level 9 of the other quantum dot 6 (transition). The carrier 10 which is), that is, the electron 10, is affected by the vertical magnetic field B to perform cyclotron motion, and the energy of the electron 10 is changed accordingly. Therefore, the stronger the magnetic field is, the more it is affected by the cyclotron motion, and thus the transition probability of electrons becomes small, so that the transition of electrons can be controlled by the magnetic field.

In this case, the size of the quantum dot 6 is 30n.
Since it is m or less, the emission area and the incident area of the electron 10 are reduced, and the sensitivity to the magnetic field B can be extremely increased.

(2) Further, the present invention is characterized in that, in the above (1), the movement of the carrier 10 is due to a tunnel phenomenon.

One quantum dot 6 and the other quantum dot 6
By thinning the spacer layer 3 between and, the transition of the electron 10 between the ground level 9 of one quantum dot 6 and the ground level 9 of the other quantum dot 6 becomes a tunnel phenomenon. , This tunnel transition will be controlled by the magnetic field B.

That is, when a predetermined voltage is applied in the state where the magnetic field B is not applied, the vertical magnetic field B is applied to the semiconductor quantum dot device in which the ground levels 9 of both quantum dots 6 have substantially equal currents. When applied, the electron is affected by the magnetic field B and its energy state changes, so that it does not match the energy of the ground level 9 of the right quantum dot 6,
The transition probability decreases sharply and the current stops flowing.

(3) Further, the present invention is characterized in that, in the semiconductor quantum dot device, a quantum dot row is provided between two independent quantum dots facing each other in the vertical direction.

In this case, the electrons injected from one independent quantum dot into the quantum dot array have a very low probability of scattering due to the electrons, as compared with the case of an ordinary single-layer base layer, and thus the high probability. It is a current gain and can also operate as a very fast device.

(4) Further, the present invention is characterized in that in the above (3), two independent quantum dots are used as an emitter region and a collector region, respectively, and a quantum dot row is used as a base region.

The semiconductor quantum dot device as described above is HET
By using (hot electron transistor), a high-speed semiconductor device such as a high-speed logic circuit device can be formed.

(5) Further, the present invention is characterized in that, in the above (3) or (4), the movement of the carrier 10 between two independent quantum dots is controlled by a magnetic field. With such a HET structure semiconductor quantum dot,
It is possible to form a highly sensitive magnetic element.

(6) Further, in the present invention, in the method of using the semiconductor quantum dot device described in any one of the above (1) to (5), a change in transport efficiency of carriers 10 due to a magnetic field B is caused by a change in current. It is characterized by

As described above, by controlling the current flowing through the semiconductor quantum dot device by the magnetic field B, a magnetic sensitive element such as a highly sensitive magnetic control switch element can be constructed.

(7) Further, in the present invention, in the method of using the semiconductor quantum dot device according to any one of the above (1) to (5), the strength of the magnetic field is measured based on the change of the electric current B with the magnetic field. It is characterized by doing.

As described above, the intensity of the magnetic field B can be measured with high accuracy by reading the change in the current flowing through the semiconductor quantum dot device at a constant bias.

[0030]

FIG. 2 shows a first embodiment of the present invention.
This will be described with reference to FIG. See FIG. 2A. First, an n-type GaAs buffer layer having a thickness of 200 nm, which functions as a barrier layer, is formed on the (001) -faced n-type GaAs substrate 11 by using the MBE method at a substrate temperature of 510 ° C. 12, InAs layer 13 having a thickness of 1.8 ML, thickness 10
The i-type GaAs spacer layer 14 having a thickness of 1.8 nm, the InAs layer 15 having a thickness of 1.8 ML, and the n-type GaAs barrier layer 16 also functioning as a contact layer are sequentially epitaxially grown. In this case, two InAs quantum dots 17 are vertically aligned and formed due to strain caused by a difference in lattice constant between InAs and GaAs.

Next, a semiconductor quantum dot device is completed by depositing a conductive film such as Au.Ge to form the pair of electrodes 18 and 19. In this case, since a plurality of quantum dot arrays are actually formed, when the semiconductor quantum dot device is configured by only one quantum dot array, one quantum dot is averaged according to the distribution density of the quantum dots. It is necessary to form the electrodes 18 and 19 having a size including dots.

See FIG. 2B. This semiconductor quantum dot device is supplied with a predetermined voltage from the power source 20.
For example, by applying a voltage of 0.2 V, the electrons 22 at the ground level 21 of the quantum dot 17 on the side to which the − potential is applied tunnels through the i-type GaAs spacer layer 14 and the other quantum dot. A current flows due to the transition to the 17th ground level.

However, by applying a magnetic field B perpendicular to the stacking direction of this semiconductor quantum dot device, the electrons 22 undergo cyclotron motion and their energy states change,
The energy is different from the ground level 21 of the other quantum dot 17, and the ground level 21 to be transitioned is lost, so that the transition probability decreases stepwise as the magnetic field B increases.

Further, in this case, the size of the quantum dot 17 in the lateral direction is as small as 30 nm or less, and the electrons 21 in the quantum dot 17 can be in a very limited state, so that the sensitivity to the magnetic field B becomes very high. Since the conduction of the semiconductor quantum dot device can be controlled with high sensitivity by applying the magnetic field B, a high-performance magnetic sensitive element using the magnetic field B as a switching means can be constructed. Although the physical size of the quantum dot 17 is 30 nm or less, it is presumed that the effective size is 10 nm or less due to the influence of the depletion layer and the interface state.

Next, a second embodiment of the present invention will be described with reference to FIG. See FIG. 3A. First, on the semi-insulating GaAs substrate 23, the substrate temperature is set to 51.
Using the MBE method at 0 ° C., an n-type GaAs buffer layer 12 having a thickness of 200 nm, which functions as a barrier layer,
A 1.8 ML thick InAs layer 13, a 10 nm thick i-type GaAs spacer layer 14, a 1.8 ML thick InAs layer 15, and an n-type GaA also functioning as a contact layer.
The s barrier layer 16 is sequentially epitaxially grown. Also in this case, a plurality of quantum dot rows (three rows in the figure) including the two InAs quantum dots 17 are formed due to the strain caused by the difference in lattice constant between InAs and GaAs.

Next, the n-type GaAs barrier layers 16 to I are formed.
A semiconductor quantum dot device is completed by selectively etching the nAs layer 13 to expose the n-type GaAs buffer layer 12 and then depositing a conductive film such as Au.Ge to form a pair of electrodes 18 and 19. To do.

In this case, the size of the quantum dots 17 in each quantum dot array is appropriately distributed, and when a predetermined voltage is applied from the power source 20 to this semiconductor quantum dot device, each quantum dot is The position where the current changes stepwise in the sequence is different, and the average characteristic of each quantum dot sequence appears as a whole, and the magnetic field dependence of such overall current is inversely proportional as shown by the solid line. It will show a tendency. The broken line in FIG. 3B shows the characteristics when the size of the quantum dots 17 is uniform, and is the same as the characteristics of the semiconductor quantum dot device shown in FIG. 2A.

Therefore, since the current I is reduced substantially linearly with the increase of the magnetic field B, the current I flowing through the semiconductor quantum dot device is measured by the ammeter 24 to accurately measure the magnetic field strength B. Therefore, a highly sensitive magnetic detection element can be constructed.

In the second embodiment, the electrode 1
Since 8 and 19 can be formed on the entire surface, the manufacturing is easier than in the first embodiment, and when the magnetic field B is used as the bias means, it is as in the first embodiment. The current I can be controlled in an analog manner, not as a switching element.

Next, a third embodiment of the present invention will be described with reference to FIG. See FIG. 4A. First, the substrate temperature is set to 51 on the semi-insulating GaAs substrate 41.
Using the MBE method at 0 ° C., an n-type GaAs buffer layer 42 having a thickness of 200 nm, which functions as a barrier layer,
1.8 ML thick InAs layer 43 and 25 nm thick
After growing the i-type GaAs collector barrier layer 44, the InAs layer 45 having a thickness of 1.8 ML and the iAs having a thickness of 5 nm are formed.
-Type GaAs spacer layers 46 are alternately grown in a plurality of layers, five layers in the case of the figure, and then a 10 nm-thick i-type GaA layer is grown.
s emitter barrier layer 47, InAs layer 48 having a thickness of 1.8 ML, and n-type GaA also functioning as a contact layer
The s barrier layer 49 is sequentially epitaxially grown.

Also in this case, two independent InA layers are formed due to the strain caused by the difference in lattice constant between InAs and GaAs.
The s quantum dots 51 and 52 are formed, and a continuous quantum dot row 53 aligned vertically with the positions of the quantum dots 51 and 52 is formed. In this continuous quantum dot array 53, the boundary of each quantum dot is ambiguous, and it behaves like a quantum wire (two-dimensional quantum well).

Since the semiconductor quantum dot device according to the third embodiment operates as a 3-terminal HET (hot electron transistor), a potential is applied to the base region where the continuous quantum dot array 53 exists. I-type GaAs spacer layer 4
A part of 6, and in the figure, one layer is replaced with an n-type GaAs spacer layer 50.

Next, the n-type GaAs barrier layers 49 to I are formed.
The nAs layer 43 is selectively etched to expose the n-type GaAs buffer layer 42, and then the n-type GaAs barrier layers 49 to InAs layers 43 are selectively etched to n.
After exposing the type GaAs spacer layer 50, Au.G
A semiconductor quantum dot device is completed by depositing a conductive film such as e to form the emitter electrode 54, the base electrode 55, and the collector electrode 56.

When a potential similar to HET is applied to this semiconductor quantum dot device, the electrons 57 existing at the ground level of the quantum dot 52 on the emitter side tunnel through the i-type GaAs emitter barrier layer 48. Then, it is injected as hot electrons into the corresponding continuous quantum dot array 53 which becomes the base region, and reaches the collector-side quantum dot 51 through the i-type GaAs collector barrier layer 44.

In this case, since the base region is composed of the continuous quantum dot array 53, the electron scattering is much smaller than that of the base region made of a normal bulk layer, so that a high-speed and high-performance HET can be obtained. It can be realized.

Also in this case, a plurality of consecutive quantum dot rows 53 are actually formed, but since the probability of forming the consecutive quantum dot rows 53 is low, the consecutive quantum dot rows 53 are formed. Has a small distribution density, and therefore, the area including one continuous quantum dot row 53 is large on average, so that one continuous quantum dot row 53
It becomes easy to form the emitter electrode 54 corresponding to.

Furthermore, by using the continuous quantum dot array 53 in the semiconductor quantum dot device of the third embodiment in a state where a plurality of continuous quantum dot arrays 53 are provided, it is possible to realize HET with high current gain.

Next, a fourth embodiment of the present invention will be described with reference to FIG. Referring to FIG. 5, first, as in the third embodiment, an n-thick film having a thickness of 200 nm that functions as a barrier layer is formed on the semi-insulating GaAs substrate 41 by MBE at a substrate temperature of 510 ° C.
-Type GaAs buffer layer 42, 1.8 ML thick InAs
After growing the layer 43 and the i-type GaAs collector barrier layer 44 having a thickness of 25 nm, the InA having a thickness of 1.8 ML is formed.
s layer 45, i-type GaAs spacer layer 46 having a thickness of 5 nm
Alternately, a plurality of layers, in the case of the figure, five layers are grown, and then,
An i-type GaAs emitter barrier layer 47 having a thickness of 10 nm, an InAs layer 48 having a thickness of 1.8 ML, and an n-type GaAs barrier layer 49 also functioning as a contact layer are sequentially epitaxially grown.

Also in this case, a plurality of independent InAs quantum dots 51, 52 facing each other are formed on the emitter side and the collector side due to the strain caused by the difference in lattice constant between InAs and GaAs, and the quantum dots are formed. 51,
A continuous quantum dot array 5 aligned vertically with the position of 52
3 are formed in a plurality of rows.

Next, the n-type GaAs barrier layers 49 to I are formed.
After selectively etching the nAs layer 43 to expose the n-type GaAs buffer layer 42, a conductive film of Au.Ge or the like is deposited to form an emitter electrode 54 and a collector electrode 56. Complete.

Further, in the case of the semiconductor quantum dot device of the fourth embodiment, since it is a two-terminal type magnetic sensitive element, the i-type GaAs spacer layer 46 is different from the third embodiment. It is not necessary to replace a part of the n-type GaAs spacer layer 50 in the figure.

When a magnetic field B is applied to this semiconductor quantum dot device while applying a predetermined voltage, the energy of hot electrons traveling in the base region is lowered by applying the magnetic field B, and the magnetic field B is equal to or higher than the predetermined magnetic field. Then, the i-type GaAs collector barrier layer 44 cannot be exceeded in terms of energy, and no current flows. In this case, a large output can be obtained by increasing the number of consecutive quantum dot rows 53.

In each of the above-mentioned embodiments, GaAs is used as the barrier layer and the spacer layer and InAs is used as the well layer in order to form the quantum dots, but the combination is not limited to this. Not a combination of GaAs and InAs, or InGa
A combination of P and InAs may be used.

In each of the above-described embodiments, an n-type element using electrons as carriers has been described. However, by replacing the n-type layer in the embodiments with a p-type layer, holes are used as carriers. A p-type element using

[0055]

According to the present invention, quantum dots can be formed in a longitudinally aligned state by strain due to the difference in lattice constant between the well layer and the barrier layer and the spacer layer. It is possible to realize a highly sensitive magnetic sensitive element by controlling the transition and transport of carriers between quantum dots forming a quantum dot array by a magnetic field, and a transistor with a high current gain when used as a HET. Can be realized.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a principle configuration of the present invention.

FIG. 2 is an explanatory diagram of the first embodiment of the present invention.

FIG. 3 is an explanatory diagram of a second embodiment of the present invention.

FIG. 4 is an explanatory diagram of a third embodiment of the present invention.

FIG. 5 is an explanatory diagram of a fourth embodiment of the present invention.

FIG. 6 is an explanatory diagram of a conventional quantum dot array.

[Explanation of symbols]

 1 Barrier Layer 2 Well Layer 3 Spacer Layer 4 Well Layer 5 Barrier Layer 6 Quantum Dot 7 Electrode 8 Electrode 9 Base Level 10 Carrier 11 n-type GaAs Substrate 12 n-type GaAs Buffer Layer 13 InAs Layer 14 i-type GaAs Spacer Layer 15 InAs Layer 16 n-type GaAs barrier layer 17 quantum dot 18 electrode 19 electrode 20 power supply 21 ground level 22 electron 23 semi-insulating GaAs substrate 24 ammeter 41 semi-insulating GaAs substrate 42 n-type GaAs buffer layer 43 InAs layer 44 i-type GaAs Collector barrier layer 45 InAs layer 46 GaAs spacer layer 47 i-type GaAs emitter barrier layer 48 InAs layer 49 n-type GaAs layer 50 n-type GaAs spacer layer 51 quantum dots 52 quantum dots 53 continuous quantum dot row 54 emitter electrode 55 base Electrode 56 collector electrode 61 GaAs buffer layer 62 InAs layer 63 GaAs spacer layer 64 GaAs barrier layer 65 quantum dots 66 wetting layer

Claims (7)

[Claims] 1. A semiconductor quantum dot device characterized in that movement of carriers between quantum dots constituting a vertically stacked quantum dot array is controlled by a magnetic field. 2. The semiconductor quantum dot device according to claim 1, wherein the movement of the carriers is due to a tunnel phenomenon. 3. A semiconductor quantum dot device, wherein a quantum dot array is provided between two independent quantum dots that face each other in the vertical direction. 4. The semiconductor quantum dot device according to claim 3, wherein the two independent quantum dots serve as an emitter region and a collector region, respectively, and the quantum dot array serves as a base region. 5. The semiconductor quantum dot device according to claim 3, wherein movement of carriers between the two independent quantum dots is controlled by a magnetic field. 6. The method for using the semiconductor quantum dot device according to claim 1, wherein a change in carrier transport efficiency due to a magnetic field is a change in current. How to use. 7. The method of using the semiconductor quantum dot device according to claim 1, wherein the intensity of the magnetic field is measured based on a change in the current due to the magnetic field. How to use.