JPH09102996A - Speaker drive - Google Patents

Abstract

(57) [Abstract] [Problem] To reduce the number of signal lines. SOLUTION: By the shaping shift means and the distribution means,
The pulse width of the 1-bit digital signal for each speaker is set to 1/9 of the sampling clock, and the position of the pulse on the time axis is shifted so that the sampling cycle does not change and the positions are not the same within one sampling clock. The row and column selection lines C ₁₁ to which each digital signal is related.
It is distributed to C ₁₃ , C _{21 to} C ₂₃ . Then, for example, one digital signal is generated by the AND gate G ₁₁ from the two digital signals that have reached simultaneously via the row selection line C ₁₁ and the column selection line C ₂₁ , and the generated digital signal is D / A converter. D ₁₁
The 1-bit D / A conversion, and supplies the resultant analog signal to the speaker S ₁₁ and amplified by an amplifier A _11.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a speaker driving device for driving speakers arranged on a matrix.

[0002]

2. Description of the Related Art SSAV (super s
urround audio visual) has been studied, and this audio system for SSAV uses a large speaker array,
The perspective control of the sound image and the active control of the sound field are performed according to the stereoscopic image with high perspective.

[0003]

In such an audio system, a speaker and a signal source are connected by a pair of signal lines, respectively. For example, a two-dimensional 10 × 10 speaker array has 200 signal lines. It was necessary, and there was a limit to reducing the number of signal lines.

An object of the present invention is to solve the above problems and to provide a speaker driving device capable of reducing the number of signal lines.

[0005]

Means for Solving the Problems 1) According to the present invention, m × n loudspeakers S ₁₁ , S ₁₂ , arranged in a matrix of m × n (m, an integer of n ≧ 2).
, S _mn in the speaker driving device, each digital signal E which is a 1-bit analog-digital conversion of the analog signals O ₁₁ , O ₁₂ , ..., O _mn for driving each speaker.
The pulse widths of ₁₁ , E ₁₂ , ..., E _mn are set to m × n / 1 / n of the sampling clock, and the positions on the time axis do not change the sampling cycle, and at the same position within one sampling clock. Shaping shift means for shifting so as not to become and m row selection lines C ₂₁ , C ₂₂ , ...,
C _2m , n column selection lines C ₁₁ , C ₁₂ , ..., C _1n, and a digital signal F ₁₁ obtained by the shaping shift means.
Inputting F ₁₂ , ..., F _mn , sum signal P _2p = F _p1 + F _p2 +
_{... + F pn (p = 1,2} , ..., m) and the distribution to the row select line C _2p, the sum signal _{P 1q = F 1q + F 2q} + ... + F mq (q = 1,2,
..., and distribution means for distributing the n) to the column selection line C _1q, each two digital signals P _2p having reached simultaneously through the said row select line C _2p each column select line C _1q, the AND operation of the P _1q AND gate means G _pq , and each of the speakers S amplified by amplifying each digital signal generated by the AND gate means G _pq.
Amplifying means A _pq for supplying to _pq is provided.

2) According to the present invention, in the speaker driving device described in the above 1), AND gate means G _pq and amplifying means A are provided.
It is characterized in that the D / A conversion means D _pq is interpolated between _pq and _pq .

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Prior to the description of embodiments, 1-bit analog-digital conversion and digital-analog conversion used in the present invention will be described.

For analog-digital / digital-analog conversion of a voice signal, a method of obtaining an accuracy of 16 bits or more by using an AD converter having a 1-bit accuracy has been developed. This method is a method of creating an analog waveform by a compression wave of 1-bit data by increasing the sampling frequency sufficiently and increasing the number of data (for details, see “Digital in the multimedia age” edited by NHK Broadcasting Technology Laboratories). Broadcasting Technology Dictionary "p.212-213,
288-289) (Maruzen, issued June 1994).

In the following description, the digital signal obtained by the above method will be referred to as a 1-bit digital signal.

Embodiments of the present invention will be described below in detail with reference to the drawings.

<First Embodiment> FIG. 1 shows a first embodiment of the present invention.
An embodiment will be described. Referring to FIG. Speaker S ₁₁ ~
The column selection signal lines (hereinafter, referred to as column selection lines) C _{11 to} C _1n and the row selection signal lines (hereinafter, referred to as row selection lines) are arranged so that S _mn are arranged in a matrix and also intersect in a matrix. C ₂₁ -C _2m are are wired. AND gate G ₁₁ ~
G _mn is the column selection lines C _{11 to} C _1n and the row selection line C _{21 respectively.}
The pulse signal on the intersection with ~ C _2m is ANDed. The D / A converters D _{11 to} D _mn convert the digital signals from the AND gates G _{11 to} G _mn into analog signals, respectively. The amplifiers A _{11 to} A _mn amplify the analog signals from the D / A converters D _{11 to} D _mn , respectively.

The shaping shift means 4 transforms the m × n 1-bit digital signals E _{11 to} E _{mn so} that the width of one pulse becomes 1 / (m × n) without changing the sampling cycle, and the two are mutually converted. At the same time, signals F _{11 to} F _mn are generated by shifting by 1 / (m × n) clocks on the time axis so as not to have outputs. The distribution means 5 uses the signals F _{11 to} F _mn to generate m + n signals P ₁₁ to corresponding to the column selection lines C _{11 to} C _1n and the row selection lines C _{21 to} C _2m.
P _1n and P _{21 to} P _2m are generated, and predetermined column selection lines C _{11 to} C _1n are generated.
And the row selection lines C _{21 to} C _2m . here,
Since the signals F _{11 to} F _mn are equivalent to the signals E _{11 to} E _mn that are over-sampled, the analog signals of the signals E _{11 to} E _mn can be obtained by passing an appropriate filter during digital-analog conversion. (For example, see Kenichi Kido, Digital Signal Processing (Maruzen, published in July 1985), p.39-43).

Next, a device for driving speakers arranged in a 3 × 3 matrix as shown in FIG. 2 will be described. In shaping shifting means 4, nine analog signals O ₁₁ ~
Nine signals E _{11 to} E _{33, which} are 1-bit analog-digital conversions of O ₃₃ (see FIG. 3), are input (the clock signal of the sampling pulse is Ec). An example of the signals E _{11 to} E ₃₃ is shown in FIG. 4, and the time axis is enlarged and shown in FIG. Then, the signal E ₁₂ is shifted by 1/9 clocks on the time axis so that the width of one pulse is converted to 1/9 without changing the sampling period and outputs do not occur simultaneously. The signal E ₁₃ is 2/9 clocks, and the signal E ₂₁
Is shifted by 3/9 clocks, and the signal E ₃₃ is shifted by 8/9 clocks. With a 1-bit digital signal, the sampling frequency is set to an extremely high value such as 64 times, so such a shift on the time axis of 1 clock or less is
The difference on the acoustic signal after analog conversion can be ignored. FIG. 6 shows the nine obtained signals as F _{11 to} F ₃₃ in association with the clock signal Ec. Then, of these signals F _{11 to} F ₃₃ , the signals F ₁₁ , F ₁₂ ,
The sum of F ₁₃ is the signal P ₂₁ , the sum of the signals F ₂₁ , F ₂₂ , and F ₂₃ is the signal P ₂₂ , and the sum of the signals F ₃₁ , F ₃₂ , and F ₃₃ is the signal P _23.
Is supplied to the row selection lines C _{21 to} C ₂₃ . Further, the signals F ₁₁ , F ₂₁ , F ₃₁ are used as the signal P ₁₁ , and the signals F ₁₂ , F ₂₂ ,
The sum of F ₃₂ is supplied as a signal P ₁₂ , and the sum of signals F ₁₃ , F ₂₃ , F ₃₃ is supplied as a signal P ₁₃ to the column selection lines C _{11 to} C ₁₃ . Examples of signal _{P 11 ~P 13, P 21 ~P} 23 shown in FIG. Table 1 summarizes the relationship between the signals P _ij and the signals F _ij .

[0014]

[Table 1]

Then, the signals P _{11 to} P ₁₃ and the signals P ₂₁ to
P ₂₃ is an AND operation on each AND gate G ₁₁ ~G _33. As can be seen from Table 1, for example, the signal P ₁₁ on the column selection line C ₁₁ and the signal P ₂₁ on the row selection line C ₂₁ are AND gate G ₁₁
Is ANDed and the signal F ₁₁ is output.
For example, the signal P ₁₂ on the column selection line C _12, the signal P ₂₂ on the row select line C ₂₂ is an AND gate G ₂₂ is the AND operation, and outputs a signal F _22. Then, the signals F _{11 to} F ₃₃
Is converted into an analog signal by a D / A converter D ₁₁ to D _33, the analog signal is amplified by the amplifier A ₁₁ to A _33, the speaker S ₁₁ according to the output of the amplifier A ₁₁ to A ₃₃ ~
_S33 is driven.

With this configuration, it is possible to drive with the number of signal lines that is approximately twice the square root of the number of speakers arranged in a matrix.

<Second Embodiment> FIG. 8 shows a second embodiment of the present invention.
An embodiment will be described. In the first embodiment, column select lines C ₁₁ ~
The C _1n and the pulse signals on the row selection lines C _{21 to} C _2m are ANDed by the AND gates G _{11 to} G _mn , and the output signal is converted into an analog signal by the D / A converters D _{11 to} D _mn. The analog signal is amplified by the amplifiers A _{11 to} A _mn , and each speaker S
_{11 to} S _mn are driven. In contrast, in this embodiment, an AND gate G ₁₁ ~G _mn, D / A converter D ₁₁ to D
_mn and amplifiers A _{11 to} A _mn instead of AND gate amplifier G
A _{11 to} GA _mn were used. AND gate amplifier GA _{11 to} GA
The configuration of _mn is as shown in FIG. 9, and includes diodes 501 and 502, resistors 503, 504 and 505, and a transistor 506. The AND gate amplifiers GA _{11 to} GA _mn perform AND operation of the pulse signals on the column selection lines C _{11 to} C _1n and the row selection lines C _{21 to} C _{2m and} amplify them to drive the speakers S _{11 to} S _mn . I did it. In each of the speakers S _{11 to} S _mn , the digital-analog conversion is equivalently performed by the low-pass filter characteristic of the speaker, so that the desired output is reproduced.

[0018]

As described above, according to the present invention,
With the above configuration, the number of signal lines can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a block diagram for explaining the first embodiment of the present invention.

FIG. 3 is a diagram showing an example of an analog signal for driving a speaker.

FIG. 4 is a diagram showing an example of signals E _{11 to} E ₃₃ .

5 is an enlarged view of the signal shown in FIG. 4. FIG.

FIG. 6 is a diagram showing an example of signals F _{11 to} F ₃₃ .

FIG. 7 is a diagram showing an example of signals P _{11 to} P ₂₃ .

FIG. 8 is a block diagram showing a second embodiment of the present invention.

9 is a circuit diagram showing a configuration of AND gate amplifiers GA _{11 to} GA _mn shown in FIG.

[Explanation of symbols]

4 shaping shift means 5 distributing means A _{11 to} A _mn amplifier C _{11 to} C _1n column selection signal line C _{21 to} C _2m row selection signal line D _{11 to} D _mn D / A converter G _{11 to} G _mn AND gate S ₁₁ ~ S _mn speaker GA ₁₁ ~ GA _mn AND gate amplifier

Claims (2)

[Claims] 1. The m × n loudspeakers S ₁₁ , S ₁₂ , ..., Which are arranged in a matrix of m × n (m, n ≧ 2).
In the speaker driving device for driving S _mn , analog signals O ₁₁ , O ₁₂ , ...
The pulse width of each digital signal E ₁₁ , E ₁₂ , ..., E _mn , which is 1-bit analog-to-digital conversion of O _mn , is set to 1 × m × n of the sampling clock, and the position on the time axis is changed in the sampling cycle. Shaping shift means for shifting so as not to be in the same position within one sampling clock, m row selection lines C ₂₁ , C ₂₂ , ..., C _2m , and n column selection lines C ₁₁ , C ₁₂ , ..., C _1n and the digital signal F ₁₁ , obtained by the shaping shift means,
Inputting F ₁₂ , ..., F _mn , sum signal P _2p = F _p1 + F _p2 +
_{... + F pn (p = 1,2} , ..., m) and the distribution to the row select line C _2p, the sum signal _{P 1q = F 1q + F 2q} + ... + F mq (q = 1,2,
..., and distribution means for distributing the n) to the column selection line C _1q, each two digital signals P _2p having reached simultaneously through the said row select line C _2p each column select line C _1q, the AND operation of the P _1q an aND gate means G _pq for, the aND gate means G _pq amplifying means for supplying the amplifying each digital signal generated to the speaker S _pq by a _pq
A speaker driving device comprising: 2. The speaker driving device according to claim 1, wherein D / is provided between the AND gate means G _pq and the amplifying means A _pq.
A loudspeaker drive device having A conversion means D _pq interpolated therein.