JPH09101644A - Color image forming device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate the need for taking a long time in varying the phase of a rotary polygon mirror. SOLUTION: As for the color image forming device provided with a mark detecting means for detecting a mark on an intermediate transfer body, and a closed loop control means 71 for controlling the rotation of the rotary polygon mirror based on a clock signal, and prepared for starting to form an electrostatic latent image at the mark detecting timing by the mark detecting means, and for varying the phase of the clock signal in accordance with the mark detecting timing by the mark detecting means, the device is provided with a 1st means 70 for reducing the loop gain of the closed loop control means 71 at varying the phase of the clock signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color image forming apparatus such as a color copying machine, a color printer or a color facsimile.

[0002]

2. Description of the Related Art Color image forming apparatuses include color copying machines, color printers, color facsimiles and the like, and FIG. 27 shows an example of a color printer. In FIG. 27, reference numeral 1 denotes a belt-shaped image bearing member made of a flexible belt-shaped photosensitive member. The belt-shaped photosensitive member 1 is installed between rotating rollers 2 and 3 and driven by the rotating roller 2. Then, it rotates in the sub-scanning direction (clockwise).

Reference numeral 4 is a charging member composed of a charging roller as a charging means, 5 is a laser writing system unit as an image exposing means, and 6 to 9 are a plurality of developers each containing a developer of a specific color different from each other in a rotary developing unit. This is a developing unit as a developing means. The laser writing system unit 5 is incorporated in the main body of the apparatus by being housed in a holding housing having a slit-shaped exposure opening on the upper surface. The charging member 4 as a charging unit and the laser writing system unit 5 as an image exposing unit constitute a latent image forming unit that sequentially forms an electrostatic latent image corresponding to an image forming signal on the photoconductor 1.

In addition to the optical system shown in the figure, the laser writing system unit 5 also uses an optical system in which a light emitting portion and a converging optical transmission body are integrated. The charging member 4, a portion of the laser writing system unit 5 that irradiates the belt-shaped photoconductor 1 with the laser writing light 5D, and the photoconductor cleaning device 15 includes a plurality of rollers 2 and 3 that bridge the belt-shaped photoconductor 1. It is provided near one of the rollers 2.

Each of the developing units 6, 7, 8, and 9 contains a developer containing, for example, yellow, magenta, cyan, and black toners, and is close to the belt-shaped photosensitive member 1 at a predetermined position. Alternatively, it is provided with a developer carrying member which is in contact with a developing sleeve and has a function of visualizing an electrostatic latent image on the photosensitive belt 1 by a non-contact developing method or a contact developing method. Reference numeral 10 is an intermediate transfer member as a transfer image carrier, and the intermediate transfer member 10 is a rotating roller 1.
The intermediate transfer belt is installed between 1 and 12 and is driven by one of the rotating rollers to rotate counterclockwise.

The belt-shaped photoreceptor 1 and the intermediate transfer belt 10 are in contact with each other at the rotating roller 3, and the intermediate transfer belt 10
A transfer bias is applied from a high-voltage power source to the bias roller 13 that is in contact with the inside of the sheet, and a single color image of one color plate formed on the belt-shaped photoreceptor 1 for the first time is transferred onto the intermediate transfer belt 10. It Similarly, the monochromatic images of the other color plates formed on the belt-shaped photoconductor 1 in the second to fourth times are superimposed on the monochromatic image of the one color plate formed in the first time on the intermediate transfer belt 10. It is transferred so as not to be displaced.

The transfer roller 14 constituting the transfer means is provided so as to contact and separate from the intermediate transfer belt 10 by a contact and separation mechanism. Reference numeral 15 is a photoconductor cleaning device that cleans the belt-shaped photoconductor 1, and 16 is an intermediate transfer belt cleaning device that cleans the intermediary transfer belt 10.
6A is an intermediate transfer belt 1 during image formation by a contact / separation mechanism.
The surface of the intermediate transfer belt 10 is kept apart from the surface of No. 0 and is pressed against the surface of the intermediate transfer belt 10 as shown in the figure only during cleaning after image transfer.

The process of forming a color image by this color printer is performed as follows. First, formation of a multicolor image by the present color printer is performed as follows. That is, the image reading device separate from the color printer is
The original image is scanned and read by the image sensor, the read color image data is arithmetically processed by the image data processing unit, and image data of each color, that is, yellow, magenta,
Cyan and black image data are created and are temporarily stored in the image memory.

Next, the image data of each color is taken out from the image memory at the time of recording and input to the laser writing system unit 5 of the color printer as an image forming signal of each color. That is, the image data of each color output from an image reading apparatus separate from the color printer is sequentially input to the laser writing system unit 5 via the image data processing unit.

In the laser writing system unit 5,
The rotary polygon mirror driving device 5A composed of a polygon motor rotationally drives the rotary polygon mirror 5B, and the semiconductor laser is modulated by the semiconductor laser driving circuit by image data of each color sequentially input from the image reading device through the image data processing unit. It is driven to generate a laser beam whose intensity changes according to the image data of each color. This laser beam is deflected and scanned by the rotary polygon mirror 5B, passes through the fθ lens 5C, the optical path is bent by the mirror 5G, and is irradiated onto the peripheral surface of the belt-shaped photoreceptor 1.

The belt-shaped photosensitive member 1 is discharged by the discharging lamp 21 and uniformly charged by the charging roller 4, and then exposed by the laser beam 5D from the mirror 5G to form an electrostatic latent image corresponding to the image signal of each color. Are sequentially formed. Here, a bias is applied to the charging roller 4 from a high-voltage power source to uniformly charge the belt-shaped photoreceptor 1, and the laser writing system unit 5 exposes the belt-shaped photoreceptor 1 with an image pattern of a desired full-color image of yellow. , A monochrome image pattern when color separation is made into magenta, cyan, and black.

The electrostatic latent images corresponding to the image signals of the respective colors sequentially formed on the belt-shaped photosensitive member 1 are revealed by the development units 6 to 9 for yellow, magenta, cyan and black in the rotary developing unit, respectively. The color is converted into a monochromatic image of each color. The developing unit 6 rotates to move to a developing position when an electrostatic latent image corresponding to a yellow image signal is formed on the belt-shaped photoconductor 1 to develop the electrostatic latent image into a yellow monochromatic image. Similarly, when the electrostatic latent images corresponding to the magenta, cyan, and black image signals are formed on the belt-shaped photosensitive member 1, the other developing units 7 to 9 are rotated to move to the developing position and the magenta, The cyan and black electrostatic latent images are developed to form magenta, cyan, and black single-color images, respectively.

A transfer bias is applied to the intermediate transfer belt 10 from a high-voltage power source through a bias roller 13, and yellow, magenta, and
The cyan and black monochromatic images are transferred one after another onto the intermediate transfer belt 10 rotating counterclockwise while contacting the belt-shaped photoreceptor 1. A yellow, magenta, cyan, and black single-color image is superimposed and transferred onto the intermediate transfer belt 10 to form a full-color image, which is fed from the paper feed table 17 by the paper feed roller 18 and registered by the registration roller 19. A full-color image formed on the intermediate transfer belt 10 is transferred by the transfer roller 14 to the transfer sheet that has been conveyed to the transfer section.

The image of the transfer paper is fixed by the fixing device 20 to complete a full-color image, and the transfer paper is discharged to the tray 23. The intermediate transfer belt 10 and the belt-shaped photoreceptor 1 are seamless. The belt-shaped photoconductor 1 is cleaned by the photoconductor cleaning device 15 after the monochromatic images of yellow, magenta, cyan, and black are transferred to the intermediate transfer belt 10, and the intermediate transfer belt 10 is transferred after the image is transferred to the transfer paper. It is cleaned by the intermediate transfer belt cleaning device 16.

FIG. 28 is an enlarged view showing a part of the color printer. Six marks 41A to 41F are provided on the end of the intermediate transfer belt 10 at predetermined intervals,
The mark detecting means 40 including a mark detecting sensor detects the marks 41A to 41F on the intermediate transfer belt 10 from the rotating roller 1.
Detection is made on the downstream side of the rotation direction of the intermediate transfer belt 10 from 2.
The mark detection sensor 40 is composed of a reflective photo sensor composed of a reflective photo interrupt.

The mark detection sensor 40 has six marks 41.
Any mark of A to 41F, for example mark 41A
The laser writing system unit 5 starts writing the image of the first color on the belt-shaped photosensitive member 1 (exposure by the laser beam corresponding to the yellow image signal) by detecting the mark, and the mark 41A makes one round and the mark detection sensor is detected again. When 40 detects the mark 41A, writing of the image of the second color (exposure by the laser beam corresponding to the magenta image signal) is started.

At this time, the mark 4 of the mark detection sensor 40
The detection signals for 1B to 41F are the mark detection sensor 40.
By the management of the number of marks detected in step 3, a mask is applied so that the marks cannot be used as image writing timing. The density detecting means 22 composed of a P sensor is installed so as to face a position upstream of the photosensitive belt 1 in the rotation direction of the photosensitive belt 1 with respect to a portion of the photosensitive belt 1 which is in contact with the intermediate transfer belt 10. To detect.

FIG. 29 shows a schematic structure from the laser writing system unit 5 to the mark detection sensor 40. When a color signal output from an image reading apparatus separate from the color printer is input to the laser writing system unit 5 via the image data processing unit, the semiconductor laser 5E in the laser writing system unit 5 outputs the color signal. Is modulated and driven by the semiconductor laser driving circuit to generate a laser beam having an intensity corresponding to the color signal. This laser beam is rotationally scanned in the main scanning direction by a rotary polygon mirror (hereinafter referred to as a polygon mirror) 5B rotated by a rotary polygon mirror driving device including a polygon motor 5A, and an optical path is bent by a mirror 5G via an fθ lens 5C. The belt-shaped photoconductor 1 is irradiated with the light.

At this time, the laser beam scanned in the main scanning direction by the polygon mirror 5B is detected by the synchronization detection sensor 5F outside the image writing area before being irradiated on the photosensitive member 1 in one main scanning. The output signal of the synchronization detection sensor 5F is used as a synchronization signal in the main scanning direction for image writing. The polygon motor 5A rotates in synchronization with the motor synchronization signal, and the phase of this motor synchronization signal and the rotation phase of the polygon motor 5A are synchronized. The polygon mirror 5B has eight mirror surfaces, and the motor synchronization signal is two pulses per one rotation of the polygon mirror 5B.

FIG. 30 shows a part of this color printer.
The phase matching circuit 50 receives the mark detection signal from the mark detection sensor 40 and the clock from the oscillator 51,
The clock from the oscillator 51 is used as a source signal and the frequency is divided and output as a motor synchronization signal. Polygon motor 5A
In the motor control circuit, the rotation speed and the rotation phase are synchronously controlled by the motor synchronization signal from the phase matching circuit 50.

In this color printer, the signal obtained by dividing the clock from the oscillator 51 by 64 is the motor synchronizing signal. That is, assuming that the clock cycle of the oscillator 51 is tc, the cycle tp of the motor synchronization signal is tp = 64 * tc.
It is. The phase matching circuit 50 uses the rising edge of the mark detection signal from the mark detection sensor 40 as a rotation synchronization trigger, and changes the phase of the motor synchronization signal to reset the rotation phase of the polygon motor 5A.

FIG. 31 shows a timing chart of this color printer. In FIG. 31, the stationary period is a period during which normal image exposure is performed, and the counting period is a phase (rotational phase of the polygon motor 5A) of the previous plate motor synchronization signal used for image formation of the previous color plate and a mark. Detection sensor 40
The phase matching period is a period in which the phase of the motor synchronization signal is shifted to the stationary period by the count value of the counting period.

The counting period is from the rising edge a of the mark detection signal to the first rising edge b of the previous version motor synchronizing signal, and the counter counts the clock from the oscillator 51 during the counting period. The last count value CNT in the count period of the counter is CNT = t / tc when the count period is time t. The motor synchronization signal switches to a phase synchronization pulse signal that starts oscillation at timing b during the phase matching period. The period td of this phase-locked pulse signal is td = tp-t
There is a relationship of c.

The phase matching period is up to the timing c when the motor synchronizing signal is output by the count value CNT of the counting period, and after the lapse of the phase matching period, the phase of the phase synchronizing pulse signal is used for the image formation of the next color plate. It synchronizes with the phase of the next version motor synchronization signal. Period t of the phase-locked pulse signal
d has a relationship of td <tp, and the motor synchronization signal is controlled in the direction in which the phase follows the target phase (a constant phase state of the motor synchronization signal synchronized with the mark 41A detection timing of the mark detection sensor 40) during the phase matching period. Will be done. At timing c, the motor synchronization signal switches to the next-version motor synchronization signal, and enters the steady period.

The switching of the motor synchronizing signal is performed as described above, and the polygon motor 5A is drive-controlled by the polygon motor control circuit according to the motor synchronizing signal. The number of marks detected by the mark detection sensor 40 is counted from the rising edge a of the mark detection signal, and when the count value reaches the set value n, the write start signal is raised, and in synchronization with the rise of this write start signal. Then, the laser writing system unit 5 starts image exposure with the image data of the next color plate. It goes without saying that the phase matching period ends within the period in which the number of marks detected by the mark detection sensor 40 is counted up to the set value n.

FIG. 25 shows a part of this color printer.
The phase matching circuit 50 is a digital synchronizing circuit which operates in synchronization with the clock signal output from the oscillator 51, and as described above, the mark detection timing of the mark detection sensor 40 is determined by the mark detection signal from the mark detection sensor 40. Motor synchronization signal P to the motor control circuit 52 according to
The phase of LS is changed. At this time, the phase matching circuit 50
When the phase of the motor synchronization signal PLS is changed at once, the phase synchronization of the motor control circuit 52 is lost. Therefore, the phase of the motor synchronization signal PLS is changed by gradually delaying or advancing the phase of the motor synchronization signal PLS. . The motor control circuit 52 follows the polygon motor 5 so as to follow the motor synchronization signal PLS from the phase matching circuit 50.
Control A.

In the motor control circuit 52, the phase of the motor synchronizing signal PLS from the phase matching circuit 50 is compared with the phase of the output signal of the sensor 5H, and the phase of controlling the polygon motor 5A is controlled so that the phase difference becomes a desired value. It is a lock loop (PLL) circuit. The sensor 5H is a detection unit that is arranged around the polygon motor 5A and that includes an encoder that detects the rotation phase of the polygon motor 5A and outputs an output signal indicating the rotation phase of the polygon motor 5A. The amplifier / waveform shaper 63 amplifies the output signal of the sensor 5H and shapes the waveform into a binary value into a pulsed signal, and outputs this signal to the phase comparator 60 as an encoder signal ENC indicating the rotation phase of the polygon motor 5A. Output.

The phase comparator 60 compares the motor synchronizing signal PLS from the phase matching circuit 50 with the phase of the output signal of the amplifier / waveform shaper 63, and the result of the phase comparison is smoothed by a low pass filter (LPF) 61. Is input to the amplifier 62. The amplifier 62 applies a current to the polygon motor 5A according to the output signal of the LPF 61 to drive the rotation of the polygon motor 5A.

As described above, the motor control circuit 52 is a PLL circuit constituted by a closed loop, and the phase matching circuit 50
The polygon motor 5 for the motor synchronization signal PLS from
The polygon motor 5A is controlled so as to follow the rotation phase of A. The polygon motor 5A has a polygon mirror 5B.
Is attached, controlling the rotational phase of the polygon motor 5A means controlling the rotational phase of the polygon mirror 5B.

FIG. 26 is a timing chart showing how signal processing is performed in the phase matching circuit 50. The phase matching circuit 50 first outputs the motor synchronization signal (of the previous color plate) PLS1. When the mark detection signal MARK is input from the mark detection sensor 40 at the timing a, the phase matching circuit 50 receives the mark detection signal MARK.
Motor synchronization signal (after color plate) PL at the start of
Generate S2. When the phase of the motor synchronization signal PLS is suddenly changed from the motor synchronization signal PLS1 of the previous color plate to the motor synchronization signal PLS2 of the subsequent color plate, the PLL circuit 52
Will be out of sync.

Therefore, the phase matching circuit 50 prevents the PLL circuit 52 from being out of synchronization by providing a phase matching period and gradually shifting the phase of the motor synchronizing signal PLS. In FIG. 26, the phase matching circuit 50 has a pulse signal (phase synchronization) shorter than the cycle of the normal motor synchronization signal according to the time t between the detection timing a of the mark detection signal MARK and the rising timing b of the motor synchronization signal PLS1. By outputting (pulse signal) PLS3 to the PLL circuit 52, phase matching of the motor synchronizing signal is performed.

The PLL circuit 52 operates so as to follow the motor synchronization signal PLS2 after the timing c when the phase matching period ends. Finally the phase matching circuit 5
The signal output from 0 to the PLL circuit 52 is the motor synchronizing signal PLS. Timing d is a timing at which the laser writing system unit 5 starts writing an image on the photoconductor 1, and the laser writing system unit 5 exposes the image after a specific time has elapsed since the mark detection signal MARK was detected by the phase matching circuit 50. Image writing to the body 1 is started.

By controlling the rotation phase of the polygon motor 5A in this manner, the rotation phases of the polygon motor 5A and the polygon mirror 5B with respect to the mark detection by the mark detection sensor 40 can always be kept constant. Since this is performed for writing the images of the respective colors, it is possible to superimpose the images of the respective colors with high accuracy without exposure position deviation in the sub-scanning direction, and a color image without color deviation can be obtained.

[0034]

In the above color printer, the phase of the motor synchronization signal PLS changes from the motor synchronization signal PLS1 of the previous color plate to the motor synchronization signal PLS2 of the subsequent color plate at the rising edge of the mark detection signal MARK. If it is changed, the PLL circuit 52 will be out of synchronization. Therefore, the phase matching circuit 50 is provided with a phase matching period to gradually shift the phase of the motor synchronizing signal PLS, so that the phase of the rotary polygon mirror is changed. Takes a long time. The present invention can reduce the time required to change the phase of the rotary polygon mirror,
An object of the present invention is to provide a color image forming apparatus capable of smoothly changing the phase of a rotary polygon mirror.

[0035]

In order to achieve the above object, the invention according to claim 1 irradiates the photosensitive member and an exposure beam corresponding to an image forming signal with a rotating polygon mirror to irradiate the photosensitive member. A latent image forming unit that sequentially forms electrostatic latent images corresponding to a plurality of image forming signals on the photoconductor, a plurality of developing units that visualize the latent images on the photoconductor, and a plurality of developing units on the photoconductor. The intermediate transfer body to which the visible image is transferred, mark detection means for detecting a mark on the intermediate transfer body, and closed loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal are provided. The latent image forming means is caused to start forming an electrostatic latent image at the mark detection timing of the detecting means,
In a color image forming apparatus that varies the phase of the clock signal according to the mark detection timing of the mark detecting means, the color image forming apparatus includes first means for reducing the loop gain of the closed loop control means when varying the phase of the clock signal. Therefore, the closed loop control means is less likely to be out of phase synchronization, the phase of the clock signal can be rapidly changed, and the time required for changing the phase of the rotary polygon mirror can be shortened.

According to a second aspect of the present invention, a photosensitive member and an exposure beam corresponding to an image forming signal are deflected by a rotary polygon mirror to irradiate the photosensitive member to form electrostatic latent images corresponding to a plurality of image forming signals. A latent image forming unit that sequentially forms a latent image on the photoconductor, a plurality of developing units that visualize the latent image on the photoconductor, an intermediate transfer member to which the visual image on the photoconductor is transferred, and an intermediate unit between them. It has mark detection means for detecting a mark on the transfer body, and closed-loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal to detect out-of-synchronization. When the phase of the clock signal is changed in a color image forming apparatus that causes the latent image forming means to start forming an electrostatic latent image and changes the phase of the clock signal according to the mark detection timing of the mark detection means. The closed loop control means is provided with a second means that does not detect out-of-sync or weakens the ability to detect out-of-sync, and the phase of the closed-loop control means when the phase of the clock signal is suddenly changed. Does not detect loss of synchronization or weakens the ability to detect loss of synchronization, so there is no need to perform abnormal processing after loss of phase synchronization, there is no need to detect loss of phase synchronization, or strong detection of loss of synchronization is performed. There is no need, and the time required to change the phase of the rotary polygon mirror can be shortened.

According to a third aspect of the present invention, a photosensitive member and an exposure beam corresponding to an image forming signal are deflected by a rotary polygon mirror to irradiate the photosensitive member to form electrostatic latent images corresponding to a plurality of image forming signals. A latent image forming unit that sequentially forms a latent image on the photoconductor, a plurality of developing units that visualize the latent image on the photoconductor, an intermediate transfer member to which the visual image on the photoconductor is transferred, and an intermediate unit between them. The latent image forming means has mark detection means for detecting a mark on the transfer body and closed loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal. In a color image forming apparatus that starts the formation of an electrostatic latent image and changes the phase of the clock signal according to the mark detection timing of the mark detecting means, the closed loop control is performed when the phase of the clock signal is changed. A third means for temporarily opening the loop of the means is provided, and the loop of the closed-loop control means is once opened and the rotary polygon mirror is rotated by the inertial force until then to rotate the rotary polygon mirror. The phase can be shifted to a desired rotation phase, and when changing the phase of the clock signal, it is not necessary to forcibly adjust the rotation phase of the rotary polygon mirror to the phase of the clock signal, and smooth phase change is possible.

According to a fourth aspect of the present invention, in the color image forming apparatus according to the third aspect, the third means sets the time for opening the loop of the closed loop control means to the mark detection timing of the mark detection means. When the rotational phase of the rotary polygon mirror deviates to an appropriate rotation phase, the loop of the closed loop control means can be closed and the rotation control of the rotary polygon mirror can be restarted. It is possible to change the phase.

According to a fifth aspect of the invention, in the color image forming apparatus according to the third aspect, there is provided detection means for detecting the rotation of the rotary polygon mirror, and the third means indicates the rotational phase of the rotary polygon mirror. When the output signal of the detection means shown is to close the loop of the closed loop control means again when the output signal has a predetermined phase, when the output signal of the detection means has the same phase as the clock signal after the phase change. The loop of the closed loop control means can be put in the closed state, and smooth phase change of the rotary polygon mirror becomes possible.

According to a sixth aspect of the present invention, a photosensitive member and an exposure beam corresponding to an image forming signal are deflected by a rotary polygon mirror to irradiate the photosensitive member to form electrostatic latent images corresponding to a plurality of image forming signals. A latent image forming unit that sequentially forms a latent image on the photoconductor, a plurality of developing units that visualize the latent image on the photoconductor, an intermediate transfer member to which the visual image on the photoconductor is transferred, and an intermediate unit between them. The latent image forming means has mark detection means for detecting a mark on the transfer body and closed loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal. In a color image forming apparatus that starts the formation of an electrostatic latent image and changes the phase of the clock signal according to the mark detection timing of the mark detecting means, the closed loop control is performed when the phase of the clock signal is changed. A fourth means for applying a predetermined signal to the means is provided, and when the phase of the clock signal is rapidly changed, the rotation of the rotary polygon mirror can be positively controlled to shift the rotation phase. Thus, the rotation phase of the rotary polygon mirror can be changed in a short time.

According to a seventh aspect of the present invention, in the color image forming apparatus according to the sixth aspect, the fourth means makes the predetermined signal a pulse-like signal, and the pulse width and / or the pulse peak value of the signal. Is determined according to the mark detection timing of the mark detecting means, and the rotation control of the rotary polygon mirror by the closed loop control means can be appropriately performed when the phase of the clock signal is rapidly changed.

According to an eighth aspect of the present invention, in the color image forming apparatus according to the sixth aspect, there is provided rotation detecting means for detecting the rotation of the rotary polygon mirror, and the fourth means is the rotation phase of the rotary polygon mirror. The application of the predetermined signal to the closed-loop control means is stopped when the output signal of the rotation detecting means indicating the phase becomes a predetermined phase, and the rotation phase of the rotary polygon mirror can be smoothly changed. .

[0043]

FIG. 1 shows a part of a first embodiment of the present invention. The first embodiment is an embodiment of the invention according to claim 1, and the phase variable circuit 70 and the motor control circuit 71 shown in FIG. 1 are used in the color image forming apparatus including the color printer described above. It is the one. In FIG. 1, the same parts as those in FIG. 25 are designated by the same reference numerals. The motor control circuit 71 configured in a closed loop uses an amplifier 72 capable of switching the amplification factor (gain) in place of the amplifier 62 in the motor control circuit 52 described above.

The first embodiment does not adopt the method of gradually shifting the rotational phase of the polygon motor 5A as in the color printer described above, but changes the rotational phase of the polygon motor 5A at once. At this time, the motor control circuit 71 may be out of phase synchronization. Therefore, the rotational phase of the polygon motor 5A is changed so that the out-of-phase synchronization does not occur by actively taking measures against the motor control circuit 71. To do.

FIG. 2 is a timing chart showing the operation timing of the first embodiment. The phase variable circuit 70 receives the mark detection signal MARK from the mark detection sensor 40 and the clock signal from the oscillator 51, and receives the signal from the oscillator 51.
The clock signal from is used as a source signal and the frequency is divided and output as a motor synchronization signal. The phase variable circuit 70 first outputs a motor synchronization signal (of the previous color plate) PLS1.

When the mark detection signal MARK is input from the mark detection sensor 40 at the timing a, the phase variable circuit 70 generates a motor synchronization signal (for the later color plate) PLS2 at the rising of this mark detection signal MARK. , Mark detection signal MARK without providing a phase adjustment period
The motor synchronizing signal PLS will be switched immediately at the rising edge of. Therefore, as shown in FIG.
The motor synchronization signal PLS output from the signal becomes a signal that causes a sudden phase change.

Further, the phase variable circuit 70 outputs a switching signal GA for switching the gain to the amplifier 72. The switching signal GA is a signal output so as to reduce the gain of the amplifier 72 for a predetermined period (the period from the timing a to the timing e) T, and the amplifier 72 receives the gain by the switching signal GA from the phase variable circuit 70. Can be lowered. Here, the predetermined period T in which the gain of the amplifier 72 is lowered (the switching signal GA becomes low level) is experimentally and empirically determined in advance. Lowering the gain of the amplifier 72 means
The closed loop control gain of the motor control circuit (PLL circuit) 71 including the phase comparator 60, the LPF 61, the amplifier 72, the polygon motor 5A, the sensor 5B, and the amplifier / waveform shaper 63 is lowered. In the motor control circuit 71 whose closed-loop control gain has decreased, the ability to follow a sudden phase change of the motor synchronization signal PLS from the phase variable circuit 70 becomes slower, but out of phase synchronization is less likely to occur.

Here, once the motor control circuit 71 is out of phase synchronization, the rotation speed of the polygon motor 5A deviates, and it is necessary to perform synchronization pull-in or the like in order to perform PLL control again in the motor control circuit 71. It takes a considerable time to cause the motor control circuit 71 to follow the phase of the motor synchronizing signal PLS from the phase varying circuit 70 again and rotate the polygon motor 5A at a constant speed. In the present embodiment, the phase variable circuit 70 causes the motor synchronization signal PLS.
Even if the phase is suddenly changed, the closed loop control gain of the motor control circuit 71 is lowered so that the phase synchronization loss does not occur. Therefore, the phase variable circuit 70 can smoothly change the phase of the motor synchronization signal PLS. Becomes
Further, there is an effect that the phase of the motor synchronization signal PLS can be changed faster as compared with the method of gradually shifting the phase of the motor synchronization signal PLS as in the conventional technique.

FIG. 3A shows a concrete structure of the phase variable circuit 70. The phase variable circuit 70 includes a phase variable block 70A and a counter (or timer) 70B. The phase variable block 70A changes the phase of the motor synchronization signal PLS created by dividing the clock signal from the oscillator 51 as a source signal in accordance with the rising timing of the mark detection signal MARK from the mark detection sensor 40. The counter 70B is the mark detection sensor 4
A predetermined time T is measured from the rising timing of the mark detection signal MARK from 0, and the switching signal GA which becomes low level for the time T is output. FIG. 3B shows the operations of the phase variable block 70A and the counter 70B.

FIG. 4 shows a specific configuration of the gain-switchable amplifier 72 in the motor control circuit 71. Amplifier 7
2 is a gain A amplifier 72A and a gain B amplifier 7A
2B and a switch 72C, and the switch 72C is switched by a switching signal GA from the counter 70B. Input signals from the LPF 61 are amplifiers 72A and 72B.
When the switching signal GA from the counter 70B is at a high level, the switch 72C selects the output side of the amplifier 72B so that the gain of the amplifier 72 is A ×.
B. When the switching signal GA from the counter 70B is low level, the gain of the amplifier 72 becomes A by the switch 72C selecting the output side of the amplifier 72A.
Thus, the amplifier 72 switches the gain by the operation of the internal switch 72C.

FIG. 5 shows a part of the second embodiment of the present invention. The second embodiment is another embodiment of the invention according to claim 1, and uses a phase variable circuit 90 instead of the phase variable circuit 70 in the first embodiment.
In the first embodiment, the motor control circuit (PLL circuit) 7
While the time T for lowering the closed loop control gain of 1 was determined experimentally and empirically, in the second embodiment, the encoder signal ENC from the amplification and waveform shaper 63 is fed back to the motor synchronization signal PLS and the encoder signal. EN
When C matches, the motor control circuit (PLL circuit) 71
Restore the closed-loop control gain of.

FIG. 6A shows a concrete structure of the phase variable circuit 90. The phase variable circuit 90 includes a phase variable block 90A, a phase comparison circuit 90B, and a signal generation circuit 90.
It is composed of C and. The phase variable block 90A changes the phase of the motor synchronization signal PLS created by dividing the clock signal from the oscillator 51 as a source signal in accordance with the rising timing of the mark detection signal MARK from the mark detection sensor 40.

The phase comparison circuit 90B receives the motor synchronization signal PLS from the variable phase block 90A and the encoder signal ENC from the amplifier / waveform shaper 63, and when the phases of these two pulse signals match, they match each other. The signal EQ shown is output. The signal generation circuit 90C becomes low level at the rising timing of the mark detection signal MARK from the mark detection sensor 40, and the phase comparison circuit 90B.
Switching signal GA which becomes high level by the phase matching signal EQ from
Is output.

With this operation, the encoder signal E is changed from the rising timing of the mark detection signal MARK.
The closed loop control gain of the motor control circuit (PLL circuit) 71 is reduced until the phase of NC matches the phase of the motor synchronization signal PLS. FIG. 6B shows a phase variable block 90.
The operations of A, the phase comparison circuit 90B, and the signal generation circuit 90C are shown.

In the above embodiment, the phase of the motor synchronizing signal PLS is changed at once. However, in the method of gradually shifting the phase of the motor synchronizing signal PLS as in the prior art, the phase changing circuits 70 and 90 are used. Switching signal GA
The gain of the amplifier 72 is reduced by the
The closed loop control gain may be lowered. In this case, out-of-phase synchronization is less likely to occur in the motor control circuit 71, so that the phase of the motor synchronization signal PLS can be shifted much faster than in the conventional technique.

As described above, the first and second embodiments are embodiments of the invention according to claim 1, and the rotating polygonal mirror 5B provides the photosensitive member 1 and the exposure beam corresponding to the image forming signal. A charging member 4 and a laser writing system unit 5 as latent image forming means for deflecting and irradiating the photoconductor 1 to sequentially form electrostatic latent images corresponding to a plurality of image forming signals on the photoconductor 1, and the photoconductor 1. Developing units 6 to 9 as a plurality of developing means that visualize the latent image on the top, an intermediate transfer member 10 including an intermediate transfer belt to which the visible images on the photoconductor 1 are transferred, and on the intermediate transfer member 10. The mark detection sensor 40 as mark detection means for detecting the mark and the motor control circuit 71 as closed loop control means for controlling the rotation of the rotary polygon mirror 5B based on the clock signal.
In the color image forming apparatus, which causes the latent image forming means 4 and 5 to start forming an electrostatic latent image at the mark detection timing of 0, and changes the phase of the clock signal according to the mark detection timing of the mark detection means 40. The phase variable circuit 7 as the first means for reducing the loop gain of the closed loop control means 71 when changing the phase of the clock signal.
Since 0 and 90 are provided, the phase synchronism of the closed loop control means 71 is less likely to occur, the phase of the clock signal can be abruptly changed by the phase changing circuits 70 and 90, and the time required for changing the phase of the rotary polygon mirror can be reduced. It can be shortened.

FIG. 7 shows a part of the third embodiment of the present invention. The third embodiment is an embodiment of the invention according to claim 2, and in the color image forming apparatus including the color printer described above, the phase variable circuit 7 as shown in FIG.
3 and the motor control circuit 74 are used. In FIG. 7, the same parts as those in FIG. 25 are designated by the same reference numerals. The motor control circuit 74 uses a phase comparator 75 in place of the phase comparator 60 in the motor control circuit 52 described above.

The phase comparator 75 includes a phase variable circuit 73.
Motor synchronization signal PLS from Amplifier and waveform shaper 63
Of the output signals of the
Not only is it output to, but it is also detected that the comparison result is less than or equal to a predetermined value. That is, the phase comparator 75
Compares the phase of the motor synchronization signal PLS from the phase variable circuit 73 with the output signal of the amplifier / waveform shaper 63, and if the phase difference is equal to or more than a predetermined threshold value, the motor control circuit 74 performs phase synchronization. It has an abnormality detection function that regards the disconnection as occurring and detects it as an abnormality. When the out-of-phase synchronization of the motor control circuit 74 is detected as abnormal by this abnormality detection function, processing such as synchronization pull-in is performed.

The phase variable circuit 73 includes the mark detecting sensor 4
The mark detection signal MARK from 0 and the clock signal from the oscillator 51 are input, the clock signal from the oscillator 51 is used as a source signal, and the divided frequency is output as a motor synchronization signal. The phase variable circuit 73 first outputs the motor synchronization signal (of the previous color plate) PLS1. When the mark detection signal MARK is input from the mark detection sensor 40 at the timing a, the phase variable circuit 73 generates a motor synchronization signal (of the later color plate) PLS2 at the rising of this mark detection signal MARK, and adjusts the phase. Without providing a period, the motor synchronization signal PLS is switched immediately at the rising edge of the mark detection signal MARK.

Therefore, as shown in FIG.
The motor synchronization signal PLS output from 3 becomes a signal that causes a sudden phase change. The phase variable circuit 73 causes the motor synchronization signal P at the rising edge of the mark detection signal MARK.
When the phase of the LS is suddenly changed and the phase comparator 75 detects the out-of-phase of the motor control circuit 74 as an abnormality by the abnormality detection function, it takes time to perform the synchronization pull-in or the like.

Therefore, the phase variable circuit 73 outputs the switching signal PC for not allowing the phase comparator 75 to detect out-of-sync (or weakening the ability to detect out-of-sync). This switching signal PC has a predetermined period (timing a).
From the timing to the timing f) T, the signal is output so that the out-of-sync detection is not performed (or the out-of-sync detection capability is weakened) for the phase comparator 75. By the switching signal PC from the circuit 73, the out-of-sync detection is no longer performed (or the out-of-sync detection capability is weakened). The predetermined period T is experimentally and empirically determined in advance.

Further, if there is a problem that the phase comparator 75 does not detect the out-of-phase of the motor control circuit 74 due to the abnormality detection function, the phase variable circuit 7 will be present only during that period.
Motor synchronization signal PLS from 3 and amplification and waveform shaper 6
By setting the above-mentioned threshold value of the abnormality detection function for detecting that the phase difference from the output signal of No. 3 is larger than a predetermined threshold value, the out-of-sync detection capability is weakened.

As described above, when the phase of the motor synchronizing signal PLS is abruptly changed by the phase changing circuit 73, the abnormality detecting function of the phase comparator 75 does not detect the out of phase synchronization of the motor control circuit 74 or detects the abnormality. By setting the capability weakly, it is possible to eliminate unnecessary detection of the phase synchronization, and the phase variable circuit 73 causes the motor synchronization signal PL to be detected.
It is possible to smoothly change the phase of S.

FIG. 9 shows a specific structure of the phase variable circuit 73. The phase variable circuit 73 is a phase variable block 73.
A and a counter (or timer) 73B.
The phase variable block 73A changes the phase of the motor synchronization signal PLS generated by dividing the clock signal from the oscillator 51 as a source signal in accordance with the rising timing of the mark detection signal MARK from the mark detection sensor 40. The counter 73B measures a predetermined time T from the rising timing of the mark detection signal MARK from the mark detection sensor 40, and outputs the switching signal PC which becomes low level for the time T. FIG. 9B shows the operations of the phase variable block 73A and the counter 73B.

FIG. 10 shows a specific configuration of the phase comparator 75 in the motor control circuit 74. The phase comparator 75 includes a phase comparison block 75A and an abnormality detection circuit 75B. The phase comparison block 75A includes the phase variable circuit 7
Motor synchronization signal PLS from 3 and amplification and waveform shaper 6
The encoder signal ENC from 3 is input, the phases of these two pulse signals are compared, and the comparison result is output to the LPF 61 as an output signal OUT. Further, the abnormality detection circuit 75B outputs an abnormality signal ERR when the phase comparison result of the phase comparison block 75A exceeds the threshold range.

A mark detection signal MA is output from the phase variable circuit 73.
When the phase of the motor synchronization signal PLS is shifted at the rising timing of RK, a phase difference is always generated between the motor synchronization signal PLS and the encoder signal ENC. At this time, the abnormality detection circuit 75B raises the threshold range by the switching signal PC from the phase variable circuit 73 so as not to detect the phase difference as an abnormality. FIG. 10 (b) conceptually shows such an operation.

FIG. 11 shows a part of the fourth embodiment of the present invention. The fourth embodiment is another embodiment of the invention according to claim 2, and uses the phase variable circuit 91 instead of the phase variable circuit 73 in the third embodiment.
In the third embodiment, the time T for raising the threshold value range of the abnormality detection circuit 75B is experimentally and empirically determined, whereas in the fourth embodiment, the encoder signal ENC from the amplifier / waveform shaper 63 is determined. Is fed back and the threshold value range of the abnormality detection circuit 75B is returned to the original when the motor synchronization signal PLS and the encoder signal ENC match.

FIG. 12A shows a specific structure of the phase variable circuit 91. The phase variable circuit 91 includes a phase variable block 91A, a phase comparison circuit 91B, and a signal generation circuit 9
1C. The phase variable block 91A is
The phase of the motor synchronizing signal PLS generated by dividing the clock signal from the oscillator 51 as the source signal is changed according to the rising timing of the mark detection signal MARK from the mark detection sensor 40.

The phase comparison circuit 91B receives the motor synchronizing signal PLS from the variable phase block 91A and the encoder signal ENC from the amplifier / waveform shaper 63, and when the phases of these two pulse signals match, they match each other. The signal EQ shown is output. The signal generation circuit 91C becomes low level at the rising timing of the mark detection signal MARK from the mark detection sensor 40, and the phase comparison circuit 91B.
Switching signal PC which becomes high level by phase matching signal EQ from
Is output.

With this operation, the encoder signal E is changed from the rising timing of the mark detection signal MARK.
The closed loop control gain of the motor control circuit (PLL circuit) 74 is reduced until the phase of NC matches the phase of the motor synchronization signal PLS. FIG. 12B shows the phase variable block 9
1A, the operation of the phase comparison circuit 91B, and the signal generation circuit 91C are shown.

In addition, the invention according to claim 2 is carried out in the same manner as the third and fourth embodiments in the first and second embodiments so that further effects can be obtained. In addition, in each of the embodiments described below,
You may make it each carry out similarly to 3rd Embodiment and 4th Embodiment, and may make it further obtain an effect. In the third and fourth embodiments, the motor synchronization signal PLS
The method according to claim 2 is carried out in the same manner as in the third and fourth embodiments in a method of gradually shifting the phase of the motor synchronization signal PLS as in the prior art. Good.

As described above, the third and fourth embodiments are embodiments of the invention according to claim 2, and the photosensitive member 1 and the rotary polygon mirror 5B for exposing the exposure beam corresponding to the image forming signal. A charging member 4 and a laser writing system unit 5 as latent image forming means for sequentially forming electrostatic latent images corresponding to a plurality of image forming signals on the photosensitive body 1 by deflecting the polarized light with the photosensitive body 1; Developing units 6 to 9 as a plurality of developing means for visualizing the latent image on the photosensitive member 1, an intermediate transfer member 10 including an intermediate transfer belt to which the visible images on the photosensitive member 1 are transferred,
A mark detection sensor 40 as mark detection means for detecting a mark on the intermediate transfer member 10, and a motor control circuit 74 as closed loop control means for controlling the rotation of the rotary polygon mirror 5B based on a clock signal to detect out of synchronization. And causing the latent image forming means 4 and 5 to start forming an electrostatic latent image at the mark detection timing of the mark detection means 40, and changing the phase of the clock signal according to the mark detection timing of the mark detection means 40. In the color image forming apparatus, when the phase of the clock signal is varied, the closed-loop control means 74 does not detect the out-of-synchronization or the phase-variable circuits 73 and 91 as the second means for weakening the out-of-synchronization detection capability. Therefore, when the phase of the clock signal is abruptly changed, the out-of-phase of the closed loop control means 74 should not be detected. Or, by weakening the out-of-sync detection capability, it is not necessary to perform abnormal processing after out-of-phase synchronization, there is no need to detect out-of-phase synchronization, or there is no need to perform out-of-sync detection with a strong ability to rotate. It is possible to shorten the time required to change the phase of the polygon mirror.

FIG. 13 shows a part of the fifth embodiment of the present invention. The fifth embodiment is an embodiment of the invention according to claims 3 and 4, and in the color image forming apparatus including the color printer described above, a phase variable circuit 76 and a motor control circuit 77 as shown in FIG. 13 are provided. It is the one that is used. In FIG. 13, the same parts as those in FIG. 25 are designated by the same reference numerals. The motor control circuit 77 has a switch 78 inserted before the amplifier 62 in the motor control circuit 52 described above. This switch 78 connects the input side of the amplifier 62 to the output side of the LPF 61 in accordance with the switching signal SW from the phase variable circuit 76 to make the motor control circuit 77 a closed loop, or sets the input side of the amplifier 62 to the ground side. It is selected whether or not the input voltage of the amplifier 62 is zero by connecting.

FIG. 14 is a timing chart showing the operation of the fifth embodiment. The phase variable circuit 76 receives the mark detection signal MARK from the mark detection sensor 40 and the clock signal from the oscillator 51, divides the clock signal from the oscillator 51 as a source signal, and outputs it as a motor synchronization signal. The phase variable circuit 76 first outputs a motor synchronization signal (of the previous color plate) PLS1. The phase variable circuit 76 receives the mark detection signal MARK from the mark detection sensor 40 at the timing a,
The motor synchronization signal (of the later color plate) PLS2 is generated at the rise of the mark detection signal MARK, and the motor synchronization signal PLS is immediately switched at the rise of the mark detection signal MARK without providing a phase adjustment period.

Therefore, as shown in FIG. 14, the motor synchronizing signal PLS output from the phase varying circuit 76 becomes a signal that causes a sudden phase change. Phase variable circuit 76
When the phase of the motor synchronizing signal PLS is suddenly changed at the rising of the mark detection signal MARK, the switch 78
The switching signal SW for switching to is set to a high level. This switching signal SW
Is a signal which is at a high level for a predetermined period (a period from timing a to timing g) T, and the switch 78 has an input side of the amplifier 62 when the switching signal SW from the phase variable circuit 76 becomes a high level. Is connected to the ground side to make the input voltage of the amplifier 62 zero. This predetermined period T is experimentally and empirically determined in advance.

Therefore, the amplifier 62 causes the polygon motor 5
The current flowing through A becomes zero. The polygon motor 5A, which has been rotating at a constant speed until then, is rotated only by inertial force because the current supplied by the amplifier 62 becomes zero. At this time, the rotation speed of the polygon motor 5A gradually decreases due to frictional resistance during rotation, and the rotation phase also gradually deviates from that at constant speed rotation. Further, when the rotational phase of the polygon motor 5A whose rotational speed decreases in this way reaches an appropriate phase, the switch 78 returns to the original state and connects the input side of the amplifier 62 to the output side of the LPF 61.

As shown in FIG. 14, first, the polygon motor 5A receives the motor synchronizing signal PLS1 from the phase varying circuit 76.
It follows and rotates. Since the encoder signal ENC from the amplifier / waveform shaper 63 indicates the rotation phase of the polygon motor 5A, the motor synchronization signal PLS1 from the phase variable circuit 76 and the encoder signal ENC from the amplifier / waveform shaper 63 are initially set. It has the same phase. When the switch 78 connects the input side of the amplifier 62 to the ground side at the timing a and the closed loop motor control circuit 77 is opened, the rotation speed of the polygon motor 5A gradually decreases.

This indicates that the pulse cycle of the encoder signal ENC from the amplifier / waveform shaper 63 becomes longer, and the phase of the encoder signal ENC deviates from the phase of the motor synchronization signal PLS1. . At timing a, the motor synchronization signal P from the phase variable circuit 76
LS is switched to the motor synchronization signal (of the later color plate) PLS2. Encoder signal ENC whose phase gradually shifts
When the phase becomes close to the motor synchronizing signal PLS2, the switch 78 returns to the original state and the input side of the amplifier 62 is set to LPF6.
1 is connected to the output side (timing g).

As described above, in the system in which the closed loop of the motor control circuit 77 is once opened, the rotation phase of the polygon motor 5A is forced to change the phase of the motor synchronization signal PLS in response to the rapid phase change of the motor synchronization signal PLS. There is no need to match, the rotation phase of the polygon motor 5A can be smoothly matched with the phase of the motor synchronization signal PLS, and the motor control circuit 77 is less likely to be out of phase synchronization.

In the fifth embodiment, the switch 78
The time T (topen) at which the input side of the amplifier 62 is switched to be connected to the ground side is determined as follows. The rising timing a of the mark detection signal MARK a
The deviation time t between the rising timing b of the motor synchronization signal PLS1 and the rising timing b is a time indicating how much the phase of the motor synchronization signal PLS needs to be shifted. The phase variable circuit 76 determines the time topen based on the time t and the degree to which the rotational phase of the polygon motor 5A shifts when the closed loop of the motor control circuit 77 is opened.

That is, the phase variable circuit 76 has the shift time t
When time is large, time t is set so that time open becomes large.
Decide on open. Here, the degree to which the rotational phase of the polygon motor 5A deviates when the closed loop of the motor control circuit 77 is opened may be calculated from the characteristic value of the polygon motor 5A, or experimentally or empirically. You may ask.

FIG. 15A shows a specific structure of the phase variable circuit 76. The phase variable circuit 76 includes a phase variable block 76A and a counter (or timer) 76B. The phase variable block 76A uses the clock signal from the oscillator 51 as a source signal and divides the frequency of the clock signal to generate the phase of the motor synchronization signal PLS.
Is changed according to the rising timing of the mark detection signal MARK. The counter 76B measures a predetermined time T from the rising timing of the mark detection signal MARK from the mark detection sensor 40, and outputs the switching signal SW that is at a high level for the period of the time T. FIG.
(B) shows the operation of the phase variable block 76A and the counter 76B.

In this embodiment, the motor synchronization signal PL
Although it is a method of changing the phase of S at once, in the method of gradually shifting the phase of the motor synchronizing signal PLS as in the prior art, the invention according to claim 3 and the invention according to claim 4 are
You may implement similarly to embodiment.

As described above, the fifth embodiment is an embodiment of the invention according to claim 3, and the photoconductor 1 and the photoconductor by deflecting the exposure beam corresponding to the image forming signal by the rotary polygon mirror 5B. 1 and a laser writing system unit 5 as a latent image forming means for sequentially forming an electrostatic latent image corresponding to a plurality of image forming signals on the photoconductor 1 by irradiating 1 with the latent image on the photoconductor 1. Developing units 6 to 9 as a plurality of developing means for visualizing, an intermediate transfer body 10 including an intermediate transfer belt to which the visible images on the photoconductor 1 are transferred, and a mark on the intermediate transfer body 10 are detected. A mark detection sensor 40 as mark detection means and a rotary polygon mirror 5B based on a clock signal.
And a motor control circuit 77 as a closed loop control means for controlling the rotation of the latent image forming means 4 and 5 at the mark detection timing of the mark detecting means 40 to start the formation of the electrostatic latent image, and Phase detecting means 4
The color image forming apparatus which changes according to the mark detection timing of 0 is provided with the phase changing circuit 76 as the third means for temporarily opening the loop of the closed loop control means 77 when changing the phase of the clock signal. Therefore, the rotational phase of the rotary polygon mirror 5B can be shifted to a desired rotational phase by opening the loop of the closed loop control means 77 once and rotating the polygon motor 5A with the inertial force up to that point. There is no need to forcibly adjust the rotational phase of the rotary polygon mirror 5B when changing the phase of, and smooth phase variation is possible.

The fifth embodiment is an embodiment of the invention according to claim 4, and in the color image forming apparatus according to claim 3, the third means 76 is a closed loop control means 77.
Since the time to open the loop of the polygon is determined according to the mark detection timing of the mark detecting means 40, the loop of the closed loop control means 77 is closed when the rotational phase of the polygon mirror 5B deviates to an appropriate rotational phase. The rotation control of the mirror 5B can be restarted, and the smooth phase change of the polygon mirror 5B becomes possible.

FIG. 16 shows a part of the sixth embodiment of the present invention. The sixth embodiment is an embodiment of the invention according to claim 5, and in the fifth embodiment, a phase variable circuit 79 is used instead of the phase variable circuit 76. The phase variable circuit 79 is used for the amplification and waveform shaper 6
The encoder signal ENC from 3 is input.

The sixth embodiment operates almost the same as the fifth embodiment, but the sixth embodiment differs from the fifth embodiment in that the switching signal SW is set to a high level in the fifth embodiment. The time T (topen) for closing the loop of the motor control circuit 77 by the deviation time t and the degree of deviation of the rotation phase of the polygon motor 5A when the closed loop of the motor control circuit 77 is opened. In contrast to this, in the sixth embodiment, the phase state of the encoder signal ENC from the amplifier / waveform shaper 63 is observed and the time top
determine en That is, in the sixth embodiment, when the phase of the encoder signal ENC matches the phase of the motor synchronization signal PLS2, the switching signal SW is set to low level and the loop of the motor control circuit 77 is closed.

FIG. 17 shows a part of the processing flow of the phase variable circuit 79. The phase variable circuit 79 includes the mark detection sensor 4
At the rising edge a of the mark detection signal MARK from 0, the switching signal SW to the switch 78 is changed from the low level to the high level, the motor synchronizing signal (of the later color plate) PLS2 is generated, and the phase adjustment period is not provided. Mark detection signal M
The motor synchronization signal PLS is immediately switched to the motor synchronization signal PLS2 at the rising edge of ARK. Next, the phase variable circuit 79 compares the phase of the encoder signal ENC from the amplifier / waveform shaper 63 with the phase of the motor synchronization signal PLS2 and determines the phase of the encoder signal ENC as the motor synchronization signal PLS.
When it matches the phase of 2, the switching signal SW is set to the low level to close the loop of the motor control circuit 77.

Motor control circuit 77 as in the fifth embodiment
Of the polygon motor 5A when the closed loop of FIG.
If the open is estimated and determined, an error will occur in the estimated time open due to variations in the characteristic values of the polygon motor 5A and changes in the usage environment of the polygon motor 5A.
In the sixth embodiment, since the actual rotation phase of the polygon motor 5A is observed, there is no error in the time top due to variations in the characteristic values of the polygon motor 5A and changes in the usage environment of the polygon motor 5A, and it is accurate. In addition, the loop of the motor control circuit 77 can be closed.

FIG. 18A shows a concrete structure of the phase variable circuit 79. The phase variable circuit 79 includes a phase variable block 79A, a phase comparison circuit 79B, and a signal generation circuit 7.
9C and. The phase variable block 79A is
The phase of the motor synchronizing signal PLS generated by dividing the clock signal from the oscillator 51 as the source signal is changed according to the rising timing of the mark detection signal MARK from the mark detection sensor 40.

The phase comparison circuit 79B receives the motor synchronization signal PLS from the phase variable block 79A and the encoder signal ENC from the amplifier / waveform shaper 63, and when the phases of these two pulse signals match, they are matched. The signal EQ shown is output. The signal generation circuit 79C becomes high level at the rising timing of the mark detection signal MARK from the mark detection sensor 40, and the phase comparison circuit 79B.
Switching signal SW which becomes low level by the phase matching signal EQ from
Is output.

With this operation, the encoder signal E is changed from the rising timing of the mark detection signal MARK.
The closed loop of the motor control circuit (PLL circuit) 77 is kept open until the phase of NC matches the phase of the motor synchronization signal PLS. FIG. 18B shows a phase variable block 79A,
The operations of the phase comparison circuit 79B and the signal generation circuit 79C are shown. In the present embodiment, the phase of the motor synchronizing signal PLS is changed at once, but in the method of gradually shifting the phase of the motor synchronizing signal PLS as in the prior art, the invention according to claim 5 is different from the sixth embodiment. You may carry out similarly.

As described above, the sixth embodiment is an embodiment of the invention according to claim 5, and in the color image forming apparatus according to claim 3, serves as detection means for detecting the rotation of the rotary polygon mirror 5B. The phase variable circuit 79 as the third means is provided with the sensor 5H, and the loop of the motor control circuit 77 as the closed loop control means is provided when the output signal of the detection means 5H indicating the rotational phase of the rotary polygon mirror 5B becomes a predetermined phase. Is closed again, the loop of the motor control circuit 77 can be closed when the output signal of the detection means 5H becomes the same phase as the clock signal after the phase change, and the smooth phase of the polygon mirror 5B can be obtained. It is possible to change.

FIG. 19 shows a part of the seventh embodiment of the present invention. The seventh embodiment is an embodiment of the invention according to claims 6 and 7, and is such that the phase variable circuit 80 and the motor control circuit 81 are used in the color image forming apparatus including the color printer described above. is there. In FIG. 19, the same parts as those in FIG. 25 are designated by the same reference numerals. The motor control circuit 81 is the motor control circuit 5 described above.
2, the adder 82 is inserted before the amplifier 62. In the fifth and sixth embodiments described above,
The loop of the motor control circuit 77 is opened to wait for the rotation phase of the polygon motor 5A to gradually shift, but in the seventh embodiment, the polygon motor 5A is positively rotated to shift the rotation phase. .

The phase variable circuit 80 divides the clock signal from the oscillator 51 as a source signal and outputs it as a motor synchronizing signal. The phase variable circuit 80 first outputs a motor synchronization signal (of the previous color plate) PLS1.
When the mark detection signal MARK is input from the mark detection sensor 40 at the timing a, the phase variable circuit 80 generates a motor synchronization signal (of the later color plate) PLS2 at the rising of this mark detection signal MARK, and adjusts the phase. The motor synchronization signal PLS is immediately changed to the motor synchronization signal LS2 at the rising edge of the mark detection signal MARK without providing a period.
Switch to.

Therefore, the motor synchronizing signal PLS output from the phase varying circuit 80 becomes a signal which causes a sudden phase change. Therefore, the phase variable circuit 80 uses the adder 82.
The addition pulse ADD is output to. That is, the phase variable circuit 80 controls the mark detection signal MA from the mark detection sensor 40.
The addition pulse ADD is generated for a predetermined period T from the rising timing a of RK, and the adder 82 keeps the steady voltage value (output signal of the LPF 61) and the phase variable circuit 8 until then.
The addition pulse ADD from 0 is added and output to the amplifier 62. At this time, the electric current supplied from the amplifier 62 to the polygon motor 5A is calculated by adding pulse A from the steady value up to that point.
It increases by the amount of DD. The predetermined period T is experimentally and empirically determined in advance.

When the current supplied to the polygon motor 5A increases, the rotation speed of the polygon motor 5A increases. FIG.
0 is a timing chart showing the situation. FIG.
As shown in, the addition pulse ADD is output to the adder 82 at the timing a. The phase variable circuit 80 changes the pulse width of the added pulse ADD output to the adder 82 according to the time t between the motor synchronization signal PLS2 and the mark detection signal MARK (mark detection timing a of the mark detection sensor 40).
Decide).

When the adder pulse ADD is added to the steady output signal of the LPF 61 by the adder 82, the polygon motor 5A starts rotating at a higher speed. Encoder signal ENC from amplifier and waveform shaper 63 shown in FIG.
Indicates that, and the pulse period becomes shorter by the addition of the addition pulse ADD than the period until then. The motor synchronization signal PLS changes to the phase of the motor synchronization signal PLS2 at the mark detection timing a of the mark detection sensor 40,
The phase of the encoder signal ENC is the motor synchronization signal PLS2.
When the phase coincides with the phase, the addition pulse ADD disappears and the loop of the motor control circuit 81 is closed.

In the seventh embodiment, as in the fifth and sixth embodiments, the loop of the motor control circuit 77 is opened, and the rotation phase of the polygon motor 5A is gradually shifted by inertial force. Compared with the method of waiting for, the rotation phase of the polygon mirror 5B can be changed in a short time because the polygon motor 5A is positively rotated to shift the rotation phase.

FIG. 21 shows a specific structure of the phase variable circuit 80. The phase variable circuit 80 includes the phase variable block 8
0A, a counter (or timer) 80B, and a voltage changeover switch circuit 80C. Phase variable block 8
0A changes the phase of the motor synchronizing signal PLS created by dividing the clock signal from the oscillator 51 as a source signal in accordance with the rising timing of the mark detection signal MARK from the mark detection sensor 40.

The counter 80B measures a predetermined time T from the rising timing of the mark detection signal MARK from the mark detection sensor 40, and sends a switching signal to the voltage changeover switch circuit 80C for that time T. The voltage changeover switch circuit 80C switches the switch to a predetermined voltage Vdd side or a ground side according to the output signal of the counter 80B, and outputs the addition pulse ADD switched from the switch to Vdd or 0V according to the output signal of the counter 80B. To do. FIG.
1 (b) is a phase variable block 80A, a counter 80B,
The operation of the voltage changeover switch circuit 80C is shown. FIG.
2 shows a concrete configuration of the adder 82 in the motor control circuit 81. The adder 82 is a general adder including an operational amplifier 82A and resistors 82B to 82D.

FIG. 23 shows a part of the eighth embodiment of the present invention. The eighth embodiment is an embodiment of the invention according to claims 6 to 8, and in the seventh embodiment, a phase variable circuit 92 is used instead of the phase variable circuit 80. In the seventh embodiment, the application time T of the addition pulse ADD is determined experimentally and empirically, whereas in the eighth embodiment, the encoder signal ENC from the amplifier / waveform shaper 63 is fed back to perform motor synchronization. Signal P
When the LS and the encoder signal ENC match, the generation of the addition pulse ADD is stopped.

FIG. 24A shows a concrete structure of the phase variable circuit 92. The phase variable circuit 92 includes a phase variable block 92A, a phase comparison circuit 92B, and a signal generation circuit 9
2C and a voltage changeover switch circuit 92D. The phase variable block 92A changes the phase of the motor synchronization signal PLS generated by dividing the clock signal from the oscillator 51 as a source signal in accordance with the rising timing of the mark detection signal MARK from the mark detection sensor 40.

The phase comparison circuit 92B receives the motor synchronization signal PLS from the phase variable block 92A and the encoder signal ENC from the amplifier / waveform shaper 63, and when the phases of these two pulse signals match, they match each other. The signal EQ shown is output. The signal generation circuit 92C becomes high level at the rising timing of the mark detection signal MARK from the mark detection sensor 40, and the phase comparison circuit 92B.
And outputs a switching signal which becomes a low level by the phase coincidence signal EQ from. The voltage changeover switch circuit 80C switches the switch to a predetermined voltage V according to the changeover signal from the signal generation circuit 92C.
The addition pulse ADD is switched to the dd side or the ground side, and the addition pulse ADD switched to Vdd or 0 V is output from the switch according to the switching signal from the signal generation circuit 92C.

With this operation, the encoder signal E is changed from the rising timing of the mark detection signal MARK.
The addition pulse ADD is applied to the closed loop of the motor control circuit (PLL circuit) 81 until the phase of NC matches the phase of the motor synchronization signal PLS. FIG. 24B shows a variable phase block 92A, a phase comparison circuit 92B, and a signal generation circuit 92.
C shows the operation of the voltage changeover switch circuit 92C.

As described above, the seventh embodiment and the eighth embodiment are embodiments of the invention according to claim 6, and the photoconductor 1 and the exposure beam corresponding to the image forming signal are transmitted by the rotary polygon mirror 5B. A charging member 4 and a laser writing system unit 5 as latent image forming means for deflecting and irradiating the photoconductor 1 to sequentially form electrostatic latent images corresponding to a plurality of image forming signals on the photoconductor 1, and the photoconductor 1. Developing units 6 to 9 as a plurality of developing means that visualize the latent image on the top, an intermediate transfer member 10 including an intermediate transfer belt to which the visible images on the photoconductor 1 are transferred, and on the intermediate transfer member 10. The mark detection sensor 40 as a mark detection means for detecting the mark and the motor control circuit 81 as a closed loop control means for controlling the rotation of the rotary polygon mirror 5B based on the clock signal.
In the color image forming apparatus, which causes the latent image forming means 4 and 5 to start forming an electrostatic latent image at the mark detection timing of 0, and changes the phase of the clock signal according to the mark detection timing of the mark detection means 40. Phase changing circuits 80 and 9 as fourth means for applying a predetermined signal to the closed loop control means 81 when changing the phase of the clock signal.
2 is provided, it is possible to positively control the rotation of the polygon motor 5A to shift the rotation phase when the phase of the clock signal is abruptly changed, and to rotate the polygon mirror 5 in a short time.
The rotation phase of B can be changed.

In addition, the seventh and eighth embodiments are
An embodiment of the invention according to claim 7, wherein in the color image forming apparatus according to claim 6, the phase varying circuits 80 and 92 as the fourth means make the predetermined signal a pulsed signal, Since the pulse width is determined according to the mark detection timing of the mark detection means 40, the rotation control of the rotary polygon mirror 5B by the closed loop control means 81 can be appropriately performed when the phase of the clock signal is rapidly changed.

In the seventh and eighth embodiments, the phase variable circuits 80 and 92 as the fourth means use the predetermined signal as a pulse signal, and determine the pulse peak value or pulse width of this signal. Also, the same effect can be obtained by determining the pulse crest value according to the mark detection timing of the mark detection means 40.

Further, the eighth embodiment is an embodiment of the invention according to claim 8, and in the color image forming apparatus according to claim 6, the sensor 5H as a detecting means for detecting the rotation of the rotary polygon mirror 5B. The phase variable circuit 92 as the fourth means stops the application of the predetermined signal to the closed loop control means 81 when the output signal of the detection means 5H indicating the rotation phase of the rotary polygon mirror 5B reaches a predetermined phase. Therefore, the rotation phase of the rotary polygon mirror 5B can be changed smoothly.

In the seventh and eighth embodiments described above,
Although the rotation speed of the polygon motor 5A is increased by the addition of the addition pulse ADD, conversely, the phase variable circuits 80 and 92 output the subtraction pulse at the same timing instead of the addition pulse ADD, and the subtractor instead of the adder 82. Use this subtractor with L
By subtracting the subtraction pulse from the output signal of PF61,
The rotation speed of the polygon motor 5A may be positively reduced to obtain the same effect. In this case, as compared with the case where the loop of the motor control circuit 81 is opened and the polygon motor 5A is rotated by inertial force, the rotation speed of the polygon motor 5A is positively reduced by subtraction of the subtraction pulse.
The rotation speed of the polygon motor 5A can be shifted faster, and the time required to change the rotation phase of the rotary polygon mirror 5B can be shortened.

Further, the addition of the addition pulse ADD for increasing the rotation speed of the polygon motor 5A and the subtraction of the subtraction pulse for decreasing the rotation speed of the polygon motor 5A are switched depending on the case to further change the rotation phase of the rotary polygon mirror 5B. The time required can be shortened. In addition, in the seventh embodiment and the eighth embodiment, the adder 82 is inserted in the closed loop of the motor control circuit 81 and the addition pulse ADD is added. However, when the addition pulse ADD is added, the addition of the addition pulse ADD is performed by the motor control circuit 81. The same effect can be obtained by adding the addition pulse ADD with the closed loop opened. Further, the present invention is not limited to the above-described embodiment, but can be similarly applied to a color image forming apparatus such as a color copying machine or a color facsimile other than the color printer.

[0112]

As described above, according to the first aspect of the present invention, the photosensitive member and the exposure beam corresponding to the image forming signal are deflected by the rotary polygon mirror to irradiate the photosensitive member with a plurality of image forming signals. Latent image forming means for sequentially forming an electrostatic latent image on the photoconductor, a plurality of developing means for visualizing the latent image on the photoconductor, and the visible image on the photoconductor being transferred. An intermediate transfer body, a mark detection means for detecting a mark on the intermediate transfer body, and a closed loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal. In a color image forming apparatus that causes the latent image forming means to start forming an electrostatic latent image at a timing and changes the phase of the clock signal according to the mark detection timing of the mark detection means, the phase of the clock signal is changed. You Since the first means for reducing the loop gain of the closed-loop control means is provided at times, the phase synchronism of the closed-loop control means is less likely to occur and the phase of the clock signal can be rapidly changed, and the phase of the rotary polygon mirror can be changed. It is possible to reduce the time required.

According to the invention of claim 2, a photosensitive member,
Latent image forming means for deflecting an exposure beam corresponding to an image forming signal by a rotating polygon mirror to irradiate the photoconductor to sequentially form electrostatic latent images corresponding to a plurality of image forming signals on the photoconductor; A plurality of developing means for developing the latent image on the photoconductor, an intermediate transfer body to which the visible image on the photoconductor is transferred, and a mark detecting means for detecting a mark on the intermediate transfer body,
And a closed loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal to detect out-of-synchronization, and starts forming an electrostatic latent image on the latent image forming means at the mark detection timing of the mark detecting means. In the color image forming apparatus that changes the phase of the clock signal according to the mark detection timing of the mark detecting unit, the closed loop control unit does not perform the out-of-sync detection when changing the phase of the clock signal, or Since the second means for weakening the out-of-synchronization detection ability is provided, the closed-loop control means does not detect the out-of-phase synchronization or weakens the out-of-synchronization detection ability when the phase of the clock signal is rapidly changed. Therefore, there is no need to perform abnormal processing after loss of phase synchronization, there is no need to detect loss of phase synchronization, or loss of synchronization detection It is not necessary to perform at high capacity, it is possible to shorten the time required for phase variable of the rotating polygon mirror.

According to the invention of claim 3, a photosensitive member,
Latent image forming means for deflecting an exposure beam corresponding to an image forming signal by a rotating polygon mirror to irradiate the photoconductor to sequentially form electrostatic latent images corresponding to a plurality of image forming signals on the photoconductor; A plurality of developing means for developing the latent image on the photoconductor, an intermediate transfer body to which the visible image on the photoconductor is transferred, and a mark detecting means for detecting a mark on the intermediate transfer body,
A closed loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal, causing the latent image forming means to start forming an electrostatic latent image at the mark detection timing of the mark detection means, and the clock signal In the color image forming apparatus for changing the phase of the closed loop control means according to the mark detection timing of the mark detecting means, a third means for temporarily opening the loop of the closed loop control means when changing the phase of the clock signal is provided. Therefore, by temporarily opening the loop of the closed loop control means and rotating the rotary polygon mirror by the inertial force until then, the rotation phase of the rotary polygon mirror can be shifted to a desired rotation phase, and the phase of the clock signal can be changed. It is not necessary to forcibly adjust the rotation phase of the rotating polygon mirror to the phase of the clock signal when changing the phase, and smooth phase change is possible.

According to the fourth aspect of the present invention, in the color image forming apparatus according to the third aspect, the third means sets the time for which the loop of the closed loop control means is opened to the mark detection of the mark detection means. Since it is decided according to the timing, when the rotational phase of the rotary polygon mirror deviates to an appropriate rotation phase, the loop of the closed loop control means can be closed and the rotation control of the rotary polygon mirror can be restarted, thus smoothing the rotary polygon mirror. It is possible to change the phase.

According to a fifth aspect of the invention, in the color image forming apparatus according to the third aspect, there is provided detection means for detecting the rotation of the rotary polygon mirror, and the third means rotates the rotary polygon mirror. When the output signal of the detecting means indicating the phase becomes a predetermined phase, the loop of the closed loop control means is closed again, so that when the output signal of the detecting means becomes the same phase as the clock signal after the phase change. The loop of the closed loop control means can be put in the closed state, and smooth phase change of the rotary polygon mirror becomes possible.

According to the invention of claim 6, a photosensitive member,
Latent image forming means for deflecting an exposure beam corresponding to an image forming signal by a rotating polygon mirror to irradiate the photoconductor to sequentially form electrostatic latent images corresponding to a plurality of image forming signals on the photoconductor; A plurality of developing means for developing the latent image on the photoconductor, an intermediate transfer body to which the visible image on the photoconductor is transferred, and a mark detecting means for detecting a mark on the intermediate transfer body,
A closed loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal, causing the latent image forming means to start forming an electrostatic latent image at the mark detection timing of the mark detection means, and the clock signal In the color image forming apparatus that changes the phase of the signal in accordance with the mark detection timing of the mark detecting means, the color image forming apparatus includes the fourth means for applying a predetermined signal to the closed loop control means when changing the phase of the clock signal. When the phase of the clock signal is rapidly changed, the rotation of the rotary polygon mirror can be positively controlled to shift the rotation phase, and the rotation phase of the rotary polygon mirror can be changed in a short time.

According to a seventh aspect of the present invention, in the color image forming apparatus according to the sixth aspect, the fourth means makes the predetermined signal a pulsed signal, and the pulse width and / or the pulse width of the signal. Since the crest value is determined according to the mark detection timing of the mark detection means, the rotation control of the rotary polygon mirror by the closed loop control means can be appropriately performed when the phase of the clock signal is rapidly changed.

According to an eighth aspect of the invention, in the color image forming apparatus according to the sixth aspect, there is provided rotation detecting means for detecting the rotation of the rotary polygon mirror, and the fourth means is the rotary polygon mirror. Since the application of the predetermined signal to the closed loop control means is stopped when the output signal of the rotation detecting means indicating the rotation phase reaches a predetermined phase, the rotation phase of the rotary polygon mirror can be smoothly changed. .

[Brief description of the drawings]

FIG. 1 is a block diagram showing a part of a first embodiment of the present invention.

FIG. 2 is a timing chart showing the operation timing of the first embodiment.

FIG. 3 is a block diagram showing a specific configuration of the phase variable circuit of the first embodiment and a timing chart showing its operation.

FIG. 4 is a block diagram showing a specific configuration of a gain-switchable amplifier in the motor control circuit of the first embodiment.

FIG. 5 is a block diagram showing a part of a second embodiment of the present invention.

FIG. 6 is a block diagram showing a specific configuration of the phase variable circuit of the second embodiment and a timing chart showing its operation.

FIG. 7 is a block diagram showing a part of a third embodiment of the present invention.

FIG. 8 is a timing chart showing the operation of the third embodiment.

FIG. 9 is a block diagram showing a specific configuration of a phase variable circuit according to the third embodiment.

FIG. 10 is a block diagram showing a specific configuration of a phase comparator in the motor control circuit according to the third embodiment and a timing chart showing the operation thereof.

FIG. 11 is a block diagram showing a part of a fourth embodiment of the present invention.

FIG. 12 is a block diagram showing a specific configuration of a phase variable circuit according to the fourth embodiment.

FIG. 13 is a block diagram showing a part of a fifth embodiment of the present invention.

FIG. 14 is a timing chart showing the operation of the fifth embodiment.

FIG. 15 is a block diagram showing a specific configuration of the phase variable circuit of the fifth embodiment and a timing chart showing its operation.

FIG. 16 is a block diagram showing a part of a sixth embodiment of the present invention.

FIG. 17 is a flowchart showing a part of a processing flow of the phase variable circuit of the sixth embodiment.

FIG. 18 is a block diagram showing the configuration of the phase variable circuit of the sixth embodiment and a timing chart showing the operation thereof.

FIG. 19 is a block diagram showing a part of a seventh embodiment of the present invention.

FIG. 20 is a timing chart showing the operation of the seventh embodiment.

FIG. 21 is a block diagram showing a specific configuration of the phase variable circuit of the seventh embodiment and a timing chart showing its operation.

FIG. 22 is a block diagram showing a specific configuration of an adder in the motor control circuit according to the seventh embodiment.

FIG. 23 is a block diagram showing a part of an eighth embodiment of the present invention.

FIG. 24 is a block diagram showing a specific configuration of a phase variable circuit of the eighth embodiment and a timing chart showing its operation.

FIG. 25 is a sectional view showing a part of an example of a conventional color printer.

FIG. 26 is a timing chart showing the operation of the color printer.

FIG. 27 is a cross-sectional view showing the outline of the same color printer.

FIG. 28 is a schematic view showing an enlarged part of the color printer.

FIG. 29 is an enlarged perspective view showing a part of the color printer.

FIG. 30 is a block diagram showing a part of the color printer.

FIG. 31 is a timing chart showing the operation of the color printer.

[Explanation of symbols]

1 Photoconductor 4 Charging Member 5 Laser Writing System Unit 5A Polygon Motor 5B Rotating Polygonal Mirror 5H Sensor 40 Mark Detection Means 70, 73, 76, 79, 80, 90, 91, 92
Phase variable circuit 71, 74, 77, 81 Motor control circuit 78 Switch

Claims (8)

[Claims] 1. A photosensitive member and an exposure beam corresponding to an image forming signal are deflected by a rotary polygon mirror to irradiate the photosensitive member, and electrostatic latent images corresponding to a plurality of image forming signals are sequentially applied to the photosensitive member. The latent image forming means for forming, a plurality of developing means for developing the latent image on the photoconductor, an intermediate transfer body to which the visible image on the photoconductor is transferred, and a mark on the intermediate transfer body are formed. It has mark detection means for detecting and closed loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal, and an electrostatic latent image is formed on the latent image forming means at the mark detection timing of the mark detection means. In the color image forming apparatus that changes the phase of the clock signal according to the mark detection timing of the mark detection unit, the loop gain of the closed loop control unit is changed when the phase of the clock signal is changed. Sakusuru color image forming apparatus comprising the first means. 2. A photosensitive member and an exposure beam corresponding to an image forming signal are deflected by a rotary polygon mirror to irradiate the photosensitive member, and electrostatic latent images corresponding to a plurality of image forming signals are sequentially applied to the photosensitive member. The latent image forming means for forming, a plurality of developing means for developing the latent image on the photoconductor, an intermediate transfer body to which the visible image on the photoconductor is transferred, and a mark on the intermediate transfer body are formed. It has mark detection means for detecting and closed-loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal to detect out-of-synchronization, and the latent image forming means is controlled by the mark detection timing of the mark detection means. In a color image forming apparatus that starts forming a latent image and changes the phase of the clock signal according to the mark detection timing of the mark detecting means, the closed loop control means when changing the phase of the clock signal. Desynchronization not perform detection, or a color image forming apparatus characterized by comprising second means to weaken the ability of the desynchronization detection. 3. A photosensitive member and an exposure beam corresponding to an image forming signal are deflected by a rotating polygon mirror to irradiate the photosensitive member to sequentially form electrostatic latent images corresponding to a plurality of image forming signals on the photosensitive member. The latent image forming means for forming, a plurality of developing means for developing the latent image on the photoconductor, an intermediate transfer body to which the visible image on the photoconductor is transferred, and a mark on the intermediate transfer body are formed. It has mark detection means for detecting and closed loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal, and an electrostatic latent image is formed on the latent image forming means at the mark detection timing of the mark detection means. In the color image forming apparatus that changes the phase of the clock signal according to the mark detection timing of the mark detection means, the loop of the closed loop control means is temporarily opened when the phase of the clock signal is changed. Color image forming apparatus characterized by comprising a third means for state. 4. A color image forming apparatus according to claim 3, wherein the third means determines a time for opening the loop of the closed loop control means in accordance with a mark detection timing of the mark detection means. And a color image forming apparatus. 5. The color image forming apparatus according to claim 3, further comprising detection means for detecting rotation of the rotary polygon mirror.
A color image forming apparatus wherein the third means recloses the loop of the closed loop control means when the output signal of the detection means indicating the rotational phase of the rotary polygon mirror reaches a predetermined phase. . 6. A photosensitive member and an exposure beam corresponding to an image forming signal are deflected by a rotary polygon mirror to irradiate the photosensitive member, and electrostatic latent images corresponding to a plurality of image forming signals are sequentially applied to the photosensitive member. The latent image forming means for forming, a plurality of developing means for developing the latent image on the photoconductor, an intermediate transfer body to which the visible image on the photoconductor is transferred, and a mark on the intermediate transfer body are formed. It has mark detection means for detecting and closed loop control means for controlling the rotation of the rotary polygon mirror based on a clock signal, and an electrostatic latent image is formed on the latent image forming means at the mark detection timing of the mark detection means. In the color image forming apparatus that changes the phase of the clock signal in accordance with the mark detection timing of the mark detecting means, a predetermined signal is applied to the closed loop control means when changing the phase of the clock signal. Color image forming apparatus characterized by comprising a fourth means for. 7. A color image forming apparatus according to claim 6, wherein said fourth means makes said predetermined signal a pulse-like signal, and the pulse width and / or pulse crest value of this signal is determined by said mark detecting means. A color image forming apparatus characterized by being determined according to mark detection timing. 8. A color image forming apparatus according to claim 6, further comprising a rotation detecting means for detecting rotation of said rotary polygon mirror, said fourth means showing said rotation detecting means for indicating a rotation phase of said rotary polygon mirror. The color image forming apparatus is characterized in that the application of the predetermined signal to the closed loop control means is stopped when the output signal of the output signal becomes a predetermined phase.