JPH089642Y2 - Ultrasonic flaw detector - Google Patents
Ultrasonic flaw detectorInfo
- Publication number
- JPH089642Y2 JPH089642Y2 JP8441490U JP8441490U JPH089642Y2 JP H089642 Y2 JPH089642 Y2 JP H089642Y2 JP 8441490 U JP8441490 U JP 8441490U JP 8441490 U JP8441490 U JP 8441490U JP H089642 Y2 JPH089642 Y2 JP H089642Y2
- Authority
- JP
- Japan
- Prior art keywords
- defect
- signal
- noise
- gate
- flaw detector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)
Description
【考案の詳細な説明】 〔産業上の利用分野〕 方向は、鉄鋼及び非鉄製品の製造時並びに鋼構造物等
の非破壊検査に適用される電磁超音波トランスデューサ
を用いた超音波探傷装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to an ultrasonic flaw detector using an electromagnetic ultrasonic transducer that is applied to nondestructive inspection of steel structures and nonferrous products during manufacturing of steel and nonferrous products.
電磁超音波トランスデューサを用いた超音波探傷検査
の場合、欠陥からの反射波の他に工場モータや、クレー
ン電気炉作動時のスイッチングノイズ等のランダムなイ
ンパルス的電気ノイズ波が混入するが、従来は欠陥波が
予め出現する時刻にゲートを設け欠陥信号の検波波のゲ
ート内でのピークをホールドし、ペンレコーダ等によ
り、欠陥の記録データを取る方法であるため、ランダム
な外乱ノイズがゲート内に混入した場合、この外乱ノイ
ズがペンレコーダ等の記録データに記録される為、記録
データより欠陥信号と外乱ノイズとの識別ができなかっ
た。In the case of ultrasonic flaw detection using an electromagnetic ultrasonic transducer, in addition to reflected waves from defects, random impulse electric noise waves such as factory motor and switching noise when the crane electric furnace is operating are mixed. A gate is provided at the time when the defect wave appears in advance, the peak of the detection wave of the defect signal is held in the gate, and the recorded data of the defect is taken by a pen recorder or the like, so random disturbance noise is generated in the gate. When mixed, this disturbance noise is recorded in the recording data of a pen recorder or the like, so that the defect signal and the disturbance noise cannot be discriminated from the recording data.
前記の方法では、ゲート内に外乱ノイズが入って来た
場合には、探傷結果であるペン記録計等のデータより、
以下の識別が不可能である。In the above method, when disturbance noise enters the gate, from the data of the pen recorder, which is the flaw detection result,
The following cannot be identified:
1) 欠陥信号がある場合、 ノイズレベルが欠陥信号より大きい場合にはノイズピ
ークが出力されてしまい、欠陥ピークが得られない。1) When there is a defect signal: When the noise level is higher than the defect signal, a noise peak is output and the defect peak cannot be obtained.
2) 欠陥信号がない場合、 出力信号が欠陥信号によるものかノイズによるものか
区別がつかない。2) If there is no defective signal, it is impossible to distinguish whether the output signal is due to the defective signal or noise.
以上のようにノイズがゲート内に入って来ると欠陥の
存在さえも、ましてやそのピーク値さえも推定すること
が不可能となる。As described above, when noise enters the gate, it becomes impossible to estimate the existence of a defect, let alone the peak value thereof.
前記の問題を解決するために、本考案における欠陥抽
出装置は、欠陥が発生する部位がほぼ一定している場合
つまり欠陥信号が現われる時刻がほぼ一定しているとい
う条件のもとで、n個のゲート、この各1個のゲートに
つき1個のF−V変換器(周波数−電圧変換器)、1個
の比較器を使用し、n個の比較器の論理和をとるオア回
路、探傷器からのトリガー信号を基準にゲートタイミン
グ信号を作り出すタイムベース回路を備えていることを
特徴としている。In order to solve the above-mentioned problem, the defect extracting apparatus according to the present invention has n defect detectors under the condition that the defect occurrence site is substantially constant, that is, the time at which the defect signal appears is substantially constant. , One F-V converter (frequency-voltage converter) for each one gate, one comparator is used, and an OR circuit for taking the logical sum of n comparators, flaw detector It is characterized by including a time base circuit that generates a gate timing signal based on the trigger signal from the.
本考案は前記のように、予め設定したゲートを通過し
てくる反射波が周波数−電圧変換に入力され、この変換
回路の出力電圧を上昇させ比較器の基準レベルを越えた
時のみ欠陥信号を出力するもので、ノイズによる誤検出
の確率を限りなくゼロに近ずける事を可能とする。欠陥
であれば必ずゲート内に連続して入ってくるが、ノイズ
の場合は連続複数回入ってくる可能性は極めて低い事を
利用するのである。つまり送信波を出さずに周波数−電
圧変換回路の出力電圧がどこまで最大上昇するか、その
電圧ENを調べておき、比較器の基準電圧を(EN+α)を
設定しておけば、このレベルを越えるものは欠陥に他な
らない。この装置では被検体が移動する場合にも適用可
能であるが、移動速度を上げ、設定電圧を一定とするに
は送信波を出す周期を短かくするつまりくりかえし周波
数を上げる必要がある。In the present invention, as described above, the reflected wave passing through the preset gate is input to the frequency-voltage conversion, the output voltage of this conversion circuit is increased, and the defective signal is generated only when the reference level of the comparator is exceeded. It is output, and it is possible to make the probability of false detection due to noise as close to zero as possible. If it is a defect, it will always enter the gate continuously, but in the case of noise, it is extremely unlikely that it will enter the gate multiple times in succession. That frequency without generating transmission waves - whether the output voltage of the voltage conversion circuit increases the maximum extent, Be prepared with the voltage E N, by setting the reference voltage of the comparator a (E N + α), the What exceeds the level is nothing but a defect. This device can be applied to the case where the subject moves, but in order to increase the moving speed and keep the set voltage constant, it is necessary to shorten the period for transmitting the transmission wave, that is, repeatedly increase the frequency.
以下、本考案を図示の実施例により詳細に説明する。
第4図の(a)は電磁超音波探傷器の受信信号であり、
(b)はその整流した包絡線の波形である。A及びCは
送信波であり、B及びDは欠陥による反射波である。
(c)は、ゲートタイミング信号を表しており、ゲート
幅Δt1,Δt2,……,Δtn(全て等しくてもよい)で、
(d)の探傷器からのトリガー信号にt1,t2,……,tn
と遅延させ、ゲートチャンネルG1,G2,……,Gnと順に
ゲートを開き信号を順に取り組む。欠陥反射波が出現す
る時刻がほぼ一定になる条件においては、ノイズ除去の
原理から言う、ゲートの数は出来るだけ少なく、ゲート
幅は出来るだけ狭まくする方がよい。なお(d)のトリ
ガーが信号に同期して、(a)のAのごときトーンバー
スト波が発振され被検体内で超音波が1/fr(sec)毎に
発生する。(くりかえし周波数をfrHzとする)第2図は
欠陥反射波(F)にノイズ(E)が重畳した場合の包絡
線整流波形を示している。このような波形ではノイズの
ため欠陥反射信号の有無が判別不能となる。しかし、こ
のようなタイミングで連続してノイズがかぶって来るこ
とは統計学上その確率は、連続する回数が増えるに従っ
て急減すると考えられる。第3図において、(a)は欠
陥反射波、(b)はゲートタイミング信号、(c)はゲ
ートを通過した欠陥反射波で、パルス化されている。第
1図に本考案の1実施例の探傷装置の構成図を示す。ゲ
ート1〜ゲートnを通過しパスル化された探傷出力波
は、各々F−V変換器(周波数−電圧変換器)FVに入力
される。n個のF−V変換器FVの出力は各々比較器に接
続されており、更にこれらn個の比較器の出力は、それ
らの論理和をとるオア回路に接続される。例えば、ゲー
トkに入ってくる信号が欠陥によるものであれば、連続
して入って来る為、F−V変換器FVの出力レベルは上昇
し、比較器kの基準レベルを越えて、オア回路ORに検出
信号を出す。もしゲートkに入って来る信号がノイズで
あれば、ノイズは連続して複数回入って来る可能性は低
く、ランダムである為F−V変換器kの出力は比較器k
の基準レベルまで達せず、オア回路には検出信号を出さ
ない。オア回路より出た検出信号はワンショットマルチ
回路に入り、欠陥検出信号をある程度遅延させる。以上
のごとくの原理によりノイズの影響を除去し、欠陥検出
を可能となる。第5図に欠陥検出時の各部タイムチャー
トを示す。Hereinafter, the present invention will be described in detail with reference to illustrated embodiments.
FIG. 4A shows a received signal of the electromagnetic ultrasonic flaw detector,
(B) is the waveform of the rectified envelope. A and C are transmitted waves, and B and D are reflected waves due to defects.
(C) represents the gate timing signal, which is the gate width Δt 1 , Δt 2 , ..., Δt n (all may be equal),
The trigger signal from the flaw detector of (d) is t 1 , t 2 , ..., t n
, And gate channels G 1 , G 2 , ..., G n are opened in order and the signals are addressed in order. Under the condition that the time at which the defect reflected wave appears is almost constant, the number of gates should be as small as possible and the gate width should be as narrow as possible according to the principle of noise removal. In addition, the trigger of (d) is synchronized with the signal, a tone burst wave such as A of (a) is oscillated, and an ultrasonic wave is generated in the subject every 1 / f r (sec). FIG. 2 (repeating frequency is f r Hz) shows an envelope rectified waveform when noise (E) is superimposed on the defect reflected wave (F). With such a waveform, it becomes impossible to determine the presence or absence of a defect reflection signal due to noise. However, it is considered statistically that the probability of continuous noise covering at such a timing sharply decreases as the number of consecutive times increases. In FIG. 3, (a) is a defect reflection wave, (b) is a gate timing signal, and (c) is a defect reflection wave that has passed through the gate, and is pulsed. FIG. 1 shows a block diagram of a flaw detector according to an embodiment of the present invention. The flaw detection output waves that pass through the gates 1 to n and are pulsed are input to an FV converter (frequency-voltage converter) FV. The outputs of the n F-V converters FV are each connected to a comparator, and the outputs of these n comparators are connected to an OR circuit that takes their logical sum. For example, if the signal coming into the gate k is due to a defect, it comes in continuously, so the output level of the FV converter FV rises, exceeds the reference level of the comparator k, and the OR circuit Send a detection signal to OR. If the signal coming into the gate k is noise, it is unlikely that the noise will come in a plurality of times in succession, and since the noise is random, the output of the FV converter k is the comparator k.
It does not reach the reference level of and the detection signal is not output to the OR circuit. The detection signal output from the OR circuit enters the one-shot multi circuit and delays the defect detection signal to some extent. By the principle as described above, the influence of noise can be removed, and the defect can be detected. FIG. 5 shows a time chart of each part when a defect is detected.
本考案は、インパルス的外乱ノイズ等が発生する環境
条件での電磁超音波探傷検査において、前述に示す信号
処理を用いる事により、外乱ノイズ等の除去が可能とな
り且、被検体又は電磁超音波トランスデューサ側が移動
する条件においても、欠陥の存在を電圧出力等で出力が
可能となり、ペンレコーダ等の記録データにより、欠陥
の識別を容易に評価可能となる。The present invention makes it possible to remove disturbance noise and the like by using the above-described signal processing in electromagnetic ultrasonic flaw detection under environmental conditions in which impulse-like disturbance noise and the like are generated, and at the same time, the object or the electromagnetic ultrasonic transducer can be removed. Even under the condition that the side moves, the presence of a defect can be output by a voltage output or the like, and the defect can be easily identified by the recorded data of a pen recorder or the like.
第1図は本考案の1実施例に係る探傷装置のブロック図
であり、第2図は探傷信号の欠陥反射波にノイズが重畳
した波形図であり、第3図はゲートタイミング信号に
て、ゲートを通過した欠陥反射波形図であり、第4図は
探傷信号のタイミング図であり、第5図は本考案の実施
例に係るタイミング図である。FIG. 1 is a block diagram of a flaw detector according to an embodiment of the present invention, FIG. 2 is a waveform diagram in which noise is superimposed on a defect reflection wave of a flaw detection signal, and FIG. 3 is a gate timing signal. FIG. 4 is a defect reflection waveform diagram after passing through a gate, FIG. 4 is a timing diagram of a flaw detection signal, and FIG. 5 is a timing diagram according to an embodiment of the present invention.
フロントページの続き (56)参考文献 特開 昭63−115053(JP,A) 特開 昭61−155856(JP,A) 特開 昭61−91566(JP,A)Continuation of front page (56) Reference JP-A-63-115053 (JP, A) JP-A-61-155856 (JP, A) JP-A-61-91566 (JP, A)
Claims (1)
超音波トランスデューサの発射した超音波の反射波パル
スを周波数−電圧変換回路でパルス数に応じて増加する
電圧に変換し、その出力を比較器で基準レベルと比較し
てそのレベルを越えた信号を検出信号として出力して欠
陥の検出を行うことを特徴とする超音波探傷装置1. A frequency-voltage conversion circuit converts a reflected wave pulse of an ultrasonic wave emitted by an ultrasonic transducer due to a defect passing through a preset gate into a voltage that increases according to the number of pulses, and outputs the output. An ultrasonic flaw detector characterized by detecting a defect by outputting a signal exceeding the reference level as a detection signal in comparison with the reference level.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8441490U JPH089642Y2 (en) | 1990-08-09 | 1990-08-09 | Ultrasonic flaw detector |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8441490U JPH089642Y2 (en) | 1990-08-09 | 1990-08-09 | Ultrasonic flaw detector |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0443257U JPH0443257U (en) | 1992-04-13 |
JPH089642Y2 true JPH089642Y2 (en) | 1996-03-21 |
Family
ID=31632884
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8441490U Expired - Lifetime JPH089642Y2 (en) | 1990-08-09 | 1990-08-09 | Ultrasonic flaw detector |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH089642Y2 (en) |
-
1990
- 1990-08-09 JP JP8441490U patent/JPH089642Y2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0443257U (en) | 1992-04-13 |
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