[go: up one dir, main page]

JPH08316164A - Method of making semiconductor device - Google Patents

Method of making semiconductor device

Info

Publication number
JPH08316164A
JPH08316164A JP11812695A JP11812695A JPH08316164A JP H08316164 A JPH08316164 A JP H08316164A JP 11812695 A JP11812695 A JP 11812695A JP 11812695 A JP11812695 A JP 11812695A JP H08316164 A JPH08316164 A JP H08316164A
Authority
JP
Japan
Prior art keywords
single crystal
semiconductor device
impurities
silicon carbide
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11812695A
Other languages
Japanese (ja)
Inventor
Daisuke Kawase
大助 川瀬
Toshiyuki Ono
俊之 大野
Takayuki Iwasaki
貴之 岩崎
Tsutomu Yao
勉 八尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11812695A priority Critical patent/JPH08316164A/en
Publication of JPH08316164A publication Critical patent/JPH08316164A/en
Pending legal-status Critical Current

Links

Landscapes

  • Recrystallisation Techniques (AREA)
  • Bipolar Transistors (AREA)

Abstract

(57)【要約】 【目的】高耐圧炭化珪素半導体素子作成に必要なプレー
ナ型高耐圧p−n接合形成のための局所的不純物ドーピ
ング方法を提供する。 【構成】SiC基板表面にイオン注入やCVDにより不
純物層を形成した後、高温において水素イオンを照射す
る。 【効果】SiCにおいて拡散層が形成でき、高耐圧のp
n接合が得られる。
(57) [Summary] [Object] To provide a local impurity doping method for forming a planar type high breakdown voltage pn junction necessary for manufacturing a high breakdown voltage silicon carbide semiconductor device. [Structure] After forming an impurity layer on the surface of a SiC substrate by ion implantation or CVD, hydrogen ions are irradiated at a high temperature. [Effect] A diffusion layer can be formed in SiC, and a high breakdown voltage p
An n-junction is obtained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は炭化珪素などのワイドバ
ンドギャップを有する半導体素子の作成方法に関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a wide band gap such as silicon carbide.

【0002】[0002]

【従来の技術】ワイドギャップ半導体は広いバンドギャ
ップを反映して、高絶縁破壊電界,大きな電子の飽和ド
リフト速度など高耐圧,高温素子に適した物性を持つ。
特に、炭化珪素(SiC)には多くの結晶系が存在し、
結晶構造により2.3乃至3.0エレクトロンボルトの禁
制帯幅を有する。また、プロセス的にもp型,n型共に
ドーパントが存在し導電型の制御が可能である。SiC
のドーパントはp型についてはアルミニウム(Al),
ボロン(B),n型に関しては窒素(N),燐(P)が
知られている。また、SiCはSiと同様に熱酸化によ
り良好な絶縁膜が作成可能である。よって、SiCはS
iに変わる半導体素子の構成材料の最有力候補である。
SiCを用いて作成された素子は大電力用素子,高温用
素子,耐放射線素子,光電変換素子その他種々の電子技
術分野への応用が期待される。
2. Description of the Related Art A wide-gap semiconductor reflects a wide bandgap and has physical properties suitable for a high breakdown voltage and a high temperature element such as a high dielectric breakdown electric field and a large saturation drift velocity of electrons.
In particular, silicon carbide (SiC) has many crystal systems,
It has a band gap of 2.3 to 3.0 electron volts due to its crystal structure. Also, in terms of process, both p-type and n-type dopants are present, and the conductivity type can be controlled. SiC
The dopant is aluminum (Al) for p-type,
Regarding boron (B) and n-type, nitrogen (N) and phosphorus (P) are known. Similar to Si, SiC can be formed into a good insulating film by thermal oxidation. Therefore, SiC is S
It is the most promising candidate for the constituent material of the semiconductor device, which is replaced by i.
An element made using SiC is expected to be applied to various electric technical fields such as a high power element, a high temperature element, a radiation resistant element and a photoelectric conversion element.

【0003】[0003]

【発明が解決しようとする課題】SiCはその物性から
高耐圧デバイスに適していることは古くから知られてい
たが、プロセス技術が困難であるためにSiCの優れた
物性を充分に活かしたスイッチングデバイスは作成され
ていない。特に、高耐圧デバイス作成には高耐圧プレー
ナ型p−n接合形成のための局所的不純物ドーピング技
術が必要不可欠である。Siデバイス作成においては局
所的不純物ドーピングに熱拡散が一般的に用いられる
が、SiCは不純物拡散係数が極めて小さく熱拡散には
2000℃近い高温が必要であり、SiCの表面の昇華
を伴う。このために、Siで適用されているような通常
の不純物拡散方法はSiCには適用不可である。よっ
て、局所的不純物ドーピングにはイオン注入法が用いら
れている。しかし、イオン注入法は結晶欠陥の導入を伴
うので高耐圧のp−n接合の形成は困難である(J.App
l.Phys.,63,(1988),922.)。
Although it has been known for a long time that SiC is suitable for a high breakdown voltage device because of its physical properties, it is a switching technique that makes full use of the excellent physical properties of SiC because the process technology is difficult. The device has not been created. In particular, a local impurity doping technique for forming a high breakdown voltage planar type pn junction is indispensable for producing a high breakdown voltage device. Although thermal diffusion is generally used for local impurity doping in the production of Si devices, SiC has an extremely small impurity diffusion coefficient and requires a high temperature close to 2000 ° C. for thermal diffusion, which involves sublimation of the surface of SiC. For this reason, the usual impurity diffusion method as applied to Si cannot be applied to SiC. Therefore, the ion implantation method is used for the local impurity doping. However, since the ion implantation method involves the introduction of crystal defects, it is difficult to form a high breakdown voltage pn junction (J.App.
L. Phys., 63, (1988), 922. ).

【0004】本発明は高耐圧SiCデバイス作成に必要
な高耐圧プレーナ型p−n接合形成のための、局所的不
純物ドーピング法を提供することを目的とする。
It is an object of the present invention to provide a local impurity doping method for forming a high breakdown voltage planar type pn junction necessary for manufacturing a high breakdown voltage SiC device.

【0005】[0005]

【課題を解決するための手段】本発明は上述の問題に鑑
み、炭化珪素単結晶表面にエピタキシャル成長、もしく
はイオン注入法により不純物ドーピングした層を形成し
た後に、前記炭化珪素単結晶を500℃乃至1500℃
に加熱しながら前記表面側から水素イオンまたはγ線を
照射することにより前記不純物ドーピング層から前記炭
化珪素単結晶深部への不純物の拡散を増速させることを
特徴とした炭化珪素半導体素子作成方法である。
In view of the above problems, the present invention is to form a layer doped with impurities by epitaxial growth or ion implantation on the surface of a silicon carbide single crystal, and then subjecting the silicon carbide single crystal to 500 ° C. to 1500 ° C. ℃
By irradiating hydrogen ions or γ-rays from the surface side while heating at a high temperature, the diffusion of impurities from the impurity-doped layer to the deep portion of the silicon carbide single crystal is accelerated. is there.

【0006】[0006]

【作用】不純物の拡散は不純物原子が空孔と位置を交換
することによる移動である。拡散速度は結晶中の空孔の
密度に依存する。結晶の平衡空孔密度は温度に依存し温
度上昇と共に増大する。しかし、SiCはSi−C結合
が強いためにSiでの熱拡散に用いられる1000℃乃
至1200℃の温度域においても平衡空孔濃度は小さく
拡散速度が極めて小さい。
[Operation] Diffusion of impurities is movement due to exchange of positions of impurity atoms with vacancies. The diffusion rate depends on the density of vacancies in the crystal. The equilibrium vacancy density of the crystal depends on the temperature and increases with increasing temperature. However, since SiC has a strong Si—C bond, the equilibrium vacancy concentration is small and the diffusion rate is extremely small even in the temperature range of 1000 ° C. to 1200 ° C. used for thermal diffusion in Si.

【0007】本発明によれば、炭化珪素単結晶表面にエ
ピタキシャル成長、もしくはイオン注入法により不純物
ドーピングした層を形成した後に前記炭化珪素を500
℃乃至1500℃に加熱しながら表面側から水素イオン
またはγ線を照射することによってSiC単結晶中への
過剰な空孔が導入されるため、不純物拡散を増速させる
ことが可能となる。また、選択的なエピタキシャル成
長、もしくはイオン注入により不純物ドーピングした層
を形成した後に、前記炭化珪素単結晶を500℃乃至1
500℃に加熱しながら表面側から水素イオンまたはγ
線を照射することにより局所的なドーピングが可能であ
る。ドーパントにはp型層形成に関してAl,B,n型
層形成に関してN,Pを用いるとよい。
According to the present invention, after forming a layer doped with impurities by epitaxial growth or an ion implantation method on the surface of a silicon carbide single crystal, the silicon carbide is added to 500 times.
By irradiating hydrogen ions or γ-rays from the surface side while heating at 1 ° C to 1500 ° C, excessive vacancies are introduced into the SiC single crystal, so that impurity diffusion can be accelerated. In addition, after the impurity-doped layer is formed by selective epitaxial growth or ion implantation, the silicon carbide single crystal is heated to 500 ° C. to 1 ° C.
From the surface side while heating to 500 ° C, hydrogen ions or γ
Local irradiation is possible by irradiating with a ray. As the dopant, Al, B for forming the p-type layer and N, P for forming the n-type layer may be used.

【0008】水素イオンまたはγ線の照射の際にマスク
を用いて局所的に照射を施すことにより、局所的な拡散
の増速が可能である。また、上述の方法で形成されたp
−n接合は水素イオンの照射条件を制御することにより
不純物の濃度分布を接合界面から半導体素子表面方向に
向かい階段状に精度よく制御できる。
By locally irradiating hydrogen ions or γ-rays using a mask, it is possible to accelerate local diffusion. In addition, p formed by the above method
In the -n junction, the concentration distribution of impurities can be accurately controlled stepwise from the junction interface toward the surface of the semiconductor element by controlling the irradiation conditions of hydrogen ions.

【0009】本発明による不純物ドーピング方法は空孔
と不純物原子の置換を用いているので拡散層の不純物濃
度が1×1019cm-3以上である高濃度が得られる。ま
た、不純物の活性化率は高い。従って、このように形成
されたp−n接合を具備する炭化珪素半導体素子は高耐
圧かつ低抵抗であり、高温においても安定した特性を示
す。
Since the impurity doping method according to the present invention uses substitution of vacancies for impurity atoms, a high impurity concentration of 1 × 10 19 cm −3 or more can be obtained in the diffusion layer. In addition, the activation rate of impurities is high. Therefore, the silicon carbide semiconductor device having the pn junction thus formed has a high breakdown voltage and low resistance, and exhibits stable characteristics even at high temperatures.

【0010】本発明による半導体素子の作成方法は、半
導体材料として炭化珪素を用いた場合において特に有効
であるが、炭化珪素に限らずバンドギャップが2.0e
V 以上であるワイドギャップ半導体、即ちダイヤモン
ドや窒化物のように原子間の結合が強く通常の方法では
拡散が生じにくい半導体材料に関して有効である。
The method for producing a semiconductor device according to the present invention is particularly effective when silicon carbide is used as a semiconductor material, but the band gap is not limited to silicon carbide and has a band gap of 2.0e.
It is effective for a wide-gap semiconductor having V or more, that is, a semiconductor material such as diamond and nitride, which has a strong bond between atoms and is less likely to diffuse by a normal method.

【0011】[0011]

【実施例】【Example】

(実施例1)キャリア濃度2×1018cm-3のn型SiC
単結晶基板(11)上にキャリア濃度1×1016cm-3
n型エピタキシャル層(12)を熱CVDにより形成
後、SiCを1000℃に加熱しながら加速電圧50k
eV,ドーズ量5×1014cm-2の条件でAlのイオン注
入を行う(図1(a))。さらに、SiCを1000℃で
加熱しながら水素イオンを加速電圧15keV,1×1
12cm-2sec-1 で30,60min 照射する(図1
(b))。加速電圧が同じ場合、水素イオンの侵入深さ
はSiの略2/3である。従って、同じ拡散深さを得る
場合、水素イオンの加速電圧は、Siの略1.5 倍とす
る。図2にSIMSによる不純物濃度の深さ方向分布を
示す。照射時間の増大に伴いAlが深さ方向に拡散して
いる。また、ラザフォード後方散乱法(RBS)により
水素イオン照射による結晶ダメージを調べたところ、R
BSより得られた後方散乱強度は完全結晶と同等であっ
た(図3)。反応性イオンエッチング(RIE)により
メサエッチングを行った後に、熱酸化,スパッタ法によ
りSiO2 パッシベーション(17)を形成後、n型側
にNi(18),p型側にAl(16)電極を形成後1
000℃前後で数分間真空中で熱処理する(図1
(c))。図3に本発明により形成したp−n接合のI
−V特性を示す。本発明法を用いて作成したp−n接合
は約1000Vの高耐圧を示す。
(Example 1) n-type SiC having a carrier concentration of 2 × 10 18 cm -3
After the n-type epitaxial layer (12) having a carrier concentration of 1 × 10 16 cm −3 is formed on the single crystal substrate (11) by thermal CVD, the accelerating voltage is 50 k while heating SiC to 1000 ° C.
Ion implantation of Al is performed under the conditions of eV and a dose amount of 5 × 10 14 cm -2 (FIG. 1A). Further, while heating SiC at 1000 ° C., hydrogen ions are accelerated at an acceleration voltage of 15 keV and 1 × 1.
Irradiate at 0 12 cm -2 sec -1 for 30, 60 min (Fig. 1
(B)). When the acceleration voltage is the same, the penetration depth of hydrogen ions is approximately 2/3 of Si. Therefore, in order to obtain the same diffusion depth, the acceleration voltage of hydrogen ions is approximately 1.5 times that of Si. FIG. 2 shows the depthwise distribution of the impurity concentration by SIMS. As the irradiation time increases, Al diffuses in the depth direction. Also, when the crystal damage due to hydrogen ion irradiation was examined by Rutherford backscattering method (RBS), R
The backscattering intensity obtained from BS was similar to that of perfect crystals (Fig. 3). After performing mesa etching by reactive ion etching (RIE), SiO 2 passivation (17) is formed by thermal oxidation and sputtering, and then Ni (18) electrode on the n-type side and Al (16) electrode on the p-type side. After formation 1
Heat treatment in vacuum for several minutes at around 000 ° C (Fig. 1
(C)). FIG. 3 shows the I of the pn junction formed according to the present invention.
The -V characteristic is shown. The pn junction formed using the method of the present invention exhibits a high breakdown voltage of about 1000V.

【0012】なお、水素イオン照射を用いる場合は、加
速電圧によってその侵入深さを制御できるので、拡散深
さを精度よく設定できる。
When hydrogen ion irradiation is used, the penetration depth can be controlled by the acceleration voltage, so that the diffusion depth can be set accurately.

【0013】(実施例2)キャリア濃度2×1018cm-3
のn型SiC単結晶基板(11)上にキャリア濃度1×
1016cm-3のn型エピタキシャル層(12)を熱CVD
により形成後、熱酸化およびスパッタ法によりSiO2
イオン注入マスク(19)を形成する。SiCを100
0℃に加熱しながら加速電圧50keV,ドーズ量5×
1014cm-2の条件でAlのイオン注入を行う(図5
(a))。さらに、SiCを1000℃で加熱しながら水素
イオンを加速電圧15keV,1×1012cm-2sec-1
30,60min 照射する(図5(b))。n型側にNi
(18),p型側にAl(16)電極を形成後1000℃
前後で数分間真空中で熱処理する(図5(c))。本発
明法を用いて作成したプレーナ型p−n接合は1000
V近い高耐圧を示す。
Example 2 Carrier Concentration 2 × 10 18 cm -3
Carrier concentration 1 × on n-type SiC single crystal substrate (11)
Thermal CVD of 10 16 cm -3 n-type epitaxial layer (12)
Formed by SiO 2 by thermal oxidation and sputtering.
An ion implantation mask (19) is formed. SiC 100
While heating to 0 ℃, acceleration voltage 50keV, dose 5 ×
Ion implantation of Al is performed under the condition of 10 14 cm -2 (Fig. 5).
(A)). Further, while heating SiC at 1000 ° C., hydrogen ions are irradiated for 30 and 60 minutes at an acceleration voltage of 15 keV and 1 × 10 12 cm −2 sec −1 (FIG. 5B). Ni on the n-type side
(18), after forming Al (16) electrode on p-type side, 1000 ℃
Heat treatment is performed in a vacuum for several minutes before and after (FIG. 5C). The planar type pn junction formed by using the method of the present invention is 1000
It shows a high breakdown voltage close to V.

【0014】(実施例3)図6に本発明による不純物ド
ーピング方法を用いて作成した静電誘導型ダイオードの
模式図を示す。キャリア濃度2×1018cm-3のn型Si
C単結晶基板(11)上にキャリア濃度1×1016cm-3のn
型エピタキシャル層(12)を熱CVDにより形成す
る。SiCを1000℃に加熱しながら加速電圧50k
eV,ドーズ量5×1014cm-2の条件でAlイオンをマ
スクを通して局所的に注入する。さらに、SiCを10
00℃で加熱しながら1×1012cm-2sec-1 の水素イオ
ンを加速電圧15keV,60min照射する。連続して
加速電圧50keVで60min照射する。接合深さは約
0.7μm となる。熱酸化,スパッタ法によりSiO2
パッシベーション(17)を形成後、カソード側にNi
(18),アノード側にAl(16)を用いて電極を形
成する。本発明により形成されたSiC静電誘導型ダイ
オードは高耐圧,低抵抗で高温においても安定した特性
を示した。
(Embodiment 3) FIG. 6 is a schematic view of an electrostatic induction diode formed by using the impurity doping method according to the present invention. N-type Si with carrier concentration 2 × 10 18 cm -3
N with a carrier concentration of 1 × 10 16 cm -3 on a C single crystal substrate (11)
A type epitaxial layer (12) is formed by thermal CVD. 50k acceleration voltage while heating SiC to 1000 ° C
Al ions are locally implanted through a mask under the conditions of eV and a dose of 5 × 10 14 cm -2 . In addition, SiC 10
While heating at 00 ° C., hydrogen ions of 1 × 10 12 cm −2 sec −1 are irradiated at an accelerating voltage of 15 keV for 60 minutes. Irradiation is continuously performed for 60 minutes at an acceleration voltage of 50 keV. The junction depth is about 0.7 μm. SiO 2 by thermal oxidation and sputtering
After forming the passivation (17), Ni on the cathode side
(18), Al (16) is used to form an electrode on the anode side. The SiC electrostatic induction diode formed by the present invention has high withstand voltage, low resistance, and stable characteristics even at high temperatures.

【0015】[0015]

【発明の効果】本発明により以上説明したように、Si
Cにおいても拡散による局所的な不純物ドーピングが可
能となる。本方法により形成された素子は高耐圧かつ低
抵抗であり、高温においても安定した特性を示す。
As described above according to the present invention, Si
Also in C, local impurity doping due to diffusion becomes possible. The element formed by this method has high withstand voltage and low resistance, and exhibits stable characteristics even at high temperatures.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による不純物ドーピング方法。FIG. 1 shows an impurity doping method according to the present invention.

【図2】不純物の深さ方向分布。FIG. 2 is a depth distribution of impurities.

【図3】結晶性評価。FIG. 3: Crystallinity evaluation.

【図4】p−n接合特性。FIG. 4 shows pn junction characteristics.

【図5】本発明によるプレーナ型p−n接合形成方法。FIG. 5 is a planer type pn junction forming method according to the present invention.

【図6】本発明を用いて作成した静電誘導型ダイオー
ド。
FIG. 6 is an electrostatic induction diode manufactured by using the present invention.

【符号の説明】[Explanation of symbols]

11…SiC単結晶基板、12…SiCエピタキシャル
成長膜、13…不純物ドーピング域、14…Alイオ
ン、15…水素イオン、16…アノード電極(Al)、17
…パッシベーション(SiO2 )、18…カソード電極
(Ni)、19…イオン注入マスク(SiO2 )。
11 ... SiC single crystal substrate, 12 ... SiC epitaxial growth film, 13 ... Impurity doping region, 14 ... Al ion, 15 ... Hydrogen ion, 16 ... Anode electrode (Al), 17
... passivation (SiO 2), 18 ... cathode electrode (Ni), 19 ... ion implantation mask (SiO 2).

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 29/861 H01L 29/91 F (72)発明者 八尾 勉 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. 6 Identification number Internal reference number FI Technical indication location H01L 29/861 H01L 29/91 F (72) Inventor Tsutomu Yao 7-1, Omika-cho, Hitachi-shi, Ibaraki No. 1 Hitachi Ltd. Hitachi Research Laboratory

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】バンドギャップが2.0eV 以上の半導体
単結晶により構成される半導体素子を作成する方法にお
いて、前記単結晶の表面側にエピタキシャル成長もしく
はイオン注入法により不純物ドーピングした層を形成し
た後に、前記半導体単結晶を500℃乃至1500℃に
加熱しながら前記表面側から水素イオンまたはγ線を照
射することにより前記不純物ドーピング層から前記単結
晶深部への不純物を拡散させることを特徴とする半導体
素子の作成方法。
1. A method for producing a semiconductor device composed of a semiconductor single crystal having a bandgap of 2.0 eV or more, which comprises: forming a layer doped with impurities by epitaxial growth or ion implantation on the surface side of the single crystal; A semiconductor device characterized by diffusing impurities from the impurity doping layer to the deep part of the single crystal by irradiating hydrogen ions or γ rays from the surface side while heating the semiconductor single crystal to 500 ° C to 1500 ° C. How to create.
【請求項2】炭化珪素単結晶により構成される半導体素
子を作成する方法において、前記単結晶の表面側にエピ
タキシャル成長もしくはイオン注入法により不純物ドー
ピングした層を形成した後に、前記炭化珪素単結晶を5
00℃乃至1500℃に加熱しながら前記表面側から水
素イオンまたはγ線を照射することにより前記不純物ド
ーピング層から前記単結晶深部へ不純物を拡散させるこ
とを特徴とする半導体素子の作成方法。
2. A method for producing a semiconductor device composed of a silicon carbide single crystal, wherein a layer doped with impurities by epitaxial growth or ion implantation is formed on the surface side of the single crystal, and then the silicon carbide single crystal is formed into
A method of manufacturing a semiconductor device, comprising: diffusing impurities from the impurity doping layer to the single crystal deep portion by irradiating hydrogen ions or γ rays from the surface side while heating at 100 ° C. to 1500 ° C.
【請求項3】請求項2に記載した半導体素子の作成方法
においてAl,B,N,Pのいずれかをドーパントとし
て用いることを特徴とする半導体素子の作成方法。
3. The method for producing a semiconductor element according to claim 2, wherein any one of Al, B, N and P is used as a dopant.
【請求項4】請求項2から3に記載した半導体素子の作
成方法において所定の部分に選択的にエピタキシャル成
長、もしくはイオン注入法等により不純物ドーピングし
た層を形成した後に、前記炭化珪素単結晶を500℃乃
至1500℃に加熱しながら水素イオンまたはγ線を照
射することにより不純物の拡散を増速させ、前記の所定
の部分から前記単結晶深部へ選択的に不純物をドーピン
グすることを特徴とする半導体素子の作成方法。
4. The method for producing a semiconductor device according to claim 2, wherein after a layer doped with impurities is selectively formed on a predetermined portion by epitaxial growth or ion implantation, the silicon carbide single crystal is formed into 500 Semiconductors characterized by accelerating the diffusion of impurities by irradiating hydrogen ions or γ-rays while heating at ℃ to 1500 ℃, and selectively doping impurities from the predetermined portion to the single crystal deep portion. How to make a device.
【請求項5】請求項2から4に記載した半導体素子作成
方法において、炭化珪素半導体単結晶表面の所定の部分
にのみ水素イオンまたはγ線を照射することにより炭化
珪素半導体単結晶の所定の部分に不純物を拡散させるこ
とを特徴とする半導体素子の作成方法。
5. The method for producing a semiconductor device according to any one of claims 2 to 4, wherein a predetermined portion of the silicon carbide semiconductor single crystal is irradiated with hydrogen ions or γ-rays only on a predetermined portion of the surface. A method of manufacturing a semiconductor device, characterized in that impurities are diffused into the semiconductor.
【請求項6】請求項2から5に記載された炭化珪素半導
体素子作成方法において拡散層の不純物濃度が1×10
19cm-3以上であることを特徴とするp−n接合。
6. The method of manufacturing a silicon carbide semiconductor device according to claim 2, wherein the impurity concentration of the diffusion layer is 1 × 10.
A pn junction having a size of 19 cm -3 or more.
JP11812695A 1995-05-17 1995-05-17 Method of making semiconductor device Pending JPH08316164A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11812695A JPH08316164A (en) 1995-05-17 1995-05-17 Method of making semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11812695A JPH08316164A (en) 1995-05-17 1995-05-17 Method of making semiconductor device

Publications (1)

Publication Number Publication Date
JPH08316164A true JPH08316164A (en) 1996-11-29

Family

ID=14728690

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11812695A Pending JPH08316164A (en) 1995-05-17 1995-05-17 Method of making semiconductor device

Country Status (1)

Country Link
JP (1) JPH08316164A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002508888A (en) * 1997-06-03 2002-03-19 ダイムラークライスラー アクチエンゲゼルシャフト Power semiconductor component and method of manufacturing the same
JP2003303966A (en) * 2002-04-11 2003-10-24 Matsushita Electric Ind Co Ltd Semiconductor device and method of manufacturing the same
US7067361B2 (en) * 2000-05-10 2006-06-27 Cree, Inc. Methods of fabricating silicon carbide metal-semiconductor field effect transistors
JP2008112842A (en) * 2006-10-30 2008-05-15 Sumitomo Electric Ind Ltd Method for doping silicon carbide and method for manufacturing silicon carbide semiconductor device
US9117739B2 (en) 2010-03-08 2015-08-25 Cree, Inc. Semiconductor devices with heterojunction barrier regions and methods of fabricating same
US9231122B2 (en) 2011-09-11 2016-01-05 Cree, Inc. Schottky diode
KR102217844B1 (en) * 2019-10-02 2021-02-18 포항공과대학교 산학협력단 Hydrogen storage substrate and a device with the same

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002508888A (en) * 1997-06-03 2002-03-19 ダイムラークライスラー アクチエンゲゼルシャフト Power semiconductor component and method of manufacturing the same
US7067361B2 (en) * 2000-05-10 2006-06-27 Cree, Inc. Methods of fabricating silicon carbide metal-semiconductor field effect transistors
JP2003303966A (en) * 2002-04-11 2003-10-24 Matsushita Electric Ind Co Ltd Semiconductor device and method of manufacturing the same
JP2008112842A (en) * 2006-10-30 2008-05-15 Sumitomo Electric Ind Ltd Method for doping silicon carbide and method for manufacturing silicon carbide semiconductor device
US9117739B2 (en) 2010-03-08 2015-08-25 Cree, Inc. Semiconductor devices with heterojunction barrier regions and methods of fabricating same
US9595618B2 (en) 2010-03-08 2017-03-14 Cree, Inc. Semiconductor devices with heterojunction barrier regions and methods of fabricating same
US9231122B2 (en) 2011-09-11 2016-01-05 Cree, Inc. Schottky diode
US9865750B2 (en) 2011-09-11 2018-01-09 Cree, Inc. Schottky diode
KR102217844B1 (en) * 2019-10-02 2021-02-18 포항공과대학교 산학협력단 Hydrogen storage substrate and a device with the same

Similar Documents

Publication Publication Date Title
US6096627A (en) Method for introduction of an impurity dopant in SiC, a semiconductor device formed by the method and a use of a highly doped amorphous layer as a source for dopant diffusion into SiC
CN101114593B (en) Method for improving the quality of an SiC crystal and SiC semiconductor device
US5804483A (en) Method for producing a channel region layer in a sic-layer for a voltage controlled semiconductor device
US5318915A (en) Method for forming a p-n junction in silicon carbide
JP3684962B2 (en) Manufacturing method of semiconductor device
JP4463448B2 (en) SiC substrate and method of manufacturing SiC semiconductor device
CN102194885A (en) N-type buried-channel silicon carbide metal oxide semiconductor field effect transistor (DEMOSFET) device and preparation method thereof
US5030580A (en) Method for producing a silicon carbide semiconductor device
WO1996032737A1 (en) METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR LAYER OF SiC
CN111048580A (en) A silicon carbide insulated gate bipolar transistor and method of making the same
JP4862207B2 (en) Manufacturing method of semiconductor device
US6649981B2 (en) High breakdown voltage semiconductor device
US3457632A (en) Process for implanting buried layers in semiconductor devices
US6703294B1 (en) Method for producing a region doped with boron in a SiC-layer
US10566198B2 (en) Doping method
JP2008034464A (en) Method for manufacturing semiconductor device
JPH08316164A (en) Method of making semiconductor device
EP0386085A1 (en) Mosfet in silicon carbide
JP3635956B2 (en) Method for manufacturing silicon carbide Schottky barrier diode
JP4042336B2 (en) Silicon carbide semiconductor element
US11495663B2 (en) Semiconductor device including insulated gate bipolar transistor, diode, and current sense regions
JP4029466B2 (en) Method for manufacturing silicon carbide semiconductor device
JP2002359373A (en) Semiconductor device and its manufacturing method
JP4320810B2 (en) Method for manufacturing silicon carbide semiconductor device
JPH0770695B2 (en) Method for manufacturing silicon carbide semiconductor device