JPH0830750A - Method and device for judging capacity of memory card - Google Patents

Abstract

PURPOSE:To easily judge a memory capacity even for a memory card or the like on a manufacturing line to which card attribute information is not recorded yet by judging the capacity of the memory card based on an address where read is performed when read data and specified data match. CONSTITUTION:Without accessing the entire memory space within the memory card, the data are read from the memory area of the memory card at every prescribed address interval, the specified data which do not appear in the entire data read at every prescribed address interval are set and thereafter, the read data and the specified data are successively compared. That is, a D1 detection circuit 27 compares the read data with the specified data stored in a D1 storage circuit 26. Then, when both do not match, the specified data are written in the address where the read is performed. Thus, the address where the read is performed when the read data and the specified data match corresponds to the capacity of the memory card.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory card capacity determination method and device for determining the capacity of a so-called memory card, for example.

[0002]

2. Description of the Related Art Conventionally, so-called memory cards have a memory controller and a semiconductor memory, for example, arranged in a card-shaped case, and read (or write) various data and programs stored in the semiconductor memory. And read) control is performed by the memory controller in response to an external request or the like.

As a semiconductor memory, for example, a static RAM (Static Random Access Memory, hereinafter referred to as SRAM) is used as a memory card, and there is a memory card as shown in FIG.

In the memory card 1 shown in FIG. 4, an SRAM 3 composed of a plurality of memory cells, a connector 6 for connecting to an external device, and data and address between the external device and the connector 6 are provided. A memory controller 2 for transmitting and receiving various kinds of information such as, and controlling writing / reading of data to / from the SRAM 3 is arranged as a main component. In addition to these main components,
For example, a write protect switch 5 for preventing accidental writing to the SRAM 3 and a backup controller 4 for backup are provided.
Further, the memory controller 2 is provided with an address decoder 7 that decodes the address information supplied via the address bus into the address data for the internal SRAM 3.

CE in the drawing of FIG. 4 is an input terminal of a card enable signal, and the card enable signal is a low active signal for card selection for activating a memory card. Further, in the figure, OE is an input terminal of an output enable signal, and the output enable signal is a low active (inactive during data writing) signal for controlling data output. In the figure, WE is a write enable signal input terminal, and the write enable signal is a low active signal for controlling data writing. In the figure, WP is an output terminal of a write protect signal, which becomes "H level" when the write protect switch 5 is ON, and new data including a command cannot be written during this period. In the figure, REG is an input terminal for the attribute memory select signal,
The attribute memory select signal is "L level"
When set to, the attribute memory space is selected. In the figure, BVD1. BVD2 is an output terminal for a battery voltage detection signal, and the battery voltage detection signal is a signal indicating the voltage state of the backup primary battery. In the figure, CD1 and CD2 are output terminals for card detection signals and are connected to the ground (GND) inside the card, and are used to detect insertion / removal of the card on the system side. Others, Vc in the figure
c is an operating power supply terminal of the card, and GND is a ground terminal in the figure.

[0006]

By the way, a data string called card attribute information (CIS: Card Information Structure) is stored in the memory space in the memory card as described above. In this card attribute information, parameters necessary for operating the memory card including the memory capacity are described.

[0007] The card attribute information is important in the memory card system. Therefore, a memory card lacking the card attribute information, that is, a memory card in which the card attribute information is not yet recorded on the manufacturing line, or a user A memory card whose card attribute information is accidentally erased cannot be used in a normal memory card system.

In a general memory card,
In order to simplify the memory controller 2, a plurality of addresses are assigned to one memory cell. Therefore, for example, the memory capacity cannot be determined by simply reading or writing the memory cell assigned to a certain address. That is, for example, A
Address information represented by 0 to A25 is supplied, and A23
The memory map for an 8-megabyte (MB) memory card in which the upper address bits of A25 are not used for address decoding is as shown in FIG.
The area represented by 0 to A22 has the address "000000."
It is changed from "h" to "7FFFFFh", but here, addresses "800000h", "1000000h", ...
Accessing the address instead of invalid data
The data of "000000h" will be read out. Therefore, if the method of judging the memory capacity by simply reading / writing the memory cell assigned to a certain address is adopted, all memory cards can be read. Will be erroneously recognized as a full capacity of 64 MB, for example.

Therefore, the present invention has been proposed in view of the above situation, and a memory card in which the card attribute information is not yet recorded on the manufacturing line, or the user mistakenly deletes the card attribute information. It is an object of the present invention to provide a memory card capacity determination method and device that can easily determine the memory capacity even if the memory card has been destroyed.

[0010]

DISCLOSURE OF THE INVENTION The present invention has been proposed in order to achieve the above-mentioned object, and reads data from a memory area of a memory card at predetermined address intervals, and at every predetermined address interval. After setting specific data that does not appear in all the read data, the data is read at predetermined address intervals in the memory area and sequentially compared with the specific data, and when the read data and the specific data do not match, The specific data is written to the read address, and the capacity of the memory card is determined based on the read address when the read data and the specific data match.

In the memory card capacity determination method of the present invention, the data read from the memory area at predetermined address intervals is stored. Further, the predetermined address interval is an interval divisible by all addresses according to the maximum memory capacity of the memory card. Further, in the memory card capacity determination method of the present invention, the capacity of the memory card is determined based on the address even when writing of the specific data into the memory area of the read address becomes impossible. .

Next, the memory card capacity determination device of the present invention is based on address setting means for setting address information at predetermined address intervals and address information at predetermined address intervals set by the address setting means. Means for reading data from the memory area of the memory card, specific data setting means for setting specific data that does not appear in all the read data at the predetermined address intervals, and a predetermined area of the memory area by the reading means. The comparing means for sequentially comparing the data read at each address interval with the specific data, and when the read data and the specific data do not match in the comparison by the comparing means, the specific address is read. In the comparison between the writing means for writing data and the comparing means, When the the viewing out data and the specific data match based on the address subjected to the read, and having a determining means for determining capacity of the memory card.

Here, the memory card capacity determination device of the present invention is further provided with storage means for storing data read from the memory area by the reading means at predetermined address intervals. Further, the address setting means sets, as the predetermined address interval, an interval divisible by all addresses according to the maximum memory capacity of the memory card. Further, the memory card capacity determination device of the present invention is also provided with a confirmation means for confirming the writing of the specific data in the memory area, so that the writing of the specific data in the memory area of the read address can be performed. When the confirmation means detects that the memory card is impossible, the determination means also determines the capacity of the memory card based on the address.

[0014]

According to the present invention, instead of accessing the entire memory space in the memory card, the data is read from the memory area of the memory card at predetermined address intervals, and all the data read at these predetermined address intervals. Specific data that does not appear in the memory area is set, then the data is read at specified address intervals in the memory area and sequentially compared with the specific data. When the read data and the specific data do not match, the read address is set to the read address. Write specific data. As a result, when the read data and the specific data match, the read address corresponds to the capacity of the memory card.

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows the flow of capacity determination processing by the memory card capacity determination method of the present invention. The method for determining the capacity of a memory card according to the present invention is, for example, a memory of a memory card 1 which is a measurement target of an inspection, measurement device, program device, etc. of the memory card 1 in a manufacturing line of the memory card 1 as shown in FIG. This is a capacity determination method used when automatically setting the capacity or when automatically recognizing the memory capacity of the memory card 1 in which the card attribute information has disappeared in a device having a memory card slot for general use. Further, FIG. 2 shows a memory map of the memory card used for explaining the method of determining the capacity of the memory card of the present invention. In the following example, the case where the capacity of the memory card is 512 kilobytes (kB) will be described.

First, in FIG. 1, in step S1, a capacity measurement resolution for measuring the capacity of the memory card is selected. The capacity measurement resolution is, for example, 8 kB, 1
6kB, 32kB, 64kB, 128kB etc. can be mentioned. Note that these capacity measurement resolutions include the total memory capacity (64M) of memory cards currently on the market.
It is preferable to use a divisible value for B),
Further, in consideration of the time required for the capacitance measurement, the capacitance measurement resolution is 128 kB in this embodiment. That is,
By using the divisible value, it is possible to reduce the error in determining the memory capacity (eliminate the undivisible remainder), and to reduce the time required for the capacity determination by setting it to 128 kB, for example.

Next, in step S2, the address of, for example, the SRAM of the memory card is set to "0000" at the beginning.
Then, in step S3, the data of the set address is read from the memory card and stored.

In steps S4 and S5, an address of 128 kB is added to the already set address, and this address corresponds to the above 64 MB, for example. "
It is determined whether or not the address has reached 4000000h ", and if the address has not reached" 4000000h ", the process of returning to step S3 is repeated.
4 MB may be larger, and in this case, the address is also larger.

That is, the above steps S1 to S
The process up to 5 will be described purely with reference to FIG. 2 as an example. When the capacity measurement resolution is set to 128 kB in step S1, the start address "000" is set in step S2.
00h "is set, and in the next step S3, the data d0 on the memory at the address" 00000h "is read and stored. In the next step S4, the address" 0 "is read.
Address "20" which is 128kB away from "0000h"
000h "is set, and the address is still in step S5"
Since it is not 4000000h ”, step S3
Return to At this time, in step S3, the address "
The data d1 on the memory of 20000h "is read and stored. Similarly, the data d2, d3, ... On the memory are read and stored every 128 kB, and the maximum capacity of the memory card is 64 MB. Up to the address "4000000h" corresponding to, the data of addresses that can be read from the memory is read and stored.

As described above, the address "400000"
Address is set every 128kB until 0h ",
After the data at the readable address is read and stored, the process proceeds to step S6. In this step S6, a numerical value (data D that does not exist in each data d0, d1, d2, ...
Determine 1). At this time, the data d0, d1, d2, ...
Is, for example, 8-bit data, and all the values represented by the 8-bit data are the data d0, d1, d2.
.., that is, when the data D1 (numerical value that does not exist) cannot be determined with 8 bits, the data adjacent to the data d0, d1, d2 ,. The total 16 bits determine the nonexistent numerical value.

In the next step S7, the data D1 is written in the address "00000h" of the memory.

In the next steps S8 and S9, an address of 128 kB is added to the address in which the data D1 is written, and this address becomes "4000000."
It is determined whether or not h "has been reached.

In step S9, the address is "4".
If it is determined that the data has not reached 000000h ", the data in the memory at the address to which 128 kB has been added is read again in step S11, and the next step S1
In step 2, it is determined whether the data read in step S11 matches the data D1.

When it is determined in step S12 that the data read in step S11 does not match the data D1, the data D1 is written in the address in step S13, and the data D1 is written in the address in the next step S14. It is judged whether or not it has been written.

If it is determined in step S14 that the data D1 has been written, the process returns to step S8.

That is, in the processing from step S6 to step S14 described above, the data D1 different from the above data d0, d1, d2, ... Writing is done sequentially. To explain using the example of FIG. 2, for example, after writing the data D1 to the address “00000h”, the data from the address “00000h” to 12
The data d1 on the memory at the address "20000h" separated by 8 kB is read out, and this data d1 and the data D
When comparing 1 and it is determined that these do not match,
The data D1 is written in the address "20000h". Similarly, the data at the next address 128 kilobytes apart is read out, compared with the data D1, and if the data does not match the data D1, the process of writing the data D1 is repeated.

In the loop from step S8 to step S14, when it is determined that the data read from the memory in step S12 matches the data D1, the process proceeds to step S15, and the data read from the memory in step S15. And the above data D1
The capacity of the memory card is obtained from the position of the storage area (the position from the beginning of the memory) corresponding to the current address where and match, and the process ends.

For example, if the capacity of the memory card is 512
If it is kB, when the loop from step S8 to step S14 is repeated, the address becomes "
At 80000h ", the data read from the memory coincides with the data D1. Therefore, the address" 80000h ", that is, 512 kB converted into the number of bytes becomes the capacity of the memory card.

Here, for example, in the case of a memory card of the type which also decodes the upper address irrelevant to its own memory space described in the above-mentioned conventional example, even if the above-mentioned processing is performed, the address "80000h" Although the data read from "does not match the above data D1,
In the case of this memory card, it is not possible to newly write data (write the data D1) to the address "80000h", so that it is determined as NO in the above step S14, and thus the process proceeds to step S15 and the memory card The capacity is still the capacity corresponding to the address "80000h", that is, 512 kB.

In addition, in the middle of the capacity determination of the memory card which sequentially performs the address addition of 128 kB in step S8, the address is changed to "40000" in step S9.
If it reaches "00h", the process proceeds to step S10, and the processing of capacity determination is stopped because the card itself is defective.

Further, in the above description, when the capacity of the memory card is determined, the data d1, d2, d3, ... That have been previously written at the addresses of 128 kB are sequentially rewritten to the data D1. However, if these data d1, d2, d3, ... Are necessary data, these data are stored and each is written in the storage area of the original address after the capacity determination of the memory card. It is also possible.

Next, a capacity determination device of an embodiment of the present invention which realizes the above-described capacity determination method for a memory card of the present invention will be described with reference to FIG.

That is, as shown in FIG. 3, the memory card capacity determination device according to the present embodiment has a predetermined address interval (for example, 128 kB, 16 kB, 32 kB, 6 described above).
Measurement resolution input means 10 and address setting unit 11 for setting address information for each 4 kB), and for the memory card of the capacity determination card 13 based on the address information for each predetermined address interval set by the address setting unit 11. A data read control circuit 29 as a read means for reading data from a memory area (for example, SRAM), a read data memory 14 for storing the data read at each of the predetermined addresses, and all the data read at the predetermined address intervals. Data (d1, d2, d3, ...
Etc.), the D1 determining circuit 25 of the D1 setting unit 15 which is the specific data setting means for setting the specific data (the data D1), and the address setting unit 11 and the data read control circuit 29 are used to determine the predetermined area of the memory area. The D1 detection circuit 27 as a comparison means for sequentially comparing the data read at each address interval with the specific data D1 stored in the D1 storage circuit 26, and the D1 detection circuit 27.
When the read data and the specific data D1 do not match in the comparison in step 1, the data write control circuit 28 which is a writing means for writing the specific data D1 stored in the D1 storage circuit 26 to the read address, When the read data and the specific data D1 match in the comparison in the D1 detection circuit 27, the capacity of the memory card is determined based on the read address, and the specific data D1 to the memory area is determined. Card capacity determination circuit that is a determination means that determines the capacity of the memory card based on the address even when the D1 write confirmation circuit 30, which is a confirmation means for confirming the writing of the data, detects that the specific data cannot be written. It is characterized by having 18 and.

That is, in FIG. 3, the capacity measurement resolution at the time of measuring the capacity of the memory card in the step S1 is selectively input from the measurement resolution input means 10. The capacitance measurement resolution is input by a user, for example, or by inputting a value preset in the measurement resolution input means 10. In the following description, it is assumed that the resolution of 128 kB is input.

The capacity measurement resolution information from the measurement resolution input means 10 is sent to the address setting section 11.

When the capacity measurement resolution information is supplied, the address adder circuit 21 of the address setting section 11 receives, for example, 0, 128, 256, according to the capacity measurement resolution.
, 384, ..., Addition information corresponding to each 128 kB is output and sent to the address generation circuit 23.

When the first addition information from the address addition circuit 21 is input to the address generation circuit 23,
As in step S2, first, the head address "00000h" of the capacity determination card 13 which is the memory card, for example, the SRAM is set, and this address "
"00000h" is sent to the capacity determination card 13. After that, the address generating circuit 23 causes the step S3.
As described above, according to the addition information from the address addition circuit 21, the information of the address corresponding to each 128 kB is sent to the capacity determination card 13.

Further, the address information from the address generation circuit 23 is also sent to the maximum address value detection circuit 24. In the maximum address value detection circuit 24, the information of the address is, for example, as in step S5. 64
It is detected whether or not the address "4000000h" corresponding to the MB has been reached. This address maximum value detection circuit 24
When the maximum value of the address corresponding to 64 MB is detected at, the detection output is sent to the address reset circuit 22.

When the detection output is supplied, the address reset circuit 22 outputs an address reset signal for resetting the address generation circuit 23. As a result, in the address generation circuit 23, the generated address is "
Is reset to 00000h ".

Further, the capacity determination card 13 to which the address information is supplied as described above is brought into a data read state by the data read control circuit 29, and the address information from the address generation circuit 23 is responded to. Data is read from the storage area of the SRAM. The data read from the capacity determination card 13 is sent to the read data memory 14, and the data read from the card 13 is stored in the memory 14 as in step S3.

In the read data memory 14, the above 1
When all the data read from the storage area of the SRAM corresponding to 28 kB is stored, the respective data are sent to the D1 determining circuit 25 of the D1 setting unit 15.

The D1 deciding circuit 25 decides the data D1 as in step S6, by looking at each data supplied from the read data memory 14. The data D1 determined by the D1 determination circuit 25 is sent to the D1 storage circuit 26 and stored therein.

The data D1 read out after being stored in the D1 storage circuit 26 is the write / read control unit 1.
6 to the data write control circuit 28. The data write control circuit 28 writes the data D1 into the capacity determination card 13, and at this time, the address supplied from the address generation circuit 23 to the card 13 is the address after the reset. 0000
Since it is 0h ", the data D1 is written in the address" 00000h "as in step S7.

After writing the data D1 to the address "00000h", the address generation circuit 23 sequentially supplies the addresses corresponding to each 128 kB. At this time, the data of the address corresponding to each 128 kB is read from the capacity determination card 13 based on the read control signal from the data read control circuit 29, and the read data is sent to the D1 detection circuit 27. To be

The D1 detection circuit 27 is supplied with the data D1 from the D1 storage circuit 26. Therefore, the D1 detection circuit 27 compares the data read from the card 13 with the data D1 as in step S12, and when these data do not match,
By outputting the data D1 from the D1 storage circuit 26, each of the 12 items of the SRAM of the capacity determination card 13 is output.
The data D1 is sequentially written to the address corresponding to each 8 kB.

As described above, the data D1 is sequentially written in the capacity determination card 13 and each 128 k
Data is read from the address corresponding to each B, and when the D1 detection circuit 27 detects that the data read from the capacity determination card 13 matches the data D1, the D1 detection circuit 27 concerned. From the above, information indicating the match is sent to the card capacity determination circuit 18.

Based on the address information from the address generation circuit 23 and the information indicating the coincidence supplied from the D1 detection circuit 27, the card capacity determination circuit 18 determines, as in step S15, The card capacity of the capacity determination card 13 is determined. In the example of FIG. 1 described above, it is determined to be 512 kB.

The write control signal from the data write control circuit 28 and the data D1 from the D1 storage circuit 26 are also sent to the D1 write confirmation circuit 30. The D1 write confirmation circuit 30 confirms the writing of the data D1 to the capacity determination card 13 based on the write control signal and the data D1. When the data D1 cannot be written to the card 13, the step S14 is performed. As described above, the information to that effect is sent to the card capacity determination circuit 18.

Further, the card capacity determination circuit 18 is also supplied with the detection output of the maximum address value from the maximum address value detection circuit 24. Therefore,
When the address output from the address generation circuit 23 reaches "4000000h" in the middle of the card capacity determination of the capacity-determined card 13, the card capacity determination circuit 18 determines that the address of the capacity-determined card 13 is "4000000h". Since the capacity determination card 13 itself is defective, the capacity determination process is stopped.

Thereafter, the card capacity judgment circuit 18 concerned
For example, when the capacity of the capacity determination card 13 can be determined, the card capacity display means 17 such as a liquid crystal display device displays the card capacity, and when the card 13 is defective, the fact is displayed.

The system controller 12 also controls each component according to a preset program.

Also in the configuration of FIG. 3, the data d1, d2, d3, ... That have been previously written to the addresses of 128 kB of the SRAM of the capacity determination card 13 are sequentially rewritten to the data D1. However, if these data d1, d2, d3, ... Are necessary data, these data stored in the read data memory 14 are stored in the read data memory 14 after the capacity determination of the capacity determination card 13.
It is also possible to write each in the storage area of the original address.

From the above, the method and apparatus for determining the capacity of the memory card according to the present embodiment, when measuring and inspecting a card in which the card attribute information is not written in the production line of the memory card, etc. It is not necessary for a person to set the card capacity, and labor can be saved. Further, by mounting the judgment algorithm of the capacity judgment method of the present invention on the host computer used by the user of the memory card, even a card in which the card attribute information regarding the card capacity is erroneously erased can be used.

Further, for example, in a computer,
Normally, the operation check of the RAM installed at startup is performed and its memory capacity is recognized, but the operation check is omitted and the memory capacity of the RAM is recognized by the memory capacity determination method of the present invention described above. If this is the case, the startup time can be shortened.

[0056]

As described above, in the present invention, instead of accessing the entire memory space in the memory card, data is read from the memory area of the memory card at predetermined address intervals, and at each predetermined address interval. Set specific data that does not appear in all the read data, then read the data at every predetermined address interval of the memory area and compare with the specified data sequentially, and read when the read data and the specified data do not match Write the specific data to the address where As a result, when the read data and the specific data match, the read address corresponds to the capacity of the memory card, and therefore, for example, a memory card that has not yet recorded card attribute information on the manufacturing line. Alternatively, even if the user accidentally erases the card attribute information, the memory capacity can be easily determined in a short time.

[Brief description of drawings]

FIG. 1 is a flowchart showing a processing flow of a memory card capacity determination method of the present invention.

FIG. 2 is a diagram for explaining a position for reading data from a memory card and a position for writing specific data.

FIG. 3 is a block circuit diagram showing a schematic configuration of a memory card capacity determination device according to an embodiment of the present invention.

FIG. 4 is a block circuit diagram briefly showing an internal configuration of a memory card.

FIG. 5 is a diagram for explaining a capacity of a memory area in a memory card.

[Explanation of symbols]

 10 measurement resolution input means 11 address setting section 12 system controller 13 capacity judgment card 14 read data memory 15 D1 setting section 16 write / read control section 17 card capacity display means 18 card capacity judgment circuit 21 address addition circuit 22 address reset circuit 23 Address generation circuit 24 Address maximum value detection circuit 25 D1 determination circuit 26 D1 storage circuit 27 D1 detection circuit 28 Data write control circuit 29 Data read control circuit 30 D1 write confirmation circuit

Claims (8)

[Claims] 1. A method for reading data from a memory area of a memory card at a predetermined address interval, setting specific data that does not appear in all the read data at a predetermined address interval, and then setting a predetermined address interval of the memory area. The data is read for each and sequentially compared with the specific data. When the read data and the specific data do not match, the specific data is written to the read address, and the read data and the specific data match. A method for determining the capacity of a memory card, characterized in that the capacity of the memory card is determined based on the read address at the time. 2. The method for determining the capacity of a memory card according to claim 1, wherein the data read from the memory area at predetermined address intervals is stored. 3. The capacity determination method for a memory card according to claim 1, wherein the predetermined address interval is an interval that is divisible by all addresses according to the maximum memory capacity of the memory card. 4. When the writing of the specific data into the memory area of the read address becomes impossible, the capacity of the memory card is determined based on the address. The memory card capacity determination method according to claim 3. 5. An address setting means for setting address information for each predetermined address interval, and a reading means for reading data from a memory area of a memory card based on the address information for each predetermined address interval set by the address setting means. Specific data setting means for setting specific data that does not appear in all the read data at the predetermined address intervals, and data read by the reading means at predetermined address intervals of the memory area sequentially. Comparing means for comparing with the specific data; writing means for writing the specific data to the read address when the read data and the specific data do not match in the comparison by the comparing means; In the comparison, the read data matches the specified data. When the is based on an address issued the read capacity determining apparatus for a memory card, characterized in that it comprises a determination means for determining the capacity of the memory card. 6. The capacity determining device for a memory card according to claim 5, further comprising storage means for storing data read by the reading means from the memory area at predetermined address intervals. 7. The address setting means sets, as the predetermined address interval, an interval divisible by all addresses according to the maximum memory capacity of the memory card. Memory card capacity determination device. 8. A confirming means for confirming the writing of the specific data to the memory area is provided, and the confirming means detects that the specific data cannot be written to the memory area of the read address. 8. The memory card capacity determination device according to claim 5, wherein the determination means determines the capacity of the memory card based on the address.