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JPH08307025A - Wiring board and manufacturing method thereof - Google Patents

Wiring board and manufacturing method thereof

Info

Publication number
JPH08307025A
JPH08307025A JP11294495A JP11294495A JPH08307025A JP H08307025 A JPH08307025 A JP H08307025A JP 11294495 A JP11294495 A JP 11294495A JP 11294495 A JP11294495 A JP 11294495A JP H08307025 A JPH08307025 A JP H08307025A
Authority
JP
Japan
Prior art keywords
particle size
thermosetting resin
wiring board
powder
metal powder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11294495A
Other languages
Japanese (ja)
Other versions
JP3292624B2 (en
Inventor
Naohiro Katori
直広 鹿取
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP11294495A priority Critical patent/JP3292624B2/en
Publication of JPH08307025A publication Critical patent/JPH08307025A/en
Application granted granted Critical
Publication of JP3292624B2 publication Critical patent/JP3292624B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

(57)【要約】 【目的】欠けや割れ等の発生を有効に防止するとともに
配線導体の電気抵抗を低抵抗として半導体素子等を外部
電気回路に確実に電気的接続することができる配線基板
を提供することにある。 【構成】60乃至95重量%の無機絶縁物粉末と5乃至
40重量%の熱硬化性樹脂とから成り、前記無機絶縁物
粉末を前記熱硬化性樹脂により結合した絶縁基体1に、
粒径0.05μm未満の金属粉末及び粒径0.05μm
以上の金属粉末を熱硬化性樹脂樹脂により結合した配線
導体2を被着させた。
(57) [Abstract] [Purpose] To provide a wiring board capable of effectively preventing the occurrence of chipping or cracking and making the electric resistance of the wiring conductor low to reliably electrically connect a semiconductor element or the like to an external electric circuit. To provide. [Structure] An insulating substrate 1 comprising 60 to 95% by weight of an inorganic insulating powder and 5 to 40% by weight of a thermosetting resin, wherein the inorganic insulating powder is bonded by the thermosetting resin.
Metal powder with a particle size of less than 0.05 μm and particle size of 0.05 μm
The wiring conductor 2 in which the above metal powders were bonded by a thermosetting resin was applied.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体素子を収容する
ための半導体素子収納用パッケージや混成集積回路基板
等に用いられる配線基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board used for a semiconductor element housing package for housing semiconductor elements, a hybrid integrated circuit board and the like.

【0002】[0002]

【従来の技術】従来、配線基板、例えば半導体素子を収
容する半導体素子収納用パッケージに使用される配線基
板として比較的高密度の配線が可能な積層セラミックス
配線基板が多用されている。この配線基板は、酸化アル
ミニウム質焼結体等のセラミックスより成り、その上面
中央部に半導体素子を収容する凹部を有する絶縁基体
と、前記絶縁基体の凹部周辺から下面にかけて導出され
たタングステン、モリブデン等の高融点金属粉末から成
る配線導体とから構成されており、前記絶縁基体の凹部
底面に半導体素子をガラス、樹脂、ロウ材等の接着剤を
介して接着固定するとともに該半導体素子の各電極を例
えばボンディングワイヤ等の電気的接続手段を介して配
線導体に電気的に接続し、しかる後、前記絶縁基体の上
面に、金属やセラミックス等から成る蓋体を絶縁基体の
凹部を塞ぐようにしてガラス、樹脂、ロウ材等の封止材
を介して接合させ、絶得基体の凹部内に半導体素子を気
密に収容することによって製品としての半導体装置とな
る。
2. Description of the Related Art Hitherto, as a wiring board, for example, a wiring board used in a semiconductor element housing package for housing a semiconductor element, a laminated ceramic wiring board capable of relatively high-density wiring has been widely used. This wiring board is made of ceramics such as aluminum oxide sintered body and has an insulating base having a recess for accommodating a semiconductor element in the center of the upper surface thereof, and tungsten, molybdenum, etc. led out from the periphery of the recess of the insulating base to the lower surface. And a wiring conductor made of a refractory metal powder, the semiconductor element is adhered and fixed to the bottom surface of the recess of the insulating substrate via an adhesive such as glass, resin, or brazing material, and each electrode of the semiconductor element is fixed. For example, it is electrically connected to a wiring conductor through an electrical connection means such as a bonding wire, and then a glass cover is formed on the upper surface of the insulating base so as to cover the recess of the insulating base. , A resin, a brazing material, etc., are bonded together, and the semiconductor element is hermetically housed in the recess of the base body. To become.

【0003】またこの従来の配線基板は、一般にセラミ
ックグリーンシート積層法によって製作され、具体的に
は、酸化アルミニウム、酸化珪素、酸化マグネシウム、
酸化カルシウム等のセラミック原料粉末に適当な有機バ
インダー、溶剤等を添加混合して泥漿状となすとともに
これを従来周知のドクターブレード法を採用しシート状
とすることによって複数のセラミックグリーンシートを
得、しかる後、前記セラミックグリーンシートに適当な
打ち抜き加工を施すとともに配線導体となる金属ペース
トを所定パターンに印刷塗布し、最後に前記セラミック
グリーンシートを所定の順に上下に積層してセラミック
生成形体となすとともに該セラミック生成形体を還元雰
囲気中、約1600℃の高温で焼成することによって製
作される。
This conventional wiring board is generally manufactured by a ceramic green sheet laminating method. Specifically, aluminum oxide, silicon oxide, magnesium oxide,
A plurality of ceramic green sheets are obtained by adding a suitable organic binder to a ceramic raw material powder such as calcium oxide, a solvent and the like to form a slurry and making it into a sheet shape by adopting a conventionally known doctor blade method, Thereafter, the ceramic green sheet is subjected to appropriate punching processing, a metal paste to be a wiring conductor is printed and applied in a predetermined pattern, and finally the ceramic green sheets are laminated vertically in a predetermined order to form a ceramic molded body. It is manufactured by firing the ceramic green body at a high temperature of about 1600 ° C. in a reducing atmosphere.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、この従
来の配線基板は、絶縁基体を構成する酸化アルミニウム
質焼結体等のセラミックスが硬くて脆い性質を有するた
め、搬送工程や半導体装置製作の自動ライン等において
配線基板同士が、あるいは配線基板と半導体装置製作自
動ラインの一部とが激しく衝突すると絶縁基体に欠けや
割れ、クラック等が発生し、その結果、半導体素子を気
密に収容することができず、半導体素子を長期間にわた
り正常、且つ安定に作動させることができなくなるとい
う欠点を有していた。
However, in this conventional wiring board, since the ceramics such as the aluminum oxide sintered body forming the insulating substrate have the property of being hard and brittle, an automatic line for the carrying process and the semiconductor device manufacturing is provided. Etc., when the wiring boards collide with each other or between the wiring boards and a part of the semiconductor device manufacturing automatic line, a crack, crack, crack or the like occurs in the insulating substrate, and as a result, the semiconductor element can be housed in an airtight manner. Therefore, there is a drawback that the semiconductor element cannot be operated normally and stably for a long period of time.

【0005】また前記配線基板の製造方法によれば、セ
ラミック生成形体を焼成する際、各セラミックグリーン
シートにおけるセラミック原料粉末の密度のバラツキに
起因してセラミック生成形体に不均一な焼成収縮が発生
して得られる配線基板に反り等の変形や寸法のバラツキ
が生じ、変形や寸法のバラツキが大きいと配線導体に断
線を招来するという欠点も有していた。
Further, according to the method for manufacturing a wiring board, when firing the ceramic green body, uneven firing shrinkage occurs in the ceramic green body due to the variation in the density of the ceramic raw material powder in each ceramic green sheet. There is also a drawback that the resulting wiring board is deformed due to warpage or the like and the dimensions are varied, and if the deformation or the variations are large, the wiring conductor is broken.

【0006】[0006]

【発明の目的】本発明は、かかる従来の半導体素子収納
用パッケージの欠点に鑑み案出されたものであり、その
目的は衝撃力の印加による欠けや割れ等の発生を有効に
防止し、内部に収容する半導体素子を長期間にわたり正
常、且つ安定に作動させることができる配線基板を提供
することにある。
SUMMARY OF THE INVENTION The present invention has been devised in view of the drawbacks of the conventional semiconductor element housing package, and its purpose is to effectively prevent the occurrence of cracks or cracks due to the application of impact force, (EN) Provided is a wiring board capable of normally and stably operating a semiconductor element housed in a container for a long period of time.

【0007】また本発明の他の目的は反り等の変形や寸
法のバラツキが少なく、配線導体の断線を有効に防止し
て半導体素子等の電極を外部電気回路に確実に電気的接
続することができる配線基板の製造方法を提供すること
にある。
Another object of the present invention is to reduce deformation such as warpage and variation in dimensions, effectively prevent disconnection of wiring conductors, and reliably electrically connect electrodes such as semiconductor elements to an external electric circuit. An object of the present invention is to provide a method of manufacturing a wiring board that can be manufactured.

【0008】[0008]

【課題を解決するための手段】本発明の配線基板は、6
0乃至95重量%の無機絶縁物粉末と5乃至40重量%
の熱硬化性樹脂とから成り、前記無機絶縁物粉末を前記
熱硬化性樹脂により結合した絶縁基体に、粒径0.05
μm未満の金属粉末及び粒径0.05μm以上の金属粉
末を熱硬化性樹脂樹脂により結合した配線導体を被着さ
せて成ることを特徴とするものである。
A wiring board according to the present invention comprises 6
0 to 95% by weight of inorganic insulating powder and 5 to 40% by weight
Of the thermosetting resin, the inorganic insulating powder having a particle size of 0.05
The present invention is characterized in that a wiring conductor obtained by bonding a metal powder having a particle diameter of less than μm and a metal powder having a particle diameter of 0.05 μm or more with a thermosetting resin is adhered.

【0009】また本発明の配線基板の製造方法は、熱硬
化性樹脂前駆体と無機絶縁物粉末とを混合して成る前駆
体シートを準備する工程と、前記前駆体シートに、熱硬
化性樹脂前駆体と粒径0.05μm未満の金属粉末及び
粒径0.05μm以上の金属粉末を混合して成る金属ペ
ーストを所定パターンに印刷する工程と、前記前駆体シ
ート及び所定パターンに印刷された金属ペーストを熱硬
化させる工程とから成ることを特徴とするものである。
Further, the method for manufacturing a wiring board of the present invention comprises a step of preparing a precursor sheet formed by mixing a thermosetting resin precursor and an inorganic insulating powder, and the thermosetting resin is added to the precursor sheet. A step of printing a metal paste formed by mixing a precursor, a metal powder having a particle size of less than 0.05 μm and a metal powder having a particle size of 0.05 μm or more in a predetermined pattern, and the precursor sheet and the metal printed in the predetermined pattern And a step of thermally curing the paste.

【0010】[0010]

【作用】本発明の配線基板によれば、絶縁基体が無機絶
縁物粉末を靱性に優れる熱硬化性樹脂で結合することに
よって形成されていることから配線基板同士あるいは配
線基板と半導体装置製作自動ラインの一部とが激しく衝
突しても絶縁基体に欠けや割れ、クラック等が発生する
ことはない。
According to the wiring board of the present invention, since the insulating substrate is formed by bonding the inorganic insulating powder with the thermosetting resin having excellent toughness, the wiring boards are connected to each other or the wiring boards and the semiconductor device manufacturing automatic line. Even if it collides violently with a part of the above, the insulating substrate will not be chipped, cracked, or cracked.

【0011】また本発明の配線基板によれば配線導体が
粒径0.05μm未満の金属粉末及び粒径0.05μm
以上の金属粉末を熱硬化性樹脂樹脂で結合することによ
って形成されており、粒径0.05μm以上の金属粉末
間に粒径0.05μm未満の金属粉末が入り込み、各金
属粉末間の接触が助長されて配線導体の電気抵抗が低抵
抗となる。
According to the wiring board of the present invention, the wiring conductor has a metal powder having a particle size of less than 0.05 μm and a particle size of 0.05 μm.
It is formed by bonding the above metal powders with a thermosetting resin, and the metal powders with a particle size of less than 0.05 μm enter between the metal powders with a particle size of 0.05 μm or more, and the contact between the metal powders is made. As a result, the electrical resistance of the wiring conductor becomes low.

【0012】更に本発明の配線基板は硬化性樹脂前駆体
と無機絶縁物粉末とを混合して成る前駆体シート、及び
熱硬化性樹脂前駆体と粒径0.05μm未満の金属粉末
及び粒径0.05μm以上の金属粉末を混合して成る金
属ペーストを熱硬化させることによって製作され、焼成
工程がないことから不均一な焼成収縮に起因する変形や
寸法のバラツキは発生せず、その結果、配線導体に断線
が招来することもなく、配線導体を介して半導体素子等
の電極を外部電気回路に確実に電気的接続することが可
能となる。
The wiring board of the present invention further comprises a precursor sheet obtained by mixing a curable resin precursor and an inorganic insulating powder, a thermosetting resin precursor, a metal powder having a particle diameter of less than 0.05 μm, and a particle diameter. It is manufactured by thermosetting a metal paste formed by mixing metal powder of 0.05 μm or more, and since there is no firing step, deformation and dimensional variation due to uneven firing shrinkage do not occur, and as a result, It is possible to reliably electrically connect the electrode of the semiconductor element or the like to the external electric circuit through the wiring conductor without causing a break in the wiring conductor.

【0013】[0013]

【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1は本発明の配線基板を半導体素子を収容する半
導体素子収納用パッケージに適用した場合の一実施例を
示し、1は絶縁基体、2は配線導体である。この配線導
体2を絶縁基体1に被着させたものが配線基板となる。
The present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 shows an embodiment in which the wiring board of the present invention is applied to a semiconductor element housing package for housing a semiconductor element, wherein 1 is an insulating substrate and 2 is a wiring conductor. The wiring substrate is formed by attaching the wiring conductor 2 to the insulating substrate 1.

【0014】前記絶縁基体1は3枚の絶縁基板1a、1
b、1cを積層することによって形成されており、その
上面の中央部に半導体素子を収容するための凹部1dを
有し、該凹部1d底面には半導体素子3が樹脂等の接着
材を介して接着固定される。
The insulating substrate 1 comprises three insulating substrates 1a and 1a.
It is formed by stacking b and 1c, and has a recess 1d for accommodating a semiconductor element in the center of the upper surface thereof, and the semiconductor element 3 is provided on the bottom surface of the recess 1d via an adhesive such as resin. Adhesively fixed.

【0015】前記絶縁基体1を構成する3枚の絶縁基板
1a、1b、1cは例えば酸化珪素、酸化アルミニウ
ム、窒化アルミニウム、炭化珪素、チタン酸バリウム等
の無機絶縁物粉末をエポキシ樹脂、ポリイミド樹脂等の
熱硬化性樹脂で結合することによって形成されており、
絶縁基体1を構成する3枚の絶縁基板1a、1b、1c
はその各々が無機絶縁物粉末を靱性に優れる熱硬化性樹
脂で結合することによって形成されていることから絶縁
基体1に外力が印加されても該外力によって絶縁基体1
に欠けや割れ、クラック等が発生することはない。
The three insulating substrates 1a, 1b and 1c constituting the insulating base 1 are made of an inorganic insulating powder such as silicon oxide, aluminum oxide, aluminum nitride, silicon carbide, barium titanate, epoxy resin or polyimide resin. It is formed by bonding with thermosetting resin of
Three insulating substrates 1a, 1b, 1c constituting the insulating base 1
Since each of them is formed by binding the inorganic insulating powder with a thermosetting resin having excellent toughness, even if an external force is applied to the insulating base 1, the insulating base 1 is applied by the external force.
There is no chipping, cracking, or cracking.

【0016】尚、前記無機絶縁物粉末を熱硬化性樹脂で
結合して成る絶縁基体1を構成する3枚の絶縁基板1
a、1b、1cは無機絶縁物粉末の含有量が60重量%
未満であると絶縁基体1の熱膨張係数が半導体素子3の
熱膨張係数に対して大きく相違し、半導体素子3が作動
時に熱を発し、該熱が半導体素子3と絶縁基体1の両者
に印加されると両者間に両者の熱膨張係数の相違に起因
する大きな熱応力が発生し、この大きな熱応力によって
半導体素子3が絶縁基体1より剥離したり、半導体素子
3に割れや欠け等が発生しまう。また95重量%を越え
ると無機絶縁物粉末を熱硬化性樹脂で完全に結合させる
ことができず、所定の絶縁基板1a、1b、1cを得る
ことができなくなる。従って、前記絶縁基体1を構成す
る絶縁基板1a、1b、1cはその各々の内部に含有さ
れる無機絶縁物粉末の量が60乃至95重量%の範囲に
特定される。
In addition, three insulating substrates 1 constituting an insulating substrate 1 formed by bonding the inorganic insulating powders with a thermosetting resin.
a, 1b, and 1c have an inorganic insulating powder content of 60% by weight.
When it is less than the above, the coefficient of thermal expansion of the insulating substrate 1 greatly differs from the coefficient of thermal expansion of the semiconductor element 3, the semiconductor element 3 emits heat during operation, and the heat is applied to both the semiconductor element 3 and the insulating substrate 1. Then, a large thermal stress is generated between them due to the difference in thermal expansion coefficient between the two, and the semiconductor element 3 is separated from the insulating substrate 1 due to the large thermal stress, or the semiconductor element 3 is cracked or chipped. I will end up. On the other hand, if it exceeds 95% by weight, the inorganic insulating powder cannot be completely bonded with the thermosetting resin, and the predetermined insulating substrates 1a, 1b, 1c cannot be obtained. Therefore, the insulating substrates 1a, 1b, 1c constituting the insulating base 1 are specified such that the amount of the inorganic insulating powder contained therein is in the range of 60 to 95% by weight.

【0017】また前記絶縁基体1はその凹部1d周辺か
ら下面にかけて配線導体2が被着形成されており、該配
線導体2は銅、銀、金等の金属粉末をエポキシ樹脂等の
熱硬化性樹脂により結合したもので形成されている。
A wiring conductor 2 is adhered and formed from the periphery of the recess 1d to the lower surface of the insulating substrate 1. The wiring conductor 2 is made of a metal powder of copper, silver, gold or the like and a thermosetting resin such as an epoxy resin. It is formed by a combination of.

【0018】前記配線導体2は半導体素子3の電極を外
部電気回路に接続する作用を為し、絶縁基体1の凹部1
d周辺部位に位置する配線導体2には半導体素子3の各
電極がボンディングワイヤ4を介して電気的に接続さ
れ、また絶縁基体1の下面に導出される部位は外部電気
回路に電気的に接続される。
The wiring conductor 2 functions to connect the electrode of the semiconductor element 3 to an external electric circuit, and the recess 1 of the insulating base 1 is formed.
d Each electrode of the semiconductor element 3 is electrically connected to the wiring conductor 2 located in the peripheral portion via the bonding wire 4, and the portion led out to the lower surface of the insulating substrate 1 is electrically connected to the external electric circuit. To be done.

【0019】前記配線導体2はまたエポキシ樹脂等の熱
硬化性樹脂により結合される金属粉末が粒径0.05μ
m未満の金属粉末と粒径0.05μm以上の金属粉末と
で形成されており、粒径が0.05μm以上の金属粉末
間に粒径が0.05μm未満の金属粉末を入り込ませ、
各金属粉末間の接触を助長することによって配線導体2
の電気抵抗を低抵抗となしている。
The wiring conductor 2 is made of a metal powder bonded by a thermosetting resin such as an epoxy resin having a particle size of 0.05 μm.
and a metal powder having a particle size of 0.05 μm or more. The metal powder having a particle size of less than 0.05 μm is inserted between the metal powder having a particle size of 0.05 μm or more,
Wiring conductor 2 by promoting contact between each metal powder
The electrical resistance of is low.

【0020】尚、前記粒径が0.05μm未満の金属粉
末と粒径が0.05μm以上の金属粉末とから成る配線
導体2は、全金属粉末を100重量%としたとき、粒径
0.05μm未満の金属粉末が5重量%未満、粒径0.
05μm以上の金属粉末が95重量%を越えると粒径
0.05μm以上の金属粉末間の空隙に0.05μm未
満の金属粉末が充分に入り込まず、配線導体2の電気抵
抗が高くなる傾向にあり、また粒径0.05μm未満の
金属粉末が40重量%を越え、粒径0.05μm以上の
金属粉末が60重量%未満となると金属粉末間の接触抵
抗が増大して配線導体2の電気抵抗が高くなる傾向にあ
る。従って、前記粒径が0.05μm未満の金属粉末と
粒径が0.05μm以上の金属粉末とから成る配線導体
2は、全金属粉末を100重量%としたとき、粒径0.
05μm未満の金属粉末は5乃至40重量%の範囲に、
粒径0.05μm以上の金属粉末は60乃至95重量%
の範囲としておくことが好ましい。
The wiring conductor 2 composed of the metal powder having a particle size of less than 0.05 μm and the metal powder having a particle size of 0.05 μm or more has a particle size of 0. Less than 5% by weight of metal powder having a particle size of less than 05 μm and a particle size of 0.
If the metal powder having a particle size of 05 μm or more exceeds 95% by weight, the metal powder having a particle size of 0.05 μm or more does not sufficiently enter the metal powder having a particle size of 0.05 μm or more, and the electric resistance of the wiring conductor 2 tends to increase. When the metal powder having a particle size of less than 0.05 μm exceeds 40% by weight and the metal powder having a particle size of 0.05 μm or more is less than 60% by weight, the contact resistance between the metal powders increases and the electrical resistance of the wiring conductor 2 increases. Tends to be higher. Therefore, the wiring conductor 2 composed of the metal powder having a particle size of less than 0.05 μm and the metal powder having a particle size of 0.05 μm or more has a particle size of 0.
The metal powder of less than 05 μm is in the range of 5 to 40% by weight,
60 to 95% by weight of metal powder with a particle size of 0.05 μm or more
It is preferable to set it as the range of.

【0021】また前記配線導体2はその露出する表面に
ニッケル、金等の耐蝕性に優れ、且つ良導電性の金属を
メッキ法により1乃至20μmの厚みに層着させておく
と配線導体2の酸化腐食を有効に防止することができる
とともに配線導体2にボンディングワイヤ4を強固に電
気的接続させることができる。従って、前記配線導体2
の露出する表面にはニッケルや金等の耐蝕性に優れ、且
つ良導電性の金属をメッキ法により1乃至20μmの厚
みに層着させておくことが好ましい。
The wiring conductor 2 is formed by depositing a metal having excellent corrosion resistance such as nickel and gold on the exposed surface by a plating method to a thickness of 1 to 20 μm. Oxidation and corrosion can be effectively prevented, and the bonding wire 4 can be firmly electrically connected to the wiring conductor 2. Therefore, the wiring conductor 2
It is preferable that a metal having excellent corrosion resistance, such as nickel or gold, and having good conductivity is deposited on the exposed surface by a plating method to a thickness of 1 to 20 μm.

【0022】かくして上述の配線基板によれば、絶縁基
体1の凹部1d底面に半導体素子3を樹脂等の接着剤を
介して接着固定するとともに半導体素子3の各電極をボ
ンディングワイヤ4を介して配線導体2に電気的に接続
し、しかる後、絶縁基体1の上面に蓋体5を樹脂等から
成る封止材を介して接合させ、絶縁基体1と蓋体5とか
ら成る容器内部に半導体素子3を気密に収容することに
よって製品としての半導体装置が完成する。
Thus, according to the above wiring board, the semiconductor element 3 is adhered and fixed to the bottom surface of the recess 1d of the insulating substrate 1 with an adhesive such as resin, and each electrode of the semiconductor element 3 is wired with the bonding wire 4. After electrically connecting to the conductor 2, the lid 5 is joined to the upper surface of the insulating base 1 via a sealing material made of resin or the like, and the semiconductor element is placed inside the container made up of the insulating base 1 and the lid 5. A semiconductor device as a product is completed by hermetically containing 3 therein.

【0023】次に前記半導体素子収納用パッケージに使
用される配線基板の製造方法について説明する。
Next, a method of manufacturing the wiring board used for the semiconductor element housing package will be described.

【0024】まず図2(a)に示すように3枚の前駆体
シート11a、11b、11cを準備する。前記3枚の
前駆体シート11a、11b、11cは無機絶縁物粉末
を熱硬化性樹脂前駆体で結合することによって形成され
ており、例えば粒径が0.1〜100μmの酸化珪素粉
末に、ビスフェノールA型エポキシ樹脂、ノボラック型
エポキシ樹脂、グリシジルエステル型エポキシ樹脂等の
エポキシ樹脂及びアミン系硬化剤、イミダゾール系硬化
剤、酸無水物系硬化剤等の硬化剤を添加混合してペース
ト状となし、しかる後、このペーストをシート状になす
とともに約25〜100℃の温度で1〜60分間加熱し
半硬化させることによって製作される。
First, as shown in FIG. 2A, three precursor sheets 11a, 11b and 11c are prepared. The three precursor sheets 11a, 11b, and 11c are formed by bonding inorganic insulating powders with a thermosetting resin precursor. For example, silicon oxide powders having a particle size of 0.1 to 100 μm are mixed with bisphenol. A type epoxy resin, novolac type epoxy resin, glycidyl ester type epoxy resin and other epoxy resins and amine type curing agents, imidazole type curing agents, acid anhydride type curing agents and other curing agents are added and mixed to form a paste, Then, the paste is formed into a sheet and is heated at a temperature of about 25 to 100 ° C. for 1 to 60 minutes to be semi-cured.

【0025】次に図2(b)に示すように前記3枚の前
駆体シート11a、11b、11cのうち2枚の前駆体
シート11a、11bに半導体素子3を収容する凹部1
dとなる開口A、A’を、2枚の前駆体シート11b、
11cに配線導体2を引き回すための貫通孔B、B’を
各々形成する。
Next, as shown in FIG. 2B, the recess 1 for accommodating the semiconductor element 3 in the two precursor sheets 11a, 11b among the three precursor sheets 11a, 11b, 11c.
The openings A and A ′ to be the d are formed by the two precursor sheets 11b,
Through holes B and B'for routing the wiring conductor 2 are formed in 11c.

【0026】前記開口A、A’及び貫通孔B、B’は前
駆体シート11a、11b、11cに従来周知のパンチ
ング加工法を施し、前駆体シート11a、11b、11
cの各々に所定形状の孔を穿孔することによって形成さ
れる。
The openings A, A'and the through holes B, B'are formed by subjecting the precursor sheets 11a, 11b, 11c to a well-known punching process to obtain the precursor sheets 11a, 11b, 11 '.
It is formed by drilling a hole of a predetermined shape in each of c.

【0027】次に図2(c)に示すように、前記前駆体
シート11b、11cの上下面及び貫通孔B、B’内に
配線導体2と成る金属ペースト12を従来周知のスリー
ン印刷法により所定パターンに印刷塗布するとともにこ
れを約25〜100℃の温度で1〜60分間加熱し半硬
化させることによって製作される。
Next, as shown in FIG. 2 (c), a metal paste 12 to be the wiring conductor 2 is formed on the upper and lower surfaces of the precursor sheets 11b and 11c and in the through holes B and B'by a conventionally known screen printing method. It is manufactured by applying a predetermined pattern by printing and heating it at a temperature of about 25 to 100 ° C. for 1 to 60 minutes to semi-cure it.

【0028】前記金属ペースト12としては例えば、金
属粉末として粒径0.01μm、1μ、5μm、10μ
mの混合銅粉末に、ビスフェノールA型エポキシ樹脂、
ノボラック型エポキシ樹脂、グリシジルエステル型エポ
キシ樹脂等のエポキシ樹脂及びアミン系硬化剤、イミダ
ゾール系硬化剤、酸無水物系硬化剤等の硬化剤を添加混
合しペースト状としたものが使用される。
The metal paste 12 is, for example, a metal powder having a particle size of 0.01 μm, 1 μm, 5 μm, 10 μm.
m mixed copper powder, bisphenol A type epoxy resin,
An epoxy resin such as a novolac type epoxy resin or a glycidyl ester type epoxy resin and a curing agent such as an amine type curing agent, an imidazole type curing agent or an acid anhydride type curing agent are added and mixed to form a paste.

【0029】そして最後に前記3枚の前駆体シート11
a、11b、11cを上下に積層するとともにこれを約
80〜300℃の温度で約10秒〜24時間加熱し、前
記前駆体シート11a、11b、11cと、前駆体シー
ト11b、11cに所定パターンに印刷塗布された金属
ペースト12とを完全に熱硬化させることによって図1
に示すような絶縁基体1に配線導体2を被着させた半導
体素子収納用パッケージに使用される配線基板が完成す
る。この場合、前記前駆体シート11a、11b、11
c及び金属ペースト12は熱硬化時に収縮することは殆
どなく、従って、得られる配線基板に変形や寸法にバラ
ツキが発生することは皆無で、配線導体に断線が招来す
ることはなく、配線導体を介して半導体素子等の電極を
外部電気回路に確実に電気的接続することが可能とな
る。
Finally, the above three precursor sheets 11
a, 11b, 11c are stacked on top of each other and heated at a temperature of about 80 to 300 ° C. for about 10 seconds to 24 hours to form a predetermined pattern on the precursor sheets 11a, 11b, 11c and the precursor sheets 11b, 11c. By completely thermosetting the metal paste 12 printed and applied to
A wiring board used in a package for housing a semiconductor device, in which the wiring conductor 2 is adhered to the insulating substrate 1 as shown in (3), is completed. In this case, the precursor sheets 11a, 11b, 11
c and the metal paste 12 hardly shrink during thermosetting, so that the obtained wiring board is never deformed or the dimensions are not varied, and the wiring conductor is not broken. Through this, the electrodes of the semiconductor element or the like can be reliably electrically connected to the external electric circuit.

【0030】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能であり、例えば上述の実施例では本願発
明の配線基板を半導体素子を収容する半導体素子収納用
パッケージに適用した場合を例に採って説明したがこれ
を混成集積回路基板等に適用してもよい。
The present invention is not limited to the above-mentioned embodiments, and various modifications can be made without departing from the scope of the present invention. For example, in the above-mentioned embodiments, the wiring board of the present invention is applicable. Although the description has been given by taking as an example the case where the above is applied to a semiconductor element housing package for housing a semiconductor element, this may be applied to a hybrid integrated circuit board or the like.

【0031】また上述の実施例では3枚の前駆体シート
を積層することによって配線基板を製作したが、1枚や
2枚、あるいは4枚以上の前駆体シートを使用して配線
基板を製作してもよい。
In the above-mentioned embodiment, the wiring board is manufactured by laminating the three precursor sheets. However, the wiring board is manufactured by using one, two, or four or more precursor sheets. May be.

【0032】[0032]

【発明の効果】本発明の配線基板によれば、絶縁基体が
無機絶縁物粉末を靱性に優れる熱硬化性樹脂で結合する
ことによって形成されていることから配線基板同士ある
いは配線基板と半導体装置製作自動ラインの一部とが激
しく衝突しても絶縁基体に欠けや割れ、クラック等が発
生することはない。
According to the wiring board of the present invention, since the insulating substrate is formed by bonding the inorganic insulating powder with the thermosetting resin having excellent toughness, the wiring boards are manufactured together or the wiring board and the semiconductor device are manufactured. Even if a part of the automatic line collides violently, the insulating substrate will not be chipped, cracked, or cracked.

【0033】また本発明の配線基板によれば配線導体が
粒径0.05μm未満の金属粉末及び粒径0.05μm
以上の金属粉末を熱硬化性樹脂樹脂で結合することによ
って形成されており、粒径0.05μm以上の金属粉末
間に粒径0.05μm未満の金属粉末が入り込み、各金
属粉末間の接触が助長されて配線導体の電気抵抗が低抵
抗となる。
According to the wiring board of the present invention, the wiring conductor has a metal powder having a particle size of less than 0.05 μm and a particle size of 0.05 μm.
It is formed by bonding the above metal powders with a thermosetting resin, and the metal powders with a particle size of less than 0.05 μm enter between the metal powders with a particle size of 0.05 μm or more, and the contact between the metal powders is made. As a result, the electrical resistance of the wiring conductor becomes low.

【0034】更に本発明の配線基板は硬化性樹脂前駆体
と無機絶縁物粉末とを混合して成る前駆体シート、及び
熱硬化性樹脂前駆体と粒径0.05μm未満の金属粉末
及び粒径0.05μm以上の金属粉末を混合して成る金
属ペーストを熱硬化させることによって製作され、焼成
工程がないことから不均一な焼成収縮に起因する変形や
寸法のバラツキは発生せず、その結果、配線導体に断線
が招来することもなく、配線導体を介して半導体素子等
の電極を外部電気回路に確実に電気的接続することが可
能となる。
The wiring board of the present invention further comprises a precursor sheet obtained by mixing a curable resin precursor and an inorganic insulating powder, a thermosetting resin precursor, a metal powder having a particle diameter of less than 0.05 μm, and a particle diameter. It is manufactured by thermosetting a metal paste formed by mixing metal powder of 0.05 μm or more, and since there is no firing step, deformation and dimensional variation due to uneven firing shrinkage do not occur, and as a result, It is possible to reliably electrically connect the electrode of the semiconductor element or the like to the external electric circuit through the wiring conductor without causing a break in the wiring conductor.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の配線基板を半導体素子収納用パッケー
ジに適用した場合の一実施例を示す断面図である。
FIG. 1 is a cross-sectional view showing an embodiment in which a wiring board of the present invention is applied to a semiconductor element housing package.

【図2】(a)乃至(c)は本発明の配線基板の製造方
法を説明するための各工程毎の断面図である。
2A to 2C are cross-sectional views for each step for explaining the method for manufacturing a wiring board according to the present invention.

【符号の説明】[Explanation of symbols]

1・・・・・・・・・・・・・絶縁基体 1a、1b、1c・・・・・・絶縁基板 2・・・・・・・・・・・・・配線導体 11a、11b、11c・・・前駆体シート 12・・・・・・・・・・・・金属ペースト Insulation bases 1a, 1b, 1c ... Insulation substrate 2 ... Wiring conductors 11a, 11b, 11c・ ・ ・ Precursor sheet 12 ・ ・ ・ ・ ・ ・ ・ ・ ・ Metal paste

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】60乃至95重量%の無機絶縁物粉末と5
乃至40重量%の熱硬化性樹脂とから成り、前記無機絶
縁物粉末を前記熱硬化性樹脂により結合した絶縁基体
に、粒径0.05μm未満の金属粉末及び粒径0.05
μm以上の金属粉末を熱硬化性樹脂樹脂により結合した
配線導体を被着させて成る配線基板。
1. An inorganic insulating powder of 60 to 95% by weight and 5
To 40% by weight of a thermosetting resin, the inorganic insulating powder is bonded by the thermosetting resin to an insulating substrate, and a metal powder having a particle diameter of less than 0.05 μm and a particle diameter of 0.05
A wiring board formed by depositing a wiring conductor in which metal powder having a size of μm or more is bonded by a thermosetting resin resin.
【請求項2】熱硬化性樹脂前駆体と無機絶縁物粉末とを
混合して成る前駆体シートを準備する工程と、前記前駆
体シートに、熱硬化性樹脂前駆体と粒径0.05μm未
満の金属粉末及び粒径0.05μm以上の金属粉末を混
合して成る金属ペーストを所定パターンに印刷する工程
と、前記前駆体シート及び所定パターンに印刷された金
属ペーストを熱硬化させる工程とから成る配線基板の製
造方法。
2. A step of preparing a precursor sheet obtained by mixing a thermosetting resin precursor and an inorganic insulating powder, and the thermosetting resin precursor and a particle size of less than 0.05 μm in the precursor sheet. Of the metal powder and the metal powder having a particle size of 0.05 μm or more are printed in a predetermined pattern, and the precursor sheet and the metal paste printed in the predetermined pattern are thermally cured. Wiring board manufacturing method.
JP11294495A 1995-05-11 1995-05-11 Wiring board and method of manufacturing the same Expired - Fee Related JP3292624B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11294495A JP3292624B2 (en) 1995-05-11 1995-05-11 Wiring board and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11294495A JP3292624B2 (en) 1995-05-11 1995-05-11 Wiring board and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH08307025A true JPH08307025A (en) 1996-11-22
JP3292624B2 JP3292624B2 (en) 2002-06-17

Family

ID=14599426

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11294495A Expired - Fee Related JP3292624B2 (en) 1995-05-11 1995-05-11 Wiring board and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP3292624B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10163583A (en) * 1996-11-27 1998-06-19 Kyocera Corp Wiring board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10163583A (en) * 1996-11-27 1998-06-19 Kyocera Corp Wiring board

Also Published As

Publication number Publication date
JP3292624B2 (en) 2002-06-17

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