JPH08306905A - Electronic device manufacturing method and electronic device - Google Patents

Abstract

(57) [Summary] [Structure] Semiconductor or metal thin film 2 and insulating thin film 3 on substrate 1.
After forming a laminated film 4 containing, and oxidizing or etching from the side surface, a zero-dimensional quantum box,
One-dimensional quantum wire or micro tunnel junction 11, 12
A one-dimensional quantum thin wire 9 having is formed. [Effect] Using a semiconductor microfabrication apparatus and a device manufacturing apparatus used for manufacturing a conventional Si integrated circuit, a single electron element capable of operating at room temperature and having various dimensions and dimensional accuracy of several nm and various quantum effects were used. An electronic device is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an electronic device suitable for a single electronic element, various quantum effect elements, etc., and an electronic device manufactured by the method.

[0002]

2. Description of the Related Art In order to improve the performance of electronic devices such as Si integrated circuits (LSI), miniaturization of elements constituting circuits has been advanced. However, in the MOS transistor currently mainly used in these devices, there is a limit in improving the degree of integration and operating speed by miniaturization while suppressing increase in power consumption.

In order to solve this problem, a single electronic element or the like has recently been proposed as an electronic element based on a new operating principle. If these elements are ideally realized, it is expected that the power delay product can be greatly improved. For single electronic devices, see, for example, Applied Physics, 6th
Volume 3, Issue 12 (1994), pages 1232-12
Discussed on page 38. Further, it is considered that if a 0-dimensional quantum box that three-dimensionally confine electrons in a region of several nm is used, the performance of a light emitting device or the like can be significantly improved by the quantum effect. Furthermore, it is considered that when a one-dimensional electron gas is formed by using a one-dimensional quantum wire, the mobility of electrons is significantly increased and a high-speed switching element can be realized. These quantum effect elements are discussed in, for example, the Institute of Electronics, Information and Communication Engineers, Vol. 77, No. 11 (1994), pp. 1117 to 1124.

[0004]

However, as discussed in the paper, in order to operate a single-electron device at room temperature, the size of several hundreds nm, which is the size of the current mainstream MOS transistors, should be reduced from one to several hundred nm. A device structure with a dimension several nanometers smaller by two orders of magnitude must be processed accurately. The same applies to quantum effect devices such as a 0-dimensional quantum box and a 1-dimensional quantum wire.

At present, there is no processing apparatus capable of performing such ultra-fine processing, and there is almost no prospect of mass production of this with high reproducibility.

An object of the present invention is to operate a single electron element and various quantum effect elements at room temperature by using a semiconductor microfabrication apparatus and a device manufacturing apparatus used for manufacturing a conventional Si integrated circuit. An object of the present invention is to provide an electronic device manufacturing method capable of accurately processing a dimension of several nm and an electronic device having an element structure manufactured by the method.

[0007]

In order to achieve the above object, the present invention forms a laminated film containing a semiconductor or metal thin film and an insulating thin film on a substrate, processes it into a pattern and then oxidizes it from the side surface. A one-dimensional quantum wire that forms an oxide region and is surrounded by the oxide region in the laminated film and has a zero-dimensional quantum box or a minute tunnel junction, and a semiconductor or metal region sandwiched between the oxide region and the insulating thin film. Form a one-dimensional quantum box or one-dimensional quantum wire.

When the laminated film processed into a columnar shape is oxidized from the side surface, a semiconductor or metal thin wire including a minute tunnel junction or a 0-dimensional quantum box in the center of the pillar and extending in a direction substantially perpendicular to the substrate is obtained. By processing a laminated film sandwiching a semiconductor or metal thin film with a plurality of insulating films into a horizontally long rectangular parallelepiped and oxidizing it from the side surface, a semiconductor or metal thin wire extending in a direction substantially parallel to the substrate can be obtained in the rectangular parallelepiped. .

The film thickness of the semiconductor thin film or the metal film sandwiched by the two insulating thin films is preferably 20 nm or less. Further, by carrying out the above-mentioned oxidation until the oxidation rate becomes one fifth or less of the value in the bulk of the semiconductor or metal, a stable ultrafine structure can be obtained. Note that the above various structures may be formed by side etching the side surfaces of the stacked film instead of oxidation.

Another object is to oxidize a laminated film pattern including a semiconductor or metal thin film and an insulating thin film from the side surface in an electronic device to form a one-dimensional quantum wire having a minute tunnel junction in the laminated film. Or a semiconductor or metal region surrounded by the oxidized region and the insulating thin film is a zero-dimensional quantum box or a one-dimensional quantum wire. A semiconductor / metal thin wire with a tunnel junction, an electron storage node (0-dimensional quantum box), etc. in the middle of a columnar insulator perpendicular to the substrate, or a direction parallel to the substrate at the center of a rectangular parallelepiped insulator. Stretching semiconductor / metal wires are obtained. The diameter of these thin wires and the dimensions of the electron storage node or the 0-dimensional quantum box are preferably 20 nm or less. Silicon or the like can be used as the semiconductor. Further, a gate electrode may be formed around the thin wire or the electron storage node.

[0011]

When the existing film forming technique, electron beam drawing method and anisotropic etching are used, the diameter of the laminated film 4 including the silicon film 2 and the insulating film 3 as shown in FIG. A cylinder 5 with a size of several tens of nm can be processed. The cylinder 5 having this laminated structure is oxidized from the side surface. Here, although not shown in the drawing, an oxidation prevention film such as a silicon nitride film is formed on the upper surface of the column 5 in order to perform the oxidation only from the side surface. As a result, only the silicon portion of the laminated film is oxidized from the surroundings, and the insulating film remains as it is. This is because the oxidation is rate-controlled by the diffusion rate of oxygen in the silicon oxide film, as shown in FIG. 1B, so that the boundary 8 between the oxidized region 6 and the unoxidized region 7 does not depend on the presence or absence of the insulating film. This is because it advances toward the center of the pillar in a direction perpendicular to the surface. Therefore,
After a suitable oxidation time, as shown in FIG.
A structure in which an extremely minute silicon island 10 is sandwiched by two tunnel junctions 11 and 12 in a silicon thin wire 9 at the center of the is obtained.

The island 10 thus formed acts as an electron trap for trapping a single electron.
The structure of (c) can be used as a basic element of a single electronic device. However, in order to apply this structure to a single-electron device, it is necessary to join wirings above and below the Si pillar.
It is also preferable to provide a suitable gate electrode around the island. These specific methods are discussed in the examples.

It should be noted that, when the Si pillar is oxidized from the surroundings, the oxidation rate decreases as the oxidation progresses, and columnar Si thin wires can be obtained in a self-aligned manner (Journal of Vacuum Science and Technology, Vol. B11 (1993). ), Pages 2532 to 2537 (Journal
of vacuum science and technology, Vol. B11 (1993)
pp.2532-2537)).

FIG. 2 shows an example of the relationship between the oxidation time and the thickness of the oxidized region around the Si pillar (t in FIG. 1B). Since this relationship depends on the pattern shape and the oxidation conditions, it is desirable to optimize these conditions in order to make the diameter of the thin wire a desired value. However, since the fine wire diameter finally obtained when the progress of oxidation saturates does not depend much on the dimensions of the laminated film pattern before oxidation, by performing the oxidation for a sufficient time, it is possible to obtain the same regardless of the variations in the dimensions of the original pattern. A thin wire having a constant diameter can be obtained relatively stably. For this purpose, it is generally preferable to oxidize until the oxidation rate becomes one fifth or less of the bulk value. In any case, the diameters of the thin wires and islands in the present invention can be controlled extremely accurately.

Further, the thickness of the insulating film and the thickness of the island sandwiched by the insulating film can be accurately controlled by the conditions for forming the laminated film. Therefore, it is possible to realize an ultrafine structure that cannot be obtained by the conventional method of forming a tunnel junction or an island in the lateral direction using lithography while accurately controlling the junction property and the island capacitance. Further, the diameter of the thin wire formed in self-alignment with the oxide film thickness can be formed extremely uniformly over a wide area of the substrate. Therefore, variations in electrical characteristics are suppressed in the substrate, which is also preferable when a large number of elements are integrated.

Although silicon and an oxide film have been described above, other semiconductors or metals may be used instead of silicon, and other insulating films (nitride film, calcium fluoride, alumina, etc.) may be used for the oxide film. But it's okay. Further, different kinds of semiconductors may be stacked. For example, it is possible to form a thin wire in a semiconductor heterostructure in which semiconductors having different band structures are laminated, and similar effects can be obtained in this case as well. Also, by stacking a large number of insulating films and semiconductor layers, a large number of islands can be arranged in the vertical direction, and it is possible to form a three-dimensional zero-dimensional quantum box with extremely high density. Such a structure is also useful as various light emitting devices.

If the laminated film pattern to be oxidized is formed into a horizontally long cube or the like, a semiconductor or a metal thin wire extending in a direction substantially parallel to the substrate can be obtained inside. Such a structure can be used, for example, as a one-dimensional channel of a field effect transistor. In addition to this, various fine structures can be obtained by devising the pattern of the laminated film. In any case, in order to obtain the single electron effect or the quantum effect at room temperature, the film thickness of the semiconductor or metal film sandwiched by the insulating thin film or the two insulating thin films is 20 n
m or less.

A similar structure can be obtained by side-etching the side surface of the laminated film instead of oxidation, but in this case, it should be noted that generally the etching rates of the insulating film and the semiconductor / metal film are different. . Ideally, both etching rates should be equal, but in order to obtain the desired structure, at least the etching rate of the insulating film
It must be slower than the etching rate of the metal film.

[0019]

【Example】

(Embodiment 1) An embodiment of the present invention will be described below with reference to FIG. On the Si substrate 22 in which the well 21 is formed by normal ion implantation, a polysilicon film 23 (film thickness 100 nm) and a silicon oxide film 24 are sequentially arranged from the substrate side.
(Film thickness 10 nm), polysilicon film 25 (film thickness 10 n
m), silicon oxide film 26 (film thickness 10 nm), polysilicon film 27 (film thickness 100 nm), silicon nitride film 28
A laminated film 29 made of (film thickness 100 nm) was formed (FIG. 3).
(a)). Further, after forming a negative resist film 30 for electron beam on the laminated film, a dot-shaped pattern was drawn by using an electron beam drawing apparatus, and predetermined development was performed to obtain a resist pattern 31 having a cylindrical shape with a diameter of 50 nm. (Fig. 3 (b)).

Next, the underlying laminated film was anisotropically dry-etched using the resist pattern as a mask to form a columnar structure 32 of the laminated film (FIG. 3C). Then, the columnar structure 32 of the laminated film and the exposed portion of the Si substrate 32 are removed by 850
Dry oxidation was performed at a temperature of C for 5 hours to form a silicon oxide film 33 in a region including a cylindrical portion that left the center of the column. Since the oxidation rate decreased as the oxidation proceeded, a silicon thin wire 34 having a diameter of 20 nm was formed in the center of the column in a self-aligned manner. Since the silicon oxide films 24 and 26 cross the silicon thin wire 34, the minute tunnel junction 3 is formed in the silicon thin wire 34.
5, 36 and island regions 37 of silicon were formed (FIG. 3).
(D)).

Polysilicon was formed under the condition that a relatively large grain size was obtained so that no polycrystalline grain boundaries existed in the thin lines or the island regions. Therefore, it may be considered that the thin line and the island region are substantially made of a single crystal. Moreover, since the oxygen supply was suppressed by the nitride film cap and the substrate, the diameter of the thin wire was increased in the upper part and the lower part of the pillar, respectively. This is preferable for connecting the thin wire and the external wiring.

Next, the source electrode 38 was connected to the upper portion of the silicon thin wire 34, and the drain electrode 39 was connected to the well 21 connected to the lower portion of the silicon thin wire. Further, a gate was formed on the outer side of the cylinder so as to surround the silicon island, and the gate electrode 40 was connected to this (FIG. 3 (e)). For forming these electrodes, various methods used in a normal silicon LSI process can be used. Although the gate is formed by the sidewall here, another method may be used. When connecting the electrodes to the thin wires, sufficient care must be taken not to cause excessive contact resistance or the like between them. When it is necessary to reduce the distance between the gate and the island, the silicon oxide film 23 may be etched to thin the cylindrical silicon oxide film surrounding the thin line.

As a result of examining the characteristics of the device at room temperature, a Coulomb staircase in which the conductance of the current flowing through the thin wire with respect to the drain voltage oscillates was observed, and it was confirmed that the device functions as a single electron transistor. Moreover, the conductance between the source and the drain could be controlled by the gate voltage. Therefore, a circuit can be formed by using this as a three-terminal element.

A large number of the elements of this example were formed in a wide area on the substrate, but the diameter of the thin wire formed in self-alignment with the thickness of the silicon and oxide film was extremely uniform within the substrate. . Therefore, uniform electrical characteristics were obtained within the substrate.

(Embodiment 2) FIG. 4 shows a second embodiment of the present invention. On the Si substrate 50, 20 layers of a multilayer film composed of a polysilicon film 51 having a film thickness of 10 nm and a silicon oxide film 52 having a film thickness of 10 nm and a laminated film 54 composed of a silicon nitride film 53 were formed. Next, this was patterned in the same manner as in Example 1 to form a plurality of hole-shaped patterns 55 in the laminated film (FIG. 4A). However, in FIG. 4, only a part of the 20 layers is displayed. Further, when this was oxidized, the oxidation proceeded from the side surface of the hole, and finally the oxidized region contacted between the closest holes, and the original laminated film structure 56 remained at the intersection of the diagonal lines connecting the four holes. (FIG.4 (b)). The oxidation was stopped when the dimension L in the plane direction of the remaining region of the laminated film became about 10 nm.

As a result, a cubic silicon 0-dimensional quantum box 57 having a side length of 10 nm is formed in a direction 20 perpendicular to the substrate.
A structure arranged with a period of nm was obtained. Although the film thickness and the number of layers are not limited to the values in this embodiment, the size of the quantum box is preferably 20 nm or less.

When the photoluminescence was measured by subjecting the structure obtained in this example to photoexcitation, luminescence was observed in the visible region.

(Embodiment 3) FIG. 5 shows a third embodiment of the present invention. On the Si substrate 60, 20 layers of a multilayer film composed of a polysilicon film 61 having a film thickness of 10 nm and a silicon oxide film 62 having a film thickness of 10 nm and a laminated film composed of a silicon nitride film (not shown) were formed. Next, this was patterned by the same method as in Example 1 to be processed into a rectangular parallelepiped structure 64, and then a pair of side surfaces 65 of the rectangular parallelepiped was covered with a nitride film (not shown) (FIG. 5A). However, in FIG. 5, only a part of the 20 layers is displayed. The polysilicon in the laminated film was oxidized from the remaining pair of side surfaces not covered with the nitride film, leaving a laminated film structure extending in the longitudinal direction at the center of the rectangular parallelepiped. The oxidation was stopped when the width W (planar direction) of the remaining region of the laminated film became about 10 nm. Further, the nitride film was removed to obtain the structure shown in FIG. The cross section is approximately 10 nm square,
A structure was obtained in which 20 silicon one-dimensional quantum wires 67 extending in the longitudinal direction of the central part of the rectangular parallelepiped were arranged in a direction perpendicular to the substrate at a cycle of 20 nm. However, in FIG. 5B, a cross section of a rectangular parallelepiped is schematically shown. Next, a gate electrode 68 was formed on the oxide film and the nitride film so as to straddle the quantum wire 67, and a source 69 and a drain 70 electrodes were connected to both ends of the quantum wire group (FIG. 5C).

As a result of examining the electric characteristics of the above-mentioned device, an extremely high speed transistor action was confirmed. It is considered that this is because the mobility of electrons in the channel formed by the one-dimensional quantum wire 67 is extremely high. Moreover, no remarkable short channel effect was observed even if the channel length was reduced. Therefore, it is also suitable for miniaturization of elements.

The nitride film covering the side surface of the rectangular parallelepiped was used to increase the thickness of the thin wire at the end of the channel in order to facilitate connection between the thin wire channel and the gate and drain electrodes. It is preferable not to use it. In this case, it is desirable to remove the end of the rectangular parallelepiped by etching after oxidation to take out the thin wire to the outside. As in the second embodiment, it is necessary to pay sufficient attention to the connection between the thin wire and the electrode. If it is necessary to reduce the distance between the gate and the channel, the oxide film may be side-etched. The structure of the laminated film and the film thickness of each layer are not limited to those used in this embodiment. However, in order to obtain high-speed performance,
The thickness of the semiconductor layer is preferably 20 nm or less.
Further, in order to obtain sufficient transconductance, it is desirable that the number of thin wires is large. A semiconductor heterojunction structure may be used as the laminated film.

The positional relationship between the channel and the gate in this embodiment is similar to the DELTA structure proposed as one form of the SOI-MOS transistor. However, the channel in DELTA is normal MOSFE
Like T, it occurs along the gate oxide film, but in the present embodiment, it occurs only in a very limited region in the center of the insulating film across the gate. In this embodiment, the side surface of the channel is extremely smooth because it is determined by the interface between silicon and its oxide film, and the influence of electron scattering at the interface is small.

[0032]

According to the present invention, a laminated film including a semiconductor or metal thin film and an insulating thin film is formed on a substrate, which is processed and then oxidized from the side surface to form an oxidized region. Forming a one-dimensional quantum wire having a zero-dimensional quantum box or a minute tunnel junction surrounded by an oxide region, and a zero-dimensional quantum box or one-dimensional quantum wire consisting of a semiconductor or metal region sandwiched between an oxide region and an insulating thin film Therefore, by using the semiconductor microfabrication apparatus and device manufacturing apparatus used in the conventional Si integrated circuit manufacturing, it is possible to reduce the number of nanometers required for operating electronic devices such as single electronic elements and various quantum effect elements at room temperature. It is possible to process the dimensions with high precision.

In an electronic device, a columnar semiconductor or metal thin wire perpendicular to the substrate and a tunnel junction or a quantum box are provided in the middle of a cylindrical insulating film pattern, or a rectangular parallelepiped insulating film is provided. By providing a semiconductor or metal thin wire extending parallel to the substrate in the longitudinal direction of the central portion of the pattern, an electronic device having performance significantly exceeding that of a conventional electronic device can be obtained.

[Brief description of drawings]

FIG. 1 is a schematic diagram showing the principle of the present invention.

FIG. 2 is a characteristic diagram of a method for manufacturing an electronic device according to the present invention.

FIG. 3 is an explanatory view schematically showing a manufacturing process of an electronic device according to an embodiment of the present invention.

FIG. 4 is an explanatory view schematically showing a manufacturing process of an electronic device according to another embodiment of the present invention.

FIG. 5 is an explanatory view schematically showing a manufacturing process of an electronic device according to another embodiment of the present invention.

[Explanation of symbols]

1 ... Substrate, 2 ... Silicon film, 3 ... Insulating film, 4 ... Laminated film,
5 ... Cylinder, 6 ... Oxidized region, 7 ... Unoxidized region, 8 ... Boundary,
9 ... Silicon fine wire, 10 ... Island, 11, 12 ... Tunnel junction.

Claims (13)

[Claims] 1. A step of forming a laminated film including a semiconductor or metal thin film and an insulating thin film on a substrate, a step of processing the laminated film to form a laminated film pattern, and oxidizing the laminated film pattern from a side surface. In the laminated film, a one-dimensional quantum wire having a minute tunnel junction, or a zero-dimensional quantum box or one-dimensional quantum wire composed of an oxide region formed by the oxidation and a semiconductor or metal region sandwiched by the insulating thin film. A method of manufacturing an electronic device, comprising: 2. The laminated film pattern is a column that is substantially vertical to the substrate, and by oxidizing the columnar laminated film from the side surface, a minute tunnel junction or 0 extending in the direction substantially perpendicular to the substrate is formed at the center of the column. The method for manufacturing an electronic device according to claim 1, wherein a semiconductor thin wire or a metal thin wire including a dimensional quantum box is formed. 3. The laminated film has a structure in which a semiconductor or a metal thin film is sandwiched by a plurality of insulating films, the laminated film pattern is a horizontally long rectangular parallelepiped, and the rectangular parallelepiped laminated film is oxidized from a side surface thereof, A semiconductor thin wire or a metal thin wire extending in a direction substantially parallel to the substrate is formed in the rectangular parallelepiped.
A method for manufacturing an electronic device according to. 4. The laminated film is made of Si in order from the substrate side.
S, which includes a film, an insulating thin film, a Si film, an insulating thin film, and a Si film, and which is sandwiched by the insulating thin film or two insulating thin films
The method of manufacturing an electronic device according to claim 1, wherein each of the i films has a thickness of 20 nm or less. 5. The method for manufacturing an electronic device according to claim 1, wherein the oxidation is performed until the oxidation rate becomes one fifth or less of the value in the bulk of the semiconductor or metal. 6. A step of forming a laminated film including a semiconductor or metal thin film and an insulating thin film on a substrate, a step of processing the laminated film to form a laminated film pattern, and etching the laminated film pattern from a side surface. In the laminated film, a one-dimensional quantum wire having a minute tunnel junction, or a zero-dimensional quantum box or one-dimensional quantum wire composed of an oxide region formed by the oxidation and a semiconductor or metal region sandwiched by the insulating thin film. A method of manufacturing an electronic device, comprising: 7. A one-dimensional quantum wire having a minute tunnel junction formed in a laminated film by oxidizing a pattern made of a laminated film including a semiconductor or metal thin film and an insulating thin film formed on a substrate from a side surface, Alternatively, an electronic device comprising a 0-dimensional quantum box or a 1-dimensional quantum wire formed of a semiconductor region or a metal region sandwiched by the oxidized region and the insulating thin film formed by the oxidation. 8. An electron storage node having the vertical columnar semiconductor or metal thin wire and a cylindrical insulating region surrounding the thin wire on the substrate, the thin wire being sandwiched in the middle by a tunnel junction or a plurality of tunnel junctions. Or the electronic device according to claim 5, comprising a 0-dimensional quantum box. 9. The electronic device according to claim 5, further comprising a semiconductor or metal fine wire extending in a direction parallel to the substrate and an insulating region surrounding the fine wire. 10. The diameter of the thin wire, the electron storage node or 0.
The dimension quantum box has a dimension of 20 nm or less.
Or the electronic device according to 7. 11. The semiconductor according to claim 5, wherein the semiconductor is silicon.
The electronic device according to 6 or 7. 12. The electronic device according to claim 6, wherein a gate electrode is formed outside the cylindrical insulating region so as to surround the thin wire. 13. The electronic device according to claim 7, wherein a gate electrode is formed outside the insulating region so as to straddle the thin wire.