JPH08306787A - Semiconductor device and its fabrication - Google Patents

Abstract

PURPOSE: To enhance the reliability of interconnection by preventing the moisture contained in an interlayer SOG layer from causing deterioration of the lower layer interconnection. CONSTITUTION: Columnar protrusions 6 are formed on a lower layer interconnection 5 which is then covered by a silicon oxide layer 7 along with the protrusions 6. The lower layer interconnection 5 and the protrusions 6 are then covered with an SOG layer 8 and the upper surface of the protrusion 6 is exposed by etch back before forming an Al alloy interconnection 9 being connected electrically with the lower layer interconnection 5 through the protrusion 6. Since the Si oxide layer 7 blocks trace moisture or hydroxy group contained in the SOG layer 8, the lower layer interconnection 5 is protected against deterioration by moisture.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and more particularly to a multilayer wiring structure and a method for forming the same.

[0002]

2. Description of the Related Art In recent years, in multi-layer wiring adopted in highly integrated semiconductor devices, inter-wiring contact (via contact)
There is a demand for lower resistance and improved wiring reliability.
Moreover, semiconductor devices are becoming more highly integrated,
There is a demand for reducing the diameter of contact holes (also synonymous with via holes). However, if the diameter of the contact hole is reduced, it becomes difficult to deposit a wiring material having a sufficient thickness in the contact hole.

Therefore, it is known to form a columnar protrusion on the lower layer Al wiring, cover the wiring with an interlayer insulating film, and then electrically connect the upper layer wiring through the columnar protrusion.
No. 3943 (H01L21 / 90).

[0004]

As described in the conventional example, as an interlayer insulating film interposed between the lower layer wiring and the upper layer wiring, coating such as SOG film (Spin On Glass) excellent in flatness is applied. Membranes are used. However, such a coating film has a high water content, and the water content and the hydroxyl groups contained in the coating film corrode and deteriorate the surface of the lower Al wiring, thereby increasing the contact resistance of this portion and improving the reliability of the wiring. There is a problem of lowering.

The present invention relates to a semiconductor device and a method of manufacturing the same, and solves such a problem.

[0006]

According to another aspect of the present invention, there is provided a semiconductor device, wherein a boundary surface between a wiring and a first insulating film covering the wiring,
A second insulating film having higher water resistance than the first insulating film is interposed. According to a second aspect of the present invention, in the semiconductor device, a lower layer wiring having columnar protrusions is covered with a first insulating film except at least an upper surface of the columnar protrusions, and the lower layer wiring and the electrical wiring are electrically connected via the columnar protrusions. And a second insulating film having a higher water resistance than the first insulating film is interposed at the interface between the lower layer wiring and the first insulating film. It is a thing.

Further, in the semiconductor device according to the third aspect, a third insulating film having higher water resistance than the first insulating film is further provided on the boundary surface between the upper wiring and the first insulating film. It was made. The method for manufacturing a semiconductor device according to claim 5, further comprising: a step of forming columnar protrusions on the lower layer wiring; and a step of covering the lower layer wiring and the periphery of the columnar protrusion with a second insulating film having relatively high water resistance. A step of forming a first insulating film on the second insulating film, a step of exposing at least the upper surface of the columnar protrusion, and an upper layer wiring electrically connected through the columnar protrusion. And a step of forming.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a step of forming a columnar protrusion on the lower layer wiring and a second insulating film having a relatively high water resistance are provided around the lower layer wiring and the columnar protrusion. A step of covering, a step of forming a first insulating film on the second insulating film, a step of etching back the first insulating film to expose the tip end portion of the columnar protrusion, A step of covering the second insulating film covering the protrusions and the first insulating film with a third insulating film having a relatively high water resistance; a step of exposing at least the upper surface of the columnar protrusions; And a step of forming an upper wiring that is electrically connected.

According to a seventh aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein columnar protrusions are formed by etching an upper layer portion of a lower layer wiring material, and the lower layer wiring material is electrically conductive to an intermediate layer portion in advance. Having a conductive etching stopper layer,
The etching for forming the columnar protrusions is stopped at this etching stopper layer. A semiconductor device and a method for manufacturing a semiconductor device according to claim 4 or 8 are the same as those of the invention of claim 1, 2, 3, 5, 6 or 7, wherein the first insulating film is an inorganic SOG film or an organic SOG film.
In the film, the second insulating film or the third insulating film is a silicon nitride-based or silicon oxide-based insulating film.

Here, the second insulating film and the third insulating film may be of different types or of the same type. That is, since the lower layer wiring is provided with the columnar protrusions, the columnar protrusions serve as connection plugs for the upper layer wiring, and the connection state between the lower layer and the upper layer wiring is improved. Moreover, since the second insulating film blocks moisture and hydroxyl groups contained in the first insulating film, the lower wiring is less likely to be deteriorated by moisture.

Particularly, in the inventions of claims 3 and 6,
The third insulating film also protects the upper wiring from the influence of moisture. Further, in the invention of claim 7, the presence of the etching stopper layer allows the columnar projections to be formed with high accuracy.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) A first embodiment in which the present invention is embodied in a two-layer wiring will be described below with reference to FIG. FIG. 1 is a cross-sectional view showing the manufacturing process of a semiconductor device adopting the wiring structure of the first embodiment, which will be described in order below.

Step 1 (see FIG. 1A): A titanium (Ti) thin film 2 is formed on the substrate 1 by magnetron sputtering.
(Film thickness 50 nm), titanium nitride (TiN) thin film 3 (film thickness 100 nm), aluminum alloy film 4 (Al-Si (1%)-
The lower layer metal wiring 5 is formed by sequentially forming Cu (0.5%) (film thickness 1200 nm) from the bottom. The Ti thin film 2 and the TiN thin film 3 function as a barrier metal for preventing Al from reacting with a base material such as Si.

Step 2 (see FIG. 1B): First, the lower layer metal wiring 5 is processed to a predetermined width by using a normal lithography technique and a dry etching technique (RIE method, etc.), and further, a normal lithography technique and dry etching are performed. By using a technique, the aluminum alloy film 4 of the lower layer metal wiring 5 is processed to have a convex cross section, thereby forming a pillar-shaped (for example, a column or prism) protrusion 6 on the lower layer metal wiring 5. At the same time, the lower metal wiring 5 is thinned to a thickness of 600 nm.

Step 3 (see FIG. 1C): A plasma CVD method is used to deposit a silicon oxide film 7 of 100 nm on the surfaces of the substrate 1, the lower layer metal wiring 5 and the protrusions 6. The gases used in this plasma CVD method are monosilane and nitrous oxide (SiH ₄ + N ₂ O), monosilane and oxygen (SiH ₄
+ O ₂ ), TEOS (Tetra-ethoxy-silane) and oxygen (T
EOS + O ₂ ) and the like, and the film forming temperature is 300 to 400.
° C. Although the quality of the silicon oxide film 7 differs depending on the gas used, TEOS and oxygen are used in this embodiment. Alternatively, the silicon oxide film 7 may be formed using TEOS and ozone (O ₃ ) by the atmospheric pressure CVD method.
Since these silicon oxide films 7 have poor embedding characteristics, they are thinly deposited while taking over the shape of the base.

Further, an SOG film 8 is formed on the silicon oxide film 7. The SOG film 8 is an organic SO containing an organic component.
G film, and its composition is, for example, [CH ₃ Si (O
H) ₃ ]. As an example of the forming method, first, an ethanol solution of a silicon compound having the above composition is dropped on a substrate and the substrate is rotated at a rotation speed of 3000 rpm for 20 seconds to form a film of the solution on the substrate. At this time, the coating film of the ethanol solution is formed thicker in the concave portion and thinner in the convex portion than the step on the substrate so as to reduce the step. As a result, the surface of the ethanol solution coating is flattened.

Next, in air, at 80 ° C. for 1 minute,
When heat treatment is sequentially performed at 150 ° C. for 1 minute and 200 ° C. for 1 minute, ethanol evaporates and a polymerization reaction proceeds to form an SOG film having a substantially flat surface. This heat treatment is repeated a plurality of times (three times in this embodiment), and finally heat treatment is performed at 370 ° C. for 30 minutes in a nitrogen atmosphere to obtain an SOG film having a desired film thickness (maximum film thickness 600 nm in this embodiment). 8 is formed.

The above heat treatment may be performed by the following method. That is, in a nitrogen atmosphere, 100
1 minute at ℃, 1 minute at 200 ℃, 1 minute at 300 ℃, 2
One set at 2 ° C for 1 minute and 300 ° C for 30 minutes,
Repeat this multiple times. Step 4 (see FIG. 1D): The SOG film 8 and the silicon oxide film 7 are anisotropically etched back or polished by a chemical mechanical polishing method to expose the upper surfaces of the protrusions 6. Since the SOG film 8 is only thinly present on the upper surface of the protrusion 6, the etching time is short.

Step 5 (see FIG. 1E): An Al alloy film 9 (Al-Si (1%)-Cu) is formed on the SOG film 8 and on the exposed upper surface of the projection 6 by using a magnetron sputtering method.
(0.5%)) is formed. Then, by the ordinary lithography technique and dry etching technique (RIE method, etc.),
The aluminum alloy film 9 is patterned into a predetermined shape. (Second Embodiment) Next, a second embodiment in which the present invention is embodied in a two-layer wiring will be described with reference to FIGS.

2 to 4 are sectional views showing a manufacturing process of a semiconductor device adopting the wiring structure of the second embodiment, which will be described step by step below. However, the same components as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted. Step (1) (see FIG. 2A): An aluminum alloy film 4 (Al-Si (1%)-Cu (0.5%)) as the lower metal wiring 5 is formed on the substrate 1 by using a magnetron sputtering method. (Film thickness 1200 nm) is formed.

Step (2) (see FIG. 2B): After the resist 10 is applied, exposed and developed, the resist 10 is patterned into a predetermined shape. Step (3) (see FIG. 2C): Using the resist 10 as a mask, using a normal dry etching technique (RIE method or the like), the lower-layer metal wiring 5 has a columnar (or, of course, prismatic) protrusion. 6 is formed. At the same time, the lower metal wiring 5 is thinned to a thickness of 600 nm.

Step (4) (see FIG. 3D): After the resist 11 is coated, exposed and developed, the resist 11 is patterned into a predetermined shape. Step (5) (see FIG. 3E): Using the resist 11 as a mask, the lower-layer metal wiring 5 is separated and formed using a normal lithography technique and dry etching technique (RIE method or the like).

Further, a silicon nitride film 12 is deposited to 100 nm on the exposed surface of the substrate 1, the lower layer metal wiring 5 and the protruding portion 6 by using the plasma CVD method. This plasma C
The gas used in the VD method is a silane-based gas, ammonia, nitrogen or the like, and the film forming temperature is 300 to 400 ° C. Step (6) (see FIG. 3F): on the silicon nitride film 12,
The SOG film 8 is formed. The method of forming the SOG film 8 is the same as in the first embodiment.

After forming the SOG film 8 so as to cover the protrusion 6, the entire surface of the SOG film 8 is etched back to project only the tip of the protrusion 6. Step (7) (see FIG. 4G): A silicon oxide film 13 is deposited on the entire surface by plasma CVD. The method of forming the silicon oxide film 13 is the same as that in step 3 of the first embodiment.

Step (8) (see FIG. 4H): The silicon oxide film 13 and the silicon nitride film 12 are anisotropically etched back or polished by a chemical mechanical polishing method to polish the upper surface of the protrusion 6. Expose. Then, an Al alloy film 9 (Al-Si (1%)-Cu (0.5%)) is formed on the silicon oxide film 13 and on the exposed upper surfaces of the protrusions 6 by using a magnetron sputtering method.

Then, the aluminum alloy film 9 is formed by the usual lithography technique and dry etching technique (RIE method or the like).
Is patterned into a predetermined shape. As described above, in the second embodiment, the silicon nitride film 12 is interposed between the lower layer metal wiring 5 and the SOG film 8 to protect the lower layer metal wiring 5 from the moisture contained in the SOG film 8. Although the use of the silicon oxide film 7 as in the first embodiment has a sufficient water blocking effect, the silicon nitride film can be expected to have a better effect.

Moreover, in the second embodiment, since the silicon oxide film 13 is also interposed between the Al alloy film 9 and the SOG film 8, it is possible to prevent the Al alloy film 9 from being corroded. . Of course, the silicon oxide film 13 may be replaced with a silicon nitride film. (Third Embodiment) A third embodiment in which the present invention is embodied in a two-layer wiring will be described below with reference to FIG.

FIG. 5 is a cross-sectional view showing the manufacturing process of a semiconductor device adopting the wiring structure of the third embodiment, which will be described below in order. However, the same components as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted. Step (see FIG. 5A): A titanium (Ti) thin film 2 (having a film thickness of 50 n) is formed on the substrate 1 by using a magnetron sputtering method.
m), titanium nitride (TiN) thin film 3 (film thickness 100 n
m), aluminum alloy film 4 (Al-Si (1%)-Cu
(0.5%)) (film thickness 600 nm) is sequentially formed from the bottom. Further, a Ti thin film 14 is formed by a magnetron sputtering method.
(Film thickness 29 nm), aluminum alloy film 15 (Al-Si (1
%)-Cu (0.5%)) (film thickness 600 nm) is sequentially formed from the bottom to form the lower layer metal wiring 5.

The Ti thin film 2 and the TiN thin film 3 function as a barrier metal for preventing Al from reacting with a base material such as Si. Step (see FIG. 5B): The lower-layer metal wiring 5 is processed to have a predetermined width by using an ordinary lithography technique and a dry etching technique (RIE method, etc.), and further, by using an ordinary lithography technique and a dry etching technique, By processing the aluminum alloy film 15 of the lower-layer metal wiring 5 to have a convex cross-section, the pillar-shaped (eg, columnar or prismatic) protrusion 6 is formed on the lower-layer metal wiring 5.

When the aluminum alloy film 15 is processed, the aluminum alloy film 1 at a portion other than the protrusion 6 is set as an etching condition.
5 is controlled to etch 600 nm,
Due to the unevenness of the base, there may be some overetching in some places. However, this third
In the embodiment, since the Ti thin film 14 having an etching rate smaller than that of the aluminum alloy film 15 is provided below the aluminum alloy film 15, the Ti thin film 14 serves as an etching stopper.
Therefore, the lower metal wiring 5 can secure a film thickness of at least 600 nm as much as the aluminum alloy film 4.

Step (see FIG. 5C): Using the same method as in the first embodiment, the substrate 1, the lower layer metal wiring 5 and the protrusion 6 are formed.
A silicon oxide film 7 is deposited to 100 nm on the surface of the. Further, the SOG film 8 is formed on the silicon oxide film 7 by using the same method as that of the first embodiment. Step (see FIG. 5D): The SOG film 8 and the silicon oxide film 7 are anisotropically etched back or polished by a chemical mechanical polishing method to expose the upper surfaces of the protrusions 6. Since the SOG film 8 is only thinly present on the upper surface of the protrusion 6, the etching time is short.

Step (see FIG. 5E): An Al alloy film 9 (Al-Si (1%)-Cu) is formed on the SOG film 8 and the exposed upper surface of the protrusion 6 by using a magnetron sputtering method.
(0.5%)) is formed. Then, by the ordinary lithography technique and dry etching technique (RIE method, etc.),
The aluminum alloy film 9 is patterned into a predetermined shape.

The present invention is not limited to the above embodiment, and similar effects can be obtained even if the following modifications are made. 1) As the sputtering method, other than magnetron sputtering, diode sputtering, high frequency sputtering, quadrupole sputtering, or the like may be used.

2) The silicon oxide film and the silicon nitride film are C
Methods other than VD method (PVD method such as sputtering method or vapor deposition method,
It may be formed by an oxidation method). 3) Replace the silicon oxide film with another insulating film (alumina, silicon nitride film, titanium oxide film, etc.). 4) An inorganic SOG film containing no organic component is used as the SOG film. Inorganic SOG represented by the general formula (1) is used for the SOG film.
There are a film and an organic SOG film represented by the general formula (2).

[SiO ₂ ] _n ... (1) [R _x SiO _y ] _n ... (2) (n, x, y: integer, R: alkyl group or aryl group) The organic SOG film is composed of molecules. Since there is a structure where the bond is closed by an alkyl group or an aryl group, the occurrence of cracks during heat treatment is suppressed, and the film thickness is 0.7 μm to 1.
It can be about 0 μm. Therefore, by using the organic SOG film, it is possible to obtain an interlayer insulating film having a large film thickness, and it is possible to sufficiently flatten even a large step on the substrate.

On the other hand, the inorganic SOG film contains a large amount of water and hydroxyl groups and is more fragile than the silicon oxide film formed by the CVD method and has a film thickness of 0.5 μm.
The above-mentioned has a drawback that cracks are likely to occur during heat treatment. Therefore, when the SOG film and the inorganic SOG film are used, it is necessary to form the film more times than when the organic SOG film is used.

5) When an organic SOG film is used as the SOG film 8, the SOG film 8 is subjected to oxygen plasma treatment. As a result, the C-Si bond in the organic SOG film becomes Si-O-Si.
It is changed into a bond, and the organic component contained in the organic SOG film is decomposed to improve the film quality. 6) Instead of the aluminum alloy films 4 and 15, tungsten (W), copper (Cu), AlCu alloy, or the like is used.

7) Instead of the Ti thin film 14, TiN, Ti
W, W, etc. are used. These conductive materials have a smaller etching rate than the conductive material described in 6) above, and sufficiently function as an etching stopper when the conductive material described in 6) above is etched. Incidentally, while the etching rate of the aluminum alloy film 15 is 600 nm / min, the etching rate of the Ti thin film 14 is 400 n / min.
m / min, and the ratio of both (Ti thin film 14 / aluminum alloy film 15) is 2/3.

In this embodiment, in order for these conductive materials to effectively function as an etching stopper,
It is desirable that the above ratio is 2/3 or less. Particularly, for the aluminum alloy films 4 and 15, TiW and W are more suitable as the etching stopper.

[0040]

In the semiconductor device and the method of manufacturing the same according to the present invention, since the columnar protrusions are provided on the lower layer wiring, the columnar protrusions serve as connection plugs for the upper layer wiring and serve as a connection plug between the lower layer and the upper layer wiring. The connection is good. Moreover, since the second insulating film blocks moisture and hydroxyl groups contained in the first insulating film, the lower wiring is less likely to be deteriorated by moisture.

According to the inventions of claims 3 and 6,
In addition to the above effects, the third insulating film also protects the upper wiring from the influence of moisture. Further, according to the invention of claim 7, in addition to the above effect, a stable lower layer wiring film thickness can be obtained even after the etching processing of the columnar projections. Therefore,
According to the present invention, the reliability of the wiring of each layer can be improved.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a manufacturing process of a wiring structure of a first embodiment in which a semiconductor device of the present invention is embodied.

FIG. 2 is a cross-sectional view showing the manufacturing process of the wiring structure of the second embodiment which embodies the semiconductor device of the present invention.

FIG. 3 is a cross-sectional view showing the manufacturing process of the wiring structure of the second embodiment which embodies the semiconductor device of the present invention.

FIG. 4 is a cross-sectional view showing the manufacturing process of the wiring structure of the second embodiment which embodies the semiconductor device of the present invention.

FIG. 5 is a cross-sectional view showing the manufacturing process of the wiring structure of the third embodiment which embodies the semiconductor device of the present invention.

[Description of Reference Signs] 5 Lower Metal Wiring 6 Protrusion (Columnar Protrusion) 7 Silicon Oxide Film (Second Insulating Film) 8 SOG Film (First Insulating Film) 9 Al Alloy Wiring (Upper Layer Wiring) 12 Silicon Nitride Film ( Second insulating film 13 Silicon oxide film (third insulating film) 14 Ti thin film (etching stopper layer)

Front Page Continuation (72) Inventor Hirotoshi Kubo 2-5-5 Keihan Hondori, Moriguchi City, Osaka Sanyo Electric Co., Ltd.

Claims (8)

[Claims] 1. A semiconductor device, wherein a second insulating film having a higher water resistance than the first insulating film is interposed at a boundary surface between the wiring and the first insulating film covering the wiring. 2. An upper layer wiring having a columnar protrusion, which is covered with a first insulating film except at least an upper surface of the columnar protrusion, and which is electrically connected to the lower layer wiring through the columnar protrusion. And a second insulating film having higher water resistance than the first insulating film is interposed at a boundary surface between the lower wiring and the first insulating film. apparatus. 3. An upper layer wiring having a columnar protrusion, which is covered with a first insulating film except at least an upper surface of the columnar protrusion, and which is electrically connected to the lower layer wiring through the columnar protrusion. A second insulating film having a higher water resistance than the first insulating film is interposed at the boundary surface between the lower wiring and the first insulating film, and the upper wiring and the first insulating film are provided. A semiconductor device, wherein a third insulating film having higher water resistance than the first insulating film is interposed on a boundary surface with the first insulating film. 4. The first insulating film is an inorganic SOG film or an organic SOG film, and the second insulating film or the third insulating film is a silicon nitride-based or silicon oxide-based insulating film. The semiconductor device according to any one of claims 1 to 3, which is characterized. 5. A step of forming a columnar protrusion on the lower layer wiring, a step of covering the periphery of the lower layer wiring and the columnar protrusion with a second insulating film having a relatively high water resistance, and a step of forming a columnar protrusion on the second insulating film. A step of forming a first insulating film, a step of exposing at least an upper surface of the columnar protrusion, and a step of forming an upper layer wiring electrically connected through the columnar protrusion. And a method for manufacturing a semiconductor device. 6. A step of forming a columnar protrusion on the lower layer wiring, a step of covering the periphery of the lower layer wiring and the columnar protrusion with a second insulating film having a relatively high water resistance, and a step of forming a columnar protrusion on the second insulating film. A step of forming a first insulating film, a step of etching back the first insulating film to expose a tip portion of the columnar protrusion, a second insulating film covering the columnar protrusion and the first insulating film. A step of covering the insulating film with a third insulating film having a relatively high water resistance; a step of exposing at least the upper surface of the columnar protrusion; and an upper wiring that is electrically connected through the columnar protrusion. A method of manufacturing a semiconductor device, comprising: 7. The columnar protrusion is formed by etching an upper layer portion of a lower layer wiring material, and the lower layer wiring material has a conductive etching stopper layer in the middle layer portion in advance. 7. The method for manufacturing a semiconductor device according to claim 5, wherein the etching for forming is stopped at this etching stopper layer. 8. The first insulating film is an inorganic SOG film or an organic SOG film, and the second insulating film or the third insulating film is a silicon nitride-based or silicon oxide-based insulating film. The method for manufacturing a semiconductor device according to claim 5, wherein the method is characterized in that.