JPH08288626A - Ic and printed wiring board - Google Patents

Abstract

PURPOSE: To lead out pad connecting patterns for power supply and for grounding potential to the outside of an IC in paring states by paring each pad for power supply with each pad for grounding potential and arranging the pads together with the outermost connecting pads of the IC. CONSTITUTION: Sets of three power supply pads 2 and three grounding pads 3, in which the rows of the pads 2 and 3 are arranged in parallel, are arranged in series together with the outermost connecting pads of an IC 1. Power supply patterns 4 and grounding patterns 5 are respectively formed at the positions corresponding to the pads 2 and 3 of the IC on a wiring board. Since the pads 2 and 3 of the flip chip IC 1 are arranged together with the outermost connecting pads of the IC 1, power supply patterns 4 and grounding patterns 5 on the wiring board can be led out to the outside of the IC 1 in a pairing state.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC connection pad arrangement and a printed wiring board on which the IC is mounted.

[0002]

2. Description of the Related Art In a package of an IC, a flip chip, a BGA (ball grid array), or a PGA (pin. Packages such as grid arrays) are used.

FIG. 5 shows an example of the layout of connection pads of a flip-chip IC in these IC packages, and the ICs thereof.
FIG. 6 shows a state in which is mounted on a printed wiring board. FIG. 5 is a diagram showing an arrangement example of connection pads of a conventional IC, and FIG. 6 is a perspective view showing a state in which the IC shown in FIG. 5 is mounted on a printed wiring board.

In FIG. 5, a flip chip IC 101 is shown.
A plurality of connection pads for electrical connection are arranged in a grid pattern on the bottom surface of the. Of these connection pads, the power supply pad 102 (indicated by the diagonal line to the lower right) is the IC
Is a connection pad for a direct current power supply for supplying electric power to the ground pad 103, and the ground pad 103 (shown by a slanting line descending to the left) is a connection pad for a ground potential (hereinafter referred to as ground).

In a custom IC or the like designed and manufactured for each user's unique purpose, the positions of the power supply pad 102 and the ground pad 103 are taken into consideration in consideration of easiness of IC circuit design and allowable current value of the output buffer. They were determined, and they were arranged without considering their mutual positional relationship.

In FIG. 6, pads made of a conductive film are formed on the printed wiring board so as to correspond to the positions of the respective connection pads of the flip chip IC 101, and the respective connection pads of the flip chip IC 101 and the printed wiring board are formed. Each pad is electrically connected by solder or the like. A pattern made of a conductive film is connected to each pad on the printed wiring board to form an arbitrary circuit.

The power supply pad 1 on the printed wiring board
A decoupling capacitor 106 for reducing electromagnetic wave radiation noise is inserted between the pattern connected to the pad corresponding to 02 and the pattern connected to the pad corresponding to the ground pad 103.

[0008]

However, in the printed wiring board on which the conventional IC as described above is mounted,
Since the positions of the power supply pad and the ground pad of the IC are predetermined only on the side of the IC, the position of the decoupling capacitor may be far from the power supply pad or the ground pad depending on the pattern layout. Further, at the positions of the power supply pad and the ground pad as shown in FIG. 6, it is difficult to arrange the decoupling capacitors for the individual power supply pads and the ground pads because they interfere with other patterns.

Therefore, as the operation speed of ICs represented by CPUs has increased remarkably in recent years, electromagnetic wave radiation noise from a printed wiring board on which these ICs are mounted has become a problem.

On the other hand, when the decoupling capacitor is arranged in the immediate vicinity of the power supply pad or the ground pad in order to effectively operate the decoupling capacitor, the method of disposing the decoupling capacitor on the surface opposite to the IC mounting surface is a method. is there. However, the power supply pattern and the ground pattern connected to the decoupling capacitor must be connected to the power supply pattern and the ground pattern on the mounting surface of the IC by using through holes, and the area occupied by the through holes increases and other There is a problem that it becomes difficult to arrange the pattern.

The present invention has been made in order to solve the problems of the above-mentioned conventional techniques. When an IC having a plurality of connection pads on the bottom surface of a package is mounted on a printed wiring board, The purpose is to effectively dispose a decoupling capacitor to reduce electromagnetic radiation noise from a printed wiring board.

[0012]

In order to achieve the above object, an IC of the present invention includes a power supply pad for electrically supplying power to the IC, which is electrically connected to a printed wiring board on the bottom surface of the package. In an IC in which a plurality of connection pads including a ground potential pad are formed, the power supply pad and the ground potential pad are arranged in a pair including the outermost connection pad.

The printed wiring board on which the IC of the present invention is mounted is provided on the bottom surface of the package, which is electrically connected to the printed wiring board, and which is used for supplying power to the IC and for the ground potential. A printed wiring board on which an IC is formed, in which a plurality of connection pads including pads are formed, and the power supply pad and the ground potential pad are paired and arranged to include the outermost connection pad, The decoupling capacitor is arranged between the pattern connected to the power supply pad and the pattern connected to the ground potential pad.

[0014]

In the IC of the present invention configured as described above, the power supply pad and the ground potential pad are arranged in pairs to include the outermost connection pads of the IC. When it is mounted on a wiring board, a pattern for connecting to a power supply pad and a pattern for connecting to a ground potential pad can be paired and pulled out to the outside of the IC. Therefore, there is no interference with other patterns, and it becomes possible to arrange the decoupling capacitor in the vicinity of the IC using the shortest and thickest pattern.

[0015]

Embodiments of the present invention will now be described with reference to the drawings.

(First Embodiment) FIG. 1 shows a first IC of the present invention.
FIG. 2 is a diagram showing a connection pad arrangement of the embodiment, and FIG. 2 is a perspective view showing a state of the first embodiment when the IC shown in FIG. 1 is mounted on a printed wiring board. In this embodiment, a flip-chip package IC will be described as an example of ICs having a plurality of connection terminals arranged on the bottom surface of the package.

In FIG. 1, a plurality of connection pads for electrical connection are arranged in a grid pattern on the bottom surface of the flip chip IC 1. Among these connection pads, the power supply pad 2 (indicated by the diagonal line descending to the right) is a power supply connection pad for supplying power to the IC, and the ground pad 3 (indicated by the diagonal line descending to the left) is the ground potential (hereinafter This is a connection pad for the ground).

Here, the power supply pads 2 and the ground pads 3 are arranged in series so as to include the outermost connection pads of the IC with each set of three connection pads, and the row of the power supply pads 2 and the ground pad 3 are arranged. The rows are arranged side by side.

On the other hand, on the printed wiring board, as shown in FIG. 2, pads made of a conductive film are formed so as to correspond to the positions of the connection pads of the flip chip IC1, and the connection pads of the flip chip IC1 and the prints are formed. The pads on the wiring board are electrically connected by solder or the like.

A power supply pattern 4 and a ground pattern 5 are formed at positions corresponding to the power supply pad 2 and the ground pad 3 of the flip chip IC 1, respectively.
A power supply pattern 4 is provided outside the flip chip IC1.
A decoupling capacitor 6 for reducing electromagnetic wave radiation noise is provided between and the ground pattern 5.

In such a structure, the power supply pad 2 and the ground pad 3 of the flip chip IC 1 are arranged so as to include the outermost connection pads of the IC as shown in FIG. Flip chip I with pattern 4 and ground pattern 5 paired
It can be pulled out to the outside of C1.

Therefore, the power supply pattern 4 and the ground pattern 5 can be made the shortest and thickest pattern without interference from other patterns, and the decoupling inserted between the power supply pattern 4 and the ground pattern 5 can be performed. The capacitor 6 can be arranged near the flip chip IC 1. Then, it becomes possible to dispose the decoupling capacitor 6 in the vicinity of the IC for all the power supply pads and the ground pads, and the electromagnetic wave radiation noise from the substrate is reduced.

Further, since the pattern from the decoupling capacitor 6 to the power supply pad 2 and the ground pad 3 can be thickened, the inductance of the pattern is lowered and the electromagnetic radiation noise from the substrate is further reduced.

(Second Embodiment) FIG. 3 is a perspective view showing a state of a second embodiment when the IC shown in FIG. 1 is mounted on a printed wiring board. FIG. 4 is a diagram showing a pattern of an inner layer of the printed wiring board shown in FIG.

In this embodiment, a multilayer substrate is used as the printed wiring board, and the power supply pattern 14 on the surface layer of the printed wiring board shown in FIG. 3 and the inner layer power supply pattern 24 formed on the inner signal line layer shown in FIG. 3 and the inner layer ground pattern 25 formed in the inner signal line layer shown in FIG. 4 are connected by the ground through hole 8. The other structure is similar to that of the first embodiment, and the description thereof is omitted.

With this structure, the inductance of the pattern from the decoupling capacitor 16 to the power supply pad and the ground pad of the flip chip IC 11 is further reduced, so that the electromagnetic radiation noise from the printed wiring board is further reduced. It

In each of the above embodiments, the power supply pad and the ground pad are described as an example in which three connection pads are arranged as one set, but three connection pads are provided.
It does not need to be a set and may be one connection pad or a plurality of connection pads as long as it includes the outermost connection pads of the IC.

In each of the above embodiments, the IC of the flip chip package has been described as an example, but the PGA (pin grid array) in which a plurality of connection terminals are arranged on the bottom surface of the IC is not limited to the Fritz chip. And BGA (ball
The above embodiments can be applied to a grid array).

[0029]

Since the present invention is constructed as described above, it has the following effects.

Since the power supply pad and the ground potential pad are arranged as a pair including the outermost connection pad of the IC, when mounted on the printed wiring board of the present invention, a pattern for connecting to the power supply pad. It becomes possible to draw out to the outside of the IC in pairs with the pattern connected to the ground potential pad. Therefore, the interference with other patterns is eliminated, and it becomes possible to arrange the decoupling capacitor in the vicinity of the IC using the shortest and thickest pattern, and reduce the electromagnetic radiation noise from the printed wiring board. .

[Brief description of drawings]

FIG. 1 is a diagram showing an arrangement of connection pads of a first embodiment of an IC of the present invention.

FIG. 2 is a perspective view showing a state of a first embodiment when the IC shown in FIG. 1 is mounted on a printed wiring board.

FIG. 3 is a perspective view showing a state of a second embodiment when the IC shown in FIG. 1 is mounted on a printed wiring board.

4 is a diagram showing a pattern of an inner layer of the printed wiring board shown in FIG.

FIG. 5 is a perspective view showing an arrangement example of connection pads of a conventional IC.

6 is a perspective view showing a state in which the IC shown in FIG. 5 is mounted on a printed wiring board.

[Explanation of symbols]

 1, 11 Flip chip IC 2 Power supply pad 3 Ground pad 4, 14 Power supply pattern 5, 15 Ground pattern 6, 16 Decoupling capacitor 7 Power supply through hole 8 Ground through hole 24 Inner layer power supply pattern 25 Inner layer ground pattern

 ─────────────────────────────────────────────────── ─── Continued front page (72) Inventor Hideho Inagawa 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Tomoyasu Arakawa 3-30-2 Shimomaruko, Ota-ku, Tokyo Kya (72) Inventor Koji Hirai 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Toru Otaki 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc.

Claims (2)

[Claims] 1. An IC in which a plurality of connection pads including a power supply pad for supplying electric power to the IC and a ground potential pad, each of which is electrically connected to a printed wiring board, is formed on the bottom surface of the package. An IC characterized in that the power supply pad and the ground potential pad are arranged in a pair including the outermost connection pad. 2. A plurality of connection pads including a power supply pad for supplying power to an IC and a ground potential pad, each of which is electrically connected to a printed wiring board, is formed on a bottom surface of the package. Is a printed wiring board on which is mounted an IC in which a pad for power supply and the pad for ground potential are paired and include an outermost connection pad, and a pattern for connecting to the pad for power supply and the pad for ground potential A printed wiring board, wherein a decoupling capacitor is arranged between the pattern and the pattern to be connected to.