JPH08250663A - Semiconductor device - Google Patents

Abstract

(57) [Summary] (Modified) [Purpose] A high resistance element that suppresses the variation of resistance value in the chip as much as possible by forming a spiral shape with polycrystalline silicon of low resistance sheet resistance, A semiconductor device in which the high resistance element is integrated is provided. [Structure] Terminals 11 at both ends of a strip of polycrystalline silicon 1 are arranged diagonally. This example shows a resistance element having a square spiral.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a power IC or an integrated circuit in which a spiral resistance element is formed on a semiconductor substrate.

[0002]

2. Description of the Related Art In recent years, due to advances in isolation techniques such as junction isolation and dielectric isolation, high breakdown voltage devices such as insulated gate bipolar transistors (hereinafter abbreviated as IGBTs) and MOSFETs and their drive / control / protection circuits have been developed. High-voltage power ICs integrated on two silicon substrates have been actively developed. Advances in dielectric isolation technology have enabled the integration of multiple high-voltage bipolar devices and have greatly expanded the application fields of power ICs. For example, IGBTs are being applied to integrated circuits having multiple outputs, such as a totem pole circuit to which the IGBT is applied and a display driving IC.

In the power IC in which the high breakdown voltage portion and the low breakdown voltage portion as described above are integrated on one chip, several kΩ to several hundred kΩ.
High resistance element (here, it means a resistance having a high resistance value formed on a semiconductor substrate) is required. As one example, FIG. 7 shows one of the output stage circuits of a 250 V rated plasma display driving IC. p channel MOSFE
T (Q ₁ ) 41 and n-channel MOSFET (Q ₂ ) 42
And are connected in a complementary manner to form one arm of the output stage circuit. n-channel MOSFET (Q _L)
Reference numeral 43 is a level shifter circuit, Zener diode 44 is for protection, and high resistance element (R ₁ ) 51 is a component of the level shifter circuit. In addition, a high resistance element (R ₂₁ ) 521
Is a current limiting resistor. R ₁ is about 50 kΩ, R
₂₁ is 900 kΩ. The source side of Q ₁ is connected to the high voltage power supply terminal (V _DH ), and the drain side of Q ₂ (connected to the drain side of Q ₁ ) is the output terminal (D ₁ but the nth output terminal is 62, which is D _n ). The gate of Q _L is connected to the input terminal (I _P) 63, Q
_{The second} gate is connected to the input terminal (I _n ) 64. Q _L
And the source side of Q ₂ is at ground potential. In this circuit, a resistance element of about 100 kΩ is used in the level shifter section. This IC is a multi-output having multi-bit output stages, and 100 kΩ resistance elements are formed on one chip by the number of bits.

FIG. 8 shows an example of a circuit diagram employing a high resistance element. This is an output stage circuit of an inverter IC that drives a small 3-phase motor of 50 W class. The circuit configuration will be described. An output stage circuit is configured by the IGBT (Q ₃ ) 45 and the IGBT (Q ₄ ) 46, the collector side of Q ₃ is connected to the high voltage power supply terminal (V _DH ) 61, and the collector side of Q ₄ (emitter of Q ₃ Connected to the side) is connected to the output terminal 62 (in the case of three phases, U phase, V phase, W phase). The gate of Q ₃ is connected to the drain of p-channel MOSFET (Q _p ) 47. The high resistance element (R ₃ ) 52 is a discharge resistance of about 16 kΩ. A high resistance element (R ₂ ) 53 of about 15 kΩ for the level shifter circuit and a protection diode 44 (zener diode) are connected in parallel between the source and drain of Q _p . A DC power supply (V _c ) 7 for the level shifter circuit is connected between V _HD and the output terminal 62. N-channel MOSFET level shifter circuit (Q _L) 43 is connected to R ₂ to about 4kΩ emitter follower circuit for the high-resistance element (R ₄₎ 54,
The other end of R ₄ has a ground potential. The gate of Q _L and Q ₄ are connected to the input terminal (Iu) 65 and an input terminal (Id) 66. In this circuit, the emitter follower system is adopted in the level shifter section, and a resistance element of several kΩ to several tens of kΩ is used. In this IC, the output stage circuits for three phases, that is, the circuits of FIG. 8 are integrated on one chip.

In addition to the above two examples, a high resistance element of several MΩ is also applied to a power supply self-supplying circuit for supplying the power supply of the control / driving circuit section from a load power supply of high withstand voltage. Generally, a resistor on an integrated circuit is made of polycrystalline silicon or a diffusion layer. When the resistance element is formed of polycrystalline silicon, high-concentration implanted low-resistance polycrystalline silicon having a sheet resistance of 30Ω / □ to 50Ω / □ is used. This is because the temperature characteristics of polycrystalline silicon having a high sheet resistance are poor. For example, it is formed by ion-implanting arsenic of 5 × 10 ¹⁵ cm ⁻² , and is formed by ion-implanting boron of 8 × 10 ¹³ cm ⁻² for a sheet resistance of about −0.3 Ω / ° C. The temperature coefficient of polycrystalline silicon having a sheet resistance of about 8 kΩ / □ is about −4Ω / ° C., which is almost an order of magnitude higher. Therefore, even in the formation of the high resistance element, it is formed of polycrystalline silicon having a low resistance sheet resistance.

However, when the high resistance element is made of polycrystalline silicon having a low resistance sheet resistance, the length of the polycrystalline silicon becomes abnormally long. For example, when the resistance element of 10 kΩ is formed of polycrystalline silicon having 50 Ω / □,
If the width of the polycrystalline silicon is 1 μm, a total length of 200 μm is required. In order to accommodate this length within a small area, in an actual integrated circuit, for example, a shape as shown in FIG. 9 is formed so as to fill an empty space or immediately below the aluminum wiring.

FIG. 9 is a pattern diagram of a conventional resistance element. The strip-shaped polycrystalline silicon 1 is formed in a reciprocating pattern, and terminals 11 are provided at both ends. In such a pattern, the length of the strip becomes long in either the vertical direction or the horizontal direction. In this example, when the vertical direction is the vertical direction, the length of the vertical band becomes overwhelmingly long. Polycrystalline silicon resistance elements such as portrait or landscape that are long only in one direction are widely used in actual integrated circuits. However, such resistance elements with a large vertical to horizontal ratio are available in the chip. There is a large variation in the resistance value of. This occurs because ion implantation is performed in a state where the wafer surface is inclined with respect to the ion implantation surface when the polycrystalline silicon is doped by ion implantation. That is, even in the case of polycrystalline silicon having the same pattern, the ions may be easily implanted in the vertical direction or the ions may be easily implanted in the horizontal direction depending on the arrangement location in the chip. When the value of the resistance element is small, the total length of the polycrystalline silicon is short, so the effect does not appear so much, but in the high-resistance element, the total length of the polycrystalline silicon becomes long, so this effect becomes remarkable, and the characteristics of the integrated circuit vary. It is the cause of the occurrence.

[0008]

As described above, when the high resistance element is made of polycrystalline silicon having a low resistance sheet resistance, the length of the polycrystalline silicon becomes abnormally long.
A resistance element having a large vertical to horizontal ratio is likely to be formed. Such a resistance element having a large vertical-to-horizontal ratio easily causes variations in sheet resistance within the chip, which causes variations in characteristics of integrated circuits.

In order to solve the above-mentioned problems, the object of the present invention is to suppress the variation of the resistance value in the chip as much as possible by forming the spiral shape of the low resistance sheet resistance polycrystalline silicon. A high resistance element is provided, and a semiconductor device in which the high resistance element is integrated is provided.

[0010]

In order to achieve the above-mentioned object, a resistance element formed on a semiconductor substrate is formed of polycrystalline silicon having a spiral shape, and
That is, the terminals provided at both ends of the spiral shape are formed at the outermost peripheral portion. It is effective that a resistance element is formed on this semiconductor substrate via an insulating film. Further, in order to adjust to a predetermined resistance value, the resistance element is formed of polycrystalline silicon into which a predetermined amount of any one of impurities of arsenic, phosphorus and boron is introduced. It is effective that the resistance value of this polycrystalline silicon is 10 Ω / □ to 100 Ω / □. Further, the terminals provided at both ends of the spiral shape may be formed so as to be diagonal or adjacent to each other. This spiral shape is a square or a circle.

[0011]

[Function] When polycrystalline silicon is laminated on a semiconductor substrate and arsenic or boron is ion-implanted to adjust the resistance, the semiconductor substrate is not placed perpendicularly to the ion-implantation direction, but about twice on a vertical surface. Place it at an angle. This is generally known as a method for increasing the ion implantation efficiency. However, the inclination of 2 degrees makes the left-right direction (X direction) of the semiconductor substrate almost uniform, but in the up-down direction (Y direction), the upper surface is slightly closer to the ion source than the lower surface. Is larger than the lower surface, and as a result, variations occur in the vertical direction. That is, the variation in sheet resistance in the semiconductor substrate is small in the X direction and large in the Y direction.

When the resistance element is formed on the semiconductor substrate, it is formed of a long strip-shaped polycrystalline silicon having a narrow width. The direction of this band is a problem, and the resistance element is generally formed regardless of the X and Y directions. Therefore, when a resistance element is formed in a comb shape as in the conventional case, a large amount of component in either the X direction or the Y direction is included, and thus the variation in the arrangement of the resistance elements becomes large. When the resistance elements are formed in a spiral shape so that the length and width are substantially equal as in the present invention, the components in the X direction and the Y direction are included almost uniformly regardless of the direction in which the resistance elements are arranged, and variations in A small number of resistance elements can be obtained. Particularly, the effect is exerted when a resistance element having a high resistance value, that is, a resistance element having a long strip of polycrystalline silicon is formed with little variation.

[0013]

FIG. 1 is a pattern diagram of a spiral resistance element according to the first embodiment. Terminals 1 at both ends of the strip of polycrystalline silicon 1
1 is arranged on a diagonal line. This example shows a resistance element having a square spiral. The width of the band is W, the interval is d, and the length of each side is l _n (n is an integer). The total length L of the resistance element is expressed by the following equation.

[0014]

[Equation 1] l ₀ : initial length k: number of turns FIG. 2 is a pattern diagram of the spiral resistance element of the second embodiment. The terminals 11 at both ends of the strip of polycrystalline silicon 1 are arranged adjacent to each other. This example also shows a resistance element having a square spiral. The width of the band is W, the interval is d, and the length of each side is l _n (n is an integer). The total length L of the resistance element is expressed by the following equation.

[0015]

[Equation 2] k ≧ 2 l ₀ : initial length k: number of windings initial length l ₀ is 3 μm, width W of polycrystalline silicon is 2 μm,
When the distance d is 1 μm, the total length of the polycrystalline silicon of the pattern (layout diagram) shown in FIGS. 1 and 2 is as shown in Table 1 depending on the number of turns k.

[0016]

[Table 1] Table 1 (unit: μm) k: 1 2 3 4 5 Pattern of FIG. 1: 21 63 129 219 333 Pattern of FIG. 2: −42 96 174 276 For example, phosphorus is 1.5 × 10 ¹⁶ cm ⁻ The sheet resistance of polycrystalline silicon that has been ion-implanted at a dose of ² and then annealed (heat-treated) at 900 ° C. for 10 minutes is 30Ω.
It becomes / □. When a resistance element is formed of this polycrystalline silicon, the resistance value of the polycrystalline silicon shown in Table 1 is as shown in Table 2. Of course, the sheet resistance may be smaller or larger than 30Ω / □, but the practically useful range is 10Ω / □.
□ to 100Ω / □ is good.

[0017]

[Table 2] Table 2 (Unit: kΩ) k: 1 2 3 4 5 Pattern of FIG. 1: 0.63 1.89 3.87 6.57 9.99 Pattern of FIG. 2: − 1.26 2.88 5.22 8.28 FIG. 3 is a pattern of FIG. An example of the case where the resistance element is manufactured will be shown. Sheet resistance and layout conditions of polycrystalline silicon 1 (width of polycrystalline silicon band,
The interval, etc.) is the same as in the equation (1). Polycrystalline silicon 1
Electrodes 11 are arranged at both ends of the. Initial length l ₀ is 3μ
m and the number of turns k were 5. The resistance value of this pattern is 9.
It is 10 kΩ when 99 kΩ is rounded off to two decimal places. The area required to form this resistance element is approximately 30 μm ×
It is 30 μm.

FIG. 4 shows the pattern of FIG. 2 with a resistance value of 10 kΩ.
An example of the case where the resistance element is manufactured will be shown. The sheet resistance and layout conditions of the polycrystalline silicon 1 (width of the polycrystalline silicon band, spacing, etc.) are the same as in the equation (2). The initial length l ₀ was 6 μm, and the number of turns k was 5. The resistance value of this pattern is 9.99 kΩ and the decimal point is rounded to 2 digits to 10 k.
Ω. The area required to form this resistance element is approximately 33 μm × 33 μm. The electrode 11 is often made of polycrystalline silicon.

The resistance values in FIGS. 3 and 4 are designed with a target of 10 kΩ. However, when a larger resistance value is required, in addition to the method of expanding FIGS. 3 and 4 independently,
There is also a method of combining these. Further, by using the spiral pattern of the present invention, the variation in the resistance value in the chip was about 0% in the conventional pattern, which was 10%.

As a third embodiment, there is a resistive element having a circular spiral shape instead of a square spiral shape. A similar effect can be expected, though a description thereof is omitted. FIG. 5 shows a layout diagram of an IC chip to which the present invention is applied. This drawing shows an example of a 250V plasma display driving IC chip configured with the output circuit shown in FIG. A control circuit unit 21 and an output stage circuit unit 22 are arranged on the IC chip 2, and the output stage circuit unit 22 is composed of a large number of 1-bit output stage circuit units 221. The circuit shown in FIG. 7 is formed in the 1-bit output stage circuit section 221.
In this configuration, the control circuit section 21 exists in the central portion of the chip, and the output stage circuit section 22 including the high breakdown voltage device and the high resistance element is arranged around the control circuit section 21. In this way, the plasma display driving IC chip is a horizontally long IC.

FIG. 6 is a diagram showing element placement locations of the output stage circuit of FIG. The symbols in the figure are the same as those in FIG. The ground wiring 32 (wiring on the ground potential side) is arranged in the upper and lower portions, and the high voltage side wiring 31 is arranged on the central portion forming the high resistance elements (R ₁ , R ₂₁ ).
By fixing the positions where the high-resistance elements R ₁ and R ₂₁ are arranged, extra space (MOSFE
Power wiring can be shortened compared to the case where high resistance elements are randomly placed in the remaining space after placing active elements such as T and control circuits) No extra space is required and the chip can be miniaturized. Since the power supply wiring has a wider wiring width than the wiring at other places, conventionally, a large extra space is required.

[0022]

The following effects can be expected by forming a spiral pattern of polycrystalline silicon having a low resistance sheet resistance and forming a high resistance element having two terminals arranged on the outermost periphery. (1) The arrangement direction of the strips of polycrystalline silicon has a substantially equal ratio of length in the vertical direction to that in the horizontal direction, making it less susceptible to variations in the sheet resistance value in the chip due to ion implantation, and Variations in resistance value due to location are reduced. (2) Since the magnetic flux is canceled out, the inductance due to the length of the strip of polycrystalline silicon which is the resistance element can be reduced. (3) The layout of the resistance elements can be incorporated into the layout of the active elements such as MOSFETs, an extra space for power supply wiring is not required, and the size of the chip can be reduced. (4) An arbitrary high resistance element can be easily manufactured by combining the resistance elements having a spiral pattern as one unit, and the efficiency of the design can be improved. (5) By using polycrystalline silicon having a low resistance sheet resistance as a material for the resistance element, it is possible to manufacture a high resistance element having stable temperature characteristics.

[Brief description of drawings]

FIG. 1 is a pattern diagram of a spiral resistance element according to a first embodiment.

FIG. 2 is a pattern diagram of a spiral resistance element according to a second embodiment.

FIG. 3 is a diagram of a case where a resistance element having a resistance value of 10 kΩ is manufactured with the pattern of FIG.

FIG. 4 is a diagram of a case where a resistance element having a resistance value of 10 kΩ is manufactured in the pattern of FIG.

FIG. 5 is a layout diagram of an IC chip to which the present invention is applied.

FIG. 6 is a diagram showing element placement locations of the output stage circuit of FIG. 7;

FIG. 7: I for driving a 250 V-rated plasma display
Output stage circuit diagram of C

FIG. 8 is a circuit diagram using a high resistance element.

FIG. 9 is a pattern diagram of a conventional resistance element.

[Explanation of symbols]

1 Polycrystalline Silicon 11 Electrode 2 IC Chip 21 Control Circuit Section 22 Output Stage Circuit 221 1-bit Output Stage Circuit 31 V _DH (High Voltage Side) Wiring 32 Ground (Earth) Wiring 41 Output Stage p-Channel MOSFET (Q ₁ ) 42 Output stage n-channel MOSFET (Q ₂ ) 43 n-channel MOSFET for level shifter circuit
(Q _L) 44 protection diode 45 output stage IGBT (Q ₃₎ 46 Output stage IGBT (Q ₄₎ 47 p-channel MOSFET (Q _p) 51 level shifter circuit for high-resistance element (R ₁₎ 52 p-channel MOSFET discharge resistor (R ₃ ) 521 High-resistance element for current limiting (R ₂₁ ) 53 High-resistance element for level shifter circuit (R ₂ ) 54 High-resistance element for emitter follower circuit (R ₄ ) 61 High-voltage power supply terminal (V _DH ) 62 Output terminal 63 Input Terminal 64 Input terminal 65 Input terminal 66 Input terminal 7 DC power supply

Claims (6)

[Claims] 1. A resistance element formed on a semiconductor substrate is made of spiral-shaped polycrystalline silicon,
Further, the semiconductor device is characterized in that terminals provided at both ends of the spiral shape are formed in the outermost peripheral portion. 2. The semiconductor device according to claim 1, wherein the resistance element is formed on the semiconductor substrate via an insulating film. 3. A resistance element is formed of polycrystalline silicon into which a predetermined amount of an impurity of arsenic, phosphorus or boron is introduced in order to adjust it to a predetermined resistance value. The semiconductor device described. 4. The semiconductor device according to claim 3, wherein the resistance value of the polycrystalline silicon represented by the sheet resistance is 10 Ω / □ to 100 Ω / □. 5. The semiconductor device according to claim 1, wherein the terminals provided at both ends of the spiral shape are formed so as to be diagonal or adjacent to each other. 6. The semiconductor device according to claim 5, wherein the spiral shape is a square or a circle.