JPH08250438A - Method for producing silicon thin film by catalytic CVD method, method for manufacturing thin film transistor, and thin film transistor - Google Patents
Method for producing silicon thin film by catalytic CVD method, method for manufacturing thin film transistor, and thin film transistorInfo
- Publication number
- JPH08250438A JPH08250438A JP5576395A JP5576395A JPH08250438A JP H08250438 A JPH08250438 A JP H08250438A JP 5576395 A JP5576395 A JP 5576395A JP 5576395 A JP5576395 A JP 5576395A JP H08250438 A JPH08250438 A JP H08250438A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- gas
- silicon
- silicon thin
- catalyst
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 92
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 63
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 63
- 239000010703 silicon Substances 0.000 title claims abstract description 63
- 238000000034 method Methods 0.000 title claims abstract description 42
- 238000004050 hot filament vapor deposition Methods 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 239000003054 catalyst Substances 0.000 claims abstract description 61
- 239000000758 substrate Substances 0.000 claims abstract description 50
- 239000002994 raw material Substances 0.000 claims abstract description 23
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 17
- 150000003377 silicon compounds Chemical class 0.000 claims abstract description 16
- 239000000126 substance Substances 0.000 claims abstract description 16
- 238000006243 chemical reaction Methods 0.000 claims abstract description 12
- 238000000151 deposition Methods 0.000 claims abstract description 8
- 238000002844 melting Methods 0.000 claims abstract description 6
- 230000008018 melting Effects 0.000 claims abstract description 6
- 150000001875 compounds Chemical class 0.000 claims abstract description 4
- 238000002156 mixing Methods 0.000 claims abstract description 4
- 239000007789 gas Substances 0.000 claims description 74
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 9
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 9
- 229910000077 silane Inorganic materials 0.000 claims description 9
- 238000000354 decomposition reaction Methods 0.000 claims description 3
- 238000006555 catalytic reaction Methods 0.000 claims description 2
- ABTOQLMXBSRXSM-UHFFFAOYSA-N silicon tetrafluoride Chemical compound F[Si](F)(F)F ABTOQLMXBSRXSM-UHFFFAOYSA-N 0.000 claims description 2
- 238000005507 spraying Methods 0.000 claims 1
- 230000008021 deposition Effects 0.000 abstract description 5
- 239000010408 film Substances 0.000 description 22
- 239000011521 glass Substances 0.000 description 17
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 241000894007 species Species 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 5
- 229910021417 amorphous silicon Inorganic materials 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 229910021419 crystalline silicon Inorganic materials 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- 239000010937 tungsten Substances 0.000 description 3
- 239000008186 active pharmaceutical agent Substances 0.000 description 2
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000003973 paint Substances 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 241000218496 Zeugodacus cucumis Species 0.000 description 1
- 238000003421 catalytic decomposition reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910021480 group 4 element Inorganic materials 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000013081 microcrystal Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 230000001443 photoexcitation Effects 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 1
- VEDJZFSRVVQBIL-UHFFFAOYSA-N trisilane Chemical compound [SiH3][SiH2][SiH3] VEDJZFSRVVQBIL-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
- Chemical Vapour Deposition (AREA)
- Thin Film Transistor (AREA)
Abstract
(57)【要約】
【目的】 触媒CVD法によるシリコン薄膜の生成方法
およびシリコン薄膜トランジスタの製造方法および薄膜
トランジスタに関し,低温で生成で0.1μm以下の薄
い膜厚の高移動度の多結晶性のシリコン薄膜を低温形成
することを目的とする。
【構成】 原料ガスはシリコン(Si)化合物のガスと
他の物質の混合ガスであり,触媒は供給される電力によ
り加熱されるものであり,シリコン薄膜を生成する反応
室の圧力を低圧とする圧力条件,および原料ガスにおけ
る他の物質のガスのシリコン化合物のガスに対する割合
を大きくする原料ガスの混合比の条件,および該触媒に
供給する電力を触媒体温度がシリコン溶融温度以上に高
いものとする触媒に対する供給電力の条件を,堆積種に
より生成されるシリコン薄膜が多結晶性の薄膜となる程
度のものとし,低温度の基板にシリコン薄膜を生成する
構成を持つ。
(57) [Summary] [Object] To provide a method for producing a silicon thin film by a catalytic CVD method, a method for producing a silicon thin film transistor, and a thin film transistor, which are produced at low temperature and have a thin film thickness of 0.1 μm or less and high mobility polycrystalline silicon. The purpose is to form a thin film at low temperature. [Structure] The raw material gas is a mixed gas of a silicon (Si) compound gas and another substance, the catalyst is heated by supplied electric power, and the pressure in the reaction chamber for producing a silicon thin film is set to a low pressure. The pressure conditions, the conditions of the mixing ratio of the raw material gas for increasing the ratio of the gas of other substances to the gas of the silicon compound in the raw material gas, and the power supplied to the catalyst are such that the catalyst temperature is higher than the silicon melting temperature. The condition of the power supply to the catalyst to be used is such that the silicon thin film produced by the deposition species becomes a polycrystalline thin film, and the silicon thin film is produced on the substrate at a low temperature.
Description
【0001】[0001]
【産業上の利用分野】本発明は触媒CVD法によるシリ
コン薄膜の生成方法およびシリコン薄膜トランジスタの
製造方法および薄膜トランジスタに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a silicon thin film by a catalytic CVD method, a method for manufacturing a silicon thin film transistor, and a thin film transistor.
【0002】シリコン薄膜にトランジスタを形成した薄
膜トランジスタが液晶ディスプレイ,集積回路装置等の
半導体エレクトロニクスの分野において幅広く使用され
ている。A thin film transistor in which a transistor is formed on a silicon thin film is widely used in the field of semiconductor electronics such as a liquid crystal display and an integrated circuit device.
【0003】液晶ディスプレイの制御トランジスタは画
素一つ一つに付けられるスイッチングトランジスタと,
画面全体を制御する高移動度のトランジスタの2種類の
トランジスタが必要である。The control transistor of the liquid crystal display is a switching transistor attached to each pixel,
Two types of transistors are required, a high mobility transistor that controls the entire screen.
【0004】従来このような制御トランジスタは,画素
スイッチ用には大画面にわたって低温で作ることのでき
るアモルファスシリコンを用いた薄膜トランジスタを使
用し,画面制御用には結晶シリコンで作られたトランジ
スタ集積回路を使用して両者を一体にすることにより制
御用トランジスタとする方法が用いられていた。そのた
め,配線が複雑になり,製造コストを押し上げる原因に
なっていた。そこで,この画面制御用の制御トランジス
タを,ガラス基板に形成したシリコン薄膜に画素スイッ
チ用薄膜トランジスタと共に形成することが提案され,
そのための種々の方法が開発されてきた。Conventionally, such a control transistor uses a thin film transistor using amorphous silicon which can be formed at a low temperature over a large screen for a pixel switch, and a transistor integrated circuit made of crystalline silicon for a screen control. A method has been used in which both are integrated to form a control transistor. Therefore, the wiring becomes complicated, which has been a cause of increasing the manufacturing cost. Therefore, it has been proposed to form this screen control transistor together with a pixel switch thin film transistor on a silicon thin film formed on a glass substrate.
Various methods have been developed for that purpose.
【0005】[0005]
【従来の技術】その一つはエキシマレーザーをアモルフ
ァスシリコン膜に照射することによりアモルファスシリ
コン膜を溶融し,再結晶させることにより多結晶膜とし
て高移動度の薄膜トランジスタを生成する方法である。
この方法は600°C以下の低温で高移動度の薄膜トラ
ンジスタを形成することができるが,レーザを使用する
ために大面積に薄膜を形成することが困難である。また
一方,従来からの単純な熱CVD法や,シリコン薄膜を
加熱処理とする方法では,600°C以上の温度にしな
いと移動度が10Cm2 /V・Sを超えるポリシリコン
が作れなかった。しかし,600°C程度の温度では使
用できるガラス基板が制約され,より低温の熱処理で薄
膜トランジスタを製造する方法の開発が望まれていた。
そこで,高移動度の薄膜トランジスタを大面積にわたっ
て,安価なガラス基板を使用して,低温で製造する方法
として,本発明者らは触媒CVD法によりシリコン薄膜
を生成することを提案した。2. Description of the Related Art One of the methods is to produce a high mobility thin film transistor as a polycrystalline film by melting an amorphous silicon film by irradiating the amorphous silicon film with an excimer laser and recrystallizing the film.
This method can form a thin film transistor having high mobility at a low temperature of 600 ° C. or lower, but it is difficult to form a thin film in a large area because a laser is used. On the other hand, in the conventional simple thermal CVD method or the method of heat-treating a silicon thin film, polysilicon having a mobility of more than 10 Cm 2 / V · S cannot be formed unless the temperature is 600 ° C. or higher. However, the glass substrate that can be used is limited at a temperature of about 600 ° C., and development of a method of manufacturing a thin film transistor by heat treatment at a lower temperature has been desired.
Therefore, as a method for manufacturing a high-mobility thin film transistor over a large area at a low temperature using an inexpensive glass substrate, the present inventors have proposed to form a silicon thin film by the catalytic CVD method.
【0006】触媒CVD法は,基板近傍に置かれた加熱
触媒体に原料ガスを吹きつけ,触媒体と原料ガスとの接
触分解反応を用いて原料ガスの全部または一部を分解
し,その分解された堆積種を基板まで郵送することによ
り,プラズマも光励起過程をも用いずに,基板自体の温
度を低温に保ったままシリコン薄膜を生成する方法であ
る。In the catalytic CVD method, a raw material gas is blown to a heated catalyst body placed in the vicinity of a substrate, and all or a part of the raw material gas is decomposed by using a catalytic decomposition reaction between the catalyst body and the raw material gas, and the decomposition is performed. By depositing the deposited species by mail to the substrate, a silicon thin film is formed without using plasma or photoexcitation process while keeping the temperature of the substrate itself low.
【0007】図6は従来の触媒CVD法によるシリコン
薄膜の生成方法の説明図である。図6において,51は
反応室である。FIG. 6 is an explanatory view of a conventional method of forming a silicon thin film by a catalytic CVD method. In FIG. 6, reference numeral 51 is a reaction chamber.
【0008】52は基板であって,ガラス基板等であ
る。53は触媒体であって,タングステン等のヒータで
ある。54は原料ガス供給管であって,原料ガスを供給
するものである。A substrate 52 is a glass substrate or the like. 53 is a catalyst body, which is a heater such as tungsten. Reference numeral 54 is a source gas supply pipe for supplying a source gas.
【0009】原料ガスは,シラン,ジシラン等のシラン
系のシリコン化合物と,水素ガス等の他の物質のガスの
混合ガスである。55はヒータであって,基板52を加
熱するものである。The raw material gas is a mixed gas of a silane-based silicon compound such as silane and disilane and a gas of another substance such as hydrogen gas. 55 is a heater for heating the substrate 52.
【0010】56は電力供給源であって,触媒体53に
電力を供給するものである。図6の構成において,基板
52はヒータ55により500°C程度の低温で加熱さ
れている。原料ガスが原料ガス供給管54に供給され
る。原料ガスは触媒体53と接触し,原料ガスのうちの
シリコン化合物の全部もしくは一部が触媒により分解さ
れてシリコン(Si)の種を生成する。分解されたSi
の種および分解されなかったシリコン化合物および他の
物質のガス(水素ガス等)が基板52に移動する。そし
て,Siの種は基板52の表面に堆積し,シリコン薄膜
を生成する。Reference numeral 56 denotes an electric power supply source for supplying electric power to the catalyst body 53. In the configuration of FIG. 6, the substrate 52 is heated by the heater 55 at a low temperature of about 500 ° C. The raw material gas is supplied to the raw material gas supply pipe 54. The raw material gas comes into contact with the catalyst body 53, and all or part of the silicon compound in the raw material gas is decomposed by the catalyst to generate silicon (Si) seeds. Decomposed Si
The gas (hydrogen gas, etc.) of the seeds and the silicon compounds and other substances that have not been decomposed move to the substrate 52. Then, Si seeds are deposited on the surface of the substrate 52 to form a silicon thin film.
【0011】従来の触媒CVD法では,触媒体53に供
給する電力は,本発明と比較して400〜500W(触
媒体の占める面積の単位面積当たり10W/cm2 以
下)程度の小電力のものであった。また,他の物質のガ
スのシリコン化合物に対する割合はほぼ同程度であった
(シリコン化合物の流量比をA,他の物質のガスの流量
比をBとしたとき,A/B≒1)。In the conventional catalytic CVD method, the electric power supplied to the catalyst body 53 is as low as about 400 to 500 W (10 W / cm 2 or less per unit area of the area occupied by the catalyst body) as compared with the present invention. Met. Further, the ratio of the gas of the other substance to the silicon compound was substantially the same (A / B≈1 where A is the flow ratio of the silicon compound and B is the flow ratio of the gas of the other substance).
【0012】触媒に対する供給電力が500W程度で,
ガス流量比A/B≒1では,生成されるシリコン薄膜は
アモルファスになる。また,圧力を0.5Torr以下
に下げ,シリコン薄膜を約1μm以上の厚い膜まで成長
させると多結晶膜は得られるが,それでも0.3μm以
下の薄い膜では,X線回折で観察する限りアモルファス
になる。When the power supplied to the catalyst is about 500 W,
When the gas flow rate ratio A / B≈1, the generated silicon thin film becomes amorphous. A polycrystalline film can be obtained by lowering the pressure to 0.5 Torr or less and growing a silicon thin film to a thick film of about 1 μm or more, but a thin film of 0.3 μm or less is still amorphous as long as it is observed by X-ray diffraction. become.
【0013】[0013]
【発明が解決しようとする課題】シリコン薄膜によりT
FT等の薄膜トランジスタを作成する場合には,オフの
時の抵抗をできるだけ大きくする必要があることからシ
リコン薄膜の膜厚を0.1μm以下の薄い膜にする必要
があり,しかも高移動度でなければならない。The thin film of T
When manufacturing a thin film transistor such as FT, it is necessary to make the film thickness of the silicon thin film 0.1 μm or less because it is necessary to increase the resistance when the transistor is off, and high mobility is required. I have to.
【0014】しかし,上記のように従来の触媒CVD法
で生成したシリコン薄膜は,膜厚が0.1μm以下では
アモルファスのシリコン薄膜しか得られず,移動度も1
cm 2 /V・S程度の小さいものであった。However, as described above, the conventional catalytic CVD method is used.
The silicon thin film generated in
Only amorphous silicon thin film can be obtained and mobility is 1
cm 2It was as small as / V · S.
【0015】本発明は触媒CVD法により低温で生成で
き,しかも0.1μm以下の薄い膜厚で高移動度のシリ
コン薄膜を生成できるシリコン薄膜の生成方法およびそ
の薄膜を用いた高移動度のシリコン薄膜トランジスタの
製造方法を提供することを目的とする。The present invention is a method for producing a silicon thin film which can be produced by a catalytic CVD method at a low temperature and has a thin film thickness of 0.1 μm or less and a high mobility, and a high mobility silicon using the thin film. It is an object to provide a method for manufacturing a thin film transistor.
【0016】[0016]
【課題を解決するための手段】本発明は,触媒体に原料
ガスを吹きつけ,触媒体と原料ガスとの接触反応により
原料ガスの一部もしくは全部を分解し,分解されて生成
した堆積種を基板に堆積して薄膜を生成する触媒CVD
法により多結晶性のシリコン薄膜を生成する方法におい
て,原料ガスはシリコン(Si)化合物のガスと他の物
質の混合ガスであり,触媒は供給される電力により加熱
されるものであり,シリコン薄膜を生成する反応室の圧
力を低圧とする圧力条件,および原料ガスにおける他の
物質のガスのシリコン化合物のガスに対する割合を大き
くする原料ガスの混合比の条件,および該触媒に供給す
る電力を触媒体温度がシリコン溶融温度以上に高いもの
とする触媒に対する供給電力の条件を,堆積種により生
成されるシリコン薄膜が多結晶性の薄膜となる程度のも
のとし,低温度の基板に多結晶性のシリコン薄膜を生成
するようにした。DISCLOSURE OF THE INVENTION According to the present invention, a raw material gas is blown to a catalyst body, a part or all of the raw material gas is decomposed by a catalytic reaction between the catalyst body and the raw material gas, and the deposited species generated by the decomposition. CVD to deposit a thin film on a substrate to form a thin film
In the method for producing a polycrystalline silicon thin film by the method, the source gas is a mixed gas of a silicon (Si) compound gas and another substance, and the catalyst is heated by the supplied electric power. The pressure conditions for lowering the pressure of the reaction chamber for generating hydrogen, the conditions for the mixing ratio of the source gas for increasing the ratio of the gas of other substances to the silicon compound gas in the source gas, and the power supplied to the catalyst are controlled. The condition of the power supply to the catalyst that makes the medium temperature higher than the silicon melting temperature is such that the silicon thin film produced by the deposition species becomes a polycrystalline thin film, and the low temperature substrate is A silicon thin film was generated.
【0017】図1は本発明の基本構成を示す。図1にお
いて,1は反応室である。FIG. 1 shows the basic configuration of the present invention. In FIG. 1, 1 is a reaction chamber.
【0018】2は基板であって,シリコン薄膜を堆積す
るものである。3は触媒体であって,タングステン等の
触媒である(原料ガスを分解してSiの種を生成できる
ものであれば他の材料でも良い)。Reference numeral 2 is a substrate on which a silicon thin film is deposited. Reference numeral 3 is a catalyst, which is a catalyst such as tungsten (other materials may be used as long as they can decompose the source gas to generate Si seeds).
【0019】4は原料ガス供給管であって,原料ガスを
反応室1に供給するものである。5はヒータであって,
基板2を加熱するものである。6は電力供給源であっ
て,触媒体3に電力を供給するものである。Reference numeral 4 is a source gas supply pipe for supplying the source gas to the reaction chamber 1. 5 is a heater,
The substrate 2 is heated. A power supply source 6 supplies power to the catalyst body 3.
【0020】図1において,原料ガスはシリコン化合物
のガス(例えばシラン)および他の物質のガス(例えば
水素)を含むものである。反応室の圧力条件は従来実施
されていた圧力(0.1Torr以上)より低圧であっ
て,例えば,0.05Torrである。そして,他の物
質のガスのシリコン化合物のガスに対する混合比の条件
は,従来行われていたより大きいものである。例えば,
従来の方法に比較して大きいものであって,シリコン化
合物のガスの流量比をAsccm,他のガスの流量比を
Bsccmとした時,ほぼB/A>10程度である。ま
た,触媒体に供給する電力の条件は,触媒体3の温度が
シリコン溶融温度(1450°C以上,望ましくは17
00°C以上)になるもので,かつ,触媒体の構造を変
えたことにより,従来より2倍以上の値に設定されてい
る。例えば,触媒体の表面積によっても異なるが,ほぼ
1000W以上である(触媒体の占める面積によって異
なる)。このような各条件が満たされて基板2に厚さ
0.1μm以下の薄い膜厚で多結晶性のシリコン薄膜を
低温生成することが可能になる。In FIG. 1, the source gas contains a silicon compound gas (eg, silane) and another substance gas (eg, hydrogen). The pressure condition of the reaction chamber is lower than the pressure (0.1 Torr or more) which has been conventionally used, and is, for example, 0.05 Torr. Further, the condition of the mixing ratio of the gas of the other substance to the gas of the silicon compound is larger than that conventionally used. For example,
It is larger than the conventional method, and when the flow rate ratio of the gas of the silicon compound is Asccm and the flow rate ratio of the other gas is Bsccm, it is about B / A> 10. Further, the condition of the electric power supplied to the catalyst body is that the temperature of the catalyst body 3 is the silicon melting temperature (1450 ° C or higher, preferably 17
The temperature is more than 00 ° C) and is set to a value more than twice that of the conventional one by changing the structure of the catalyst body. For example, although it depends on the surface area of the catalyst body, it is about 1000 W or more (depending on the area occupied by the catalyst body). By satisfying each of these conditions, it becomes possible to form a polycrystalline silicon thin film on the substrate 2 at a low film thickness of 0.1 μm or less at a low temperature.
【0021】なお,本発明において説明する多結晶性の
シリコン薄膜は粒径が100Å程度の微結晶と称されて
いるものから粒径が200Å以上の多結晶を含むもので
ある。The polycrystalline silicon thin film described in the present invention is referred to as a microcrystal having a grain size of about 100 Å to a polycrystal having a grain size of 200 Å or more.
【0022】[0022]
【作用】図1の本発明の基本構成によるシリコン薄膜の
生成方法について説明する。基板2はヒータ5により低
温に加熱されている。反応室は真空ポンプ(図示せず)
により低圧(例えば,約0.05Torr以下)にす
る。A method of forming a silicon thin film according to the basic structure of the present invention shown in FIG. 1 will be described. The substrate 2 is heated to a low temperature by the heater 5. The reaction chamber is a vacuum pump (not shown)
To lower the pressure (eg, about 0.05 Torr or less).
【0023】シリコン化合物のガスと他の物質のガスの
混合ガスが原料ガス供給管4により供給され,そして原
料ガスは触媒体3の表面に接触する。電力供給源に供給
される電力は大きいので,触媒体3の温度はシリコン溶
融温度以上に加熱されている。そのため,分解されたシ
リコンの種は高温で基板2に輸送される。また,触媒体
3にシリコンが付着して残ることがない。また,分解さ
れなかったガスおよび他のガスは,シリコンの種に比較
して低温で基板2の表面に吹きつけられる。その結果,
基板2の表面に高移動度の多結晶性のシリコン薄膜が生
成される。上記のような方法により基板温度が300°
C程度の低温でガラス等の基板に膜厚が0.1μm以下
の多結晶性のシリコン薄膜を生成することができる。A mixed gas of a silicon compound gas and a gas of another substance is supplied by a raw material gas supply pipe 4, and the raw material gas contacts the surface of the catalyst body 3. Since the electric power supplied to the electric power supply source is large, the temperature of the catalyst body 3 is heated to the silicon melting temperature or higher. Therefore, the decomposed silicon seeds are transported to the substrate 2 at a high temperature. Moreover, silicon does not adhere to and remain on the catalyst body 3. Further, the gas which is not decomposed and the other gas are sprayed on the surface of the substrate 2 at a temperature lower than that of the seed of silicon. as a result,
A high mobility polycrystalline silicon thin film is formed on the surface of the substrate 2. The substrate temperature is 300 ° by the above method.
A polycrystalline silicon thin film having a thickness of 0.1 μm or less can be formed on a substrate such as glass at a low temperature of about C.
【0024】[0024]
【実施例】図2は本発明の触媒CVD装置の実施例であ
る。図2において,11は反応室であって,ステンレス
の容器である。EXAMPLE FIG. 2 shows an example of the catalytic CVD apparatus of the present invention. In FIG. 2, 11 is a reaction chamber, which is a stainless steel container.
【0025】12はガラス基板である。13は触媒体で
あって,タングステンである。触媒体13と原料ガス供
給管14の吹き出し口との距離Lは約4cmである。Reference numeral 12 is a glass substrate. Reference numeral 13 is a catalyst body, which is tungsten. The distance L between the catalyst body 13 and the outlet of the source gas supply pipe 14 is about 4 cm.
【0026】14は原料ガス供給管である。15はヒー
タであって,ガラス基板12を加熱するものである。2
1は基板ホルダーであって,ガラス基板12を保持する
ものである。Reference numeral 14 is a source gas supply pipe. A heater 15 heats the glass substrate 12. Two
A substrate holder 1 holds a glass substrate 12.
【0027】22は熱電対であって,ガラス基板12の
温度を測定するものである。23は電子式赤外線温度計
であって,触媒体13の温度を測定するものである。Reference numeral 22 denotes a thermocouple, which measures the temperature of the glass substrate 12. Reference numeral 23 is an electronic infrared thermometer for measuring the temperature of the catalyst body 13.
【0028】23’は石英窓である。24はメインバル
ブである。25は電流計である。Reference numeral 23 'is a quartz window. Reference numeral 24 is a main valve. 25 is an ammeter.
【0029】25’は真空計である。25”は拡散ポン
プである。26は電圧計である。25 'is a vacuum gauge. 25 "is a diffusion pump. 26 is a voltmeter.
【0030】27は可変トランスであって,触媒体13
に供給する電力を制御するものである。30は原料ガス
である。シリコン化合物のガスの例としてシランガス,
他の物質のガスの例として水素ガスによる場合を示す。Numeral 27 is a variable transformer, which is a catalyst body 13.
It controls the power supplied to. 30 is a source gas. Silane gas as an example of a silicon compound gas,
The case of using hydrogen gas is shown as an example of the gas of another substance.
【0031】図2の触媒CVD装置によりシリコン薄膜
を生成する方法を説明するのに先立ち図3の説明をす
る。図3は本発明の触媒体の構成の実施例である。Prior to explaining the method of forming a silicon thin film by the catalytic CVD apparatus of FIG. 2, the explanation of FIG. 3 will be given. FIG. 3 shows an example of the constitution of the catalyst body of the present invention.
【0032】図3において,13は触媒体であって,タ
ングステン線である。13’は触媒体をコイル巻いて折
り曲げて配置した時に触媒体の線の張る面の概形であ
る。実施例の場合,7cm×7cmである。従って,触
媒体13の張る単位面積当たりの供給電力は1100/
(7×7)≒22.4W/cm2 である。In FIG. 3, numeral 13 is a catalyst body, which is a tungsten wire. Reference numeral 13 'is a rough shape of the surface of the catalyst body on which the wire is stretched when the catalyst body is coiled and bent. In the case of the example, it is 7 cm × 7 cm. Therefore, the power supply per unit area of the catalyst body 13 is 1100 /
(7 × 7) ≈22.4 W / cm 2 .
【0033】図2の触媒CVD装置によりシリコン薄膜
を生成する方法について説明する。図2において,触媒
体13の温度は石英窓23’を透して電子式赤外線放射
温度計23により測定される。同時に電流計25と電圧
計26の測定値により触媒体(タングステン線)13の
電気抵抗を求め,その電気抵抗の温度依存性からも計測
値を確認した。また,ガラス基板12の温度は熱電対2
2により計測すると同時にガラス基板12の裏面に塗布
した示温性ペイント(温度によって色が変わる)の色を
観察することによっても確認した。A method of forming a silicon thin film by the catalytic CVD apparatus shown in FIG. 2 will be described. In FIG. 2, the temperature of the catalyst body 13 is measured by an electronic infrared radiation thermometer 23 through a quartz window 23 '. At the same time, the electric resistance of the catalyst body (tungsten wire) 13 was obtained from the measured values of the ammeter 25 and the voltmeter 26, and the measured value was also confirmed from the temperature dependence of the electric resistance. Further, the temperature of the glass substrate 12 is the thermocouple 2
It was also confirmed by observing the color of the temperature-indicating paint (color changes depending on the temperature) applied to the back surface of the glass substrate 12 at the same time as the measurement according to 2.
【0034】シリコン膜の堆積条件の一例は次のような
ものである。触媒体13の温度は1600°Cから18
00°Cである。触媒体13を加熱するのに投入した電
力は1100Wである。An example of deposition conditions for the silicon film is as follows. The temperature of the catalyst body 13 is 1600 ° C to 18
It is 00 ° C. The electric power applied to heat the catalyst body 13 is 1100W.
【0035】シランガスの流量は1sccmである。水
素ガスの流量は65sccmである。ガラス基板12の
温度の熱電対による計測値は290°C,示温性ペイン
トを観測して得られた温度は約350°Cである。The flow rate of silane gas is 1 sccm. The flow rate of hydrogen gas is 65 sccm. The measured value of the temperature of the glass substrate 12 by the thermocouple is 290 ° C, and the temperature obtained by observing the temperature indicating paint is about 350 ° C.
【0036】シリコン薄膜の堆積時のガス圧は0.05
Torrである。上記の条件により,堆積時間3分以内
で膜厚が約0.1μmの多結晶性シリコン薄膜を得るこ
とができる。The gas pressure during the deposition of the silicon thin film is 0.05.
Torr. Under the above conditions, a polycrystalline silicon thin film having a film thickness of about 0.1 μm can be obtained within a deposition time of 3 minutes.
【0037】本実施例によれば,触媒体13の電力供給
量が高く,触媒体13の温度は1600°C〜1800
°C程度の高温である。そのため,触媒体13により分
解されて生成されたシリコンは高温でガラス基板12に
輸送される。また,水素ガスの量が多く,それは触媒体
13の隙間を抜けてガラス基板12の表面に到達するの
でその温度は比較的に低い。According to this embodiment, the amount of power supplied to the catalyst body 13 is high, and the temperature of the catalyst body 13 is 1600 ° C to 1800 ° C.
It is a high temperature of about ° C. Therefore, the silicon generated by being decomposed by the catalyst body 13 is transported to the glass substrate 12 at a high temperature. Further, since the amount of hydrogen gas is large and passes through the gap of the catalyst body 13 and reaches the surface of the glass substrate 12, the temperature thereof is relatively low.
【0038】本発明のように反応室の圧力が,0.05
Torr程度の低い時は,触媒体に接触して分解された
種は高いエネルギーを持って基板表面に到達するが,触
媒体13に接触しない種(接触しないで生成されたS
i,分解されないシランガス,水素ガス等)は低温のま
まであって,いわば熱的非平衡が生じている。例えば,
1700°Cの温度の触媒体に接して作られた種は,そ
の温度で一般の熱がCVD堆積する際に基板表面で持つ
種のエネルギーに近いエネルギーを持って触媒体から基
板に飛来する。つまり,基板自体は低い温度であって
も,飛来する種の一部は大変な高温になっていて,基板
表面があたかも高温であるかのように振る舞うのである
が,他の多くの冷たい種が基板全体の温度上昇を抑える
ものであると考えられる。このようにして,従来の方法
では基板温度を高温にしないと実現できなかった高移動
度の多結晶シリコンが低い基板温度で生成されると考え
られる。As in the present invention, the pressure in the reaction chamber is 0.05
At a low level of Torr, the species decomposed by contacting the catalyst body reach the substrate surface with high energy, but the species not contacting the catalyst body 13 (S generated without contacting the catalyst body 13).
i, undecomposed silane gas, hydrogen gas, etc.) remains at a low temperature, so to speak, thermal nonequilibrium occurs. For example,
The seeds formed in contact with the catalyst body at a temperature of 1700 ° C. fly from the catalyst body to the substrate with energy close to that of the seeds on the substrate surface when general heat is deposited by CVD at that temperature. That is, even if the substrate itself is at a low temperature, some of the flying species are extremely hot, and the substrate surface behaves as if it were hot, but many other cold species It is considered to suppress the temperature rise of the entire substrate. In this way, it is considered that high mobility polycrystalline silicon, which could not be realized by the conventional method unless the substrate temperature is high, is generated at a low substrate temperature.
【0039】本発明によれば,ガラス基板12の温度が
300°C程度の低温でも膜厚が0.1μm程度の高移
動度の多結晶シリコン薄膜が得られるが,400°C,
500°C程度までガラス基板12の温度を上げれば,
さらに多結晶の粒径が大きくなり,より高い移動度のシ
リコン薄膜を生成することができる。According to the present invention, a high mobility polycrystalline silicon thin film having a film thickness of about 0.1 μm can be obtained even at a low temperature of the glass substrate 12 of about 300 ° C.
If the temperature of the glass substrate 12 is raised to about 500 ° C,
Furthermore, the grain size of the polycrystal is increased, and a silicon thin film with higher mobility can be produced.
【0040】上記実施例では,シリコン化合物のガスと
してシラン(SiH4 )について説明したが,本発明は
ジシラン(Si2 H6 ),トリシラン(Si3 H8 )等
のシラン系ガス全般に適用できるものである。また,S
iF2 ,SiH2 F2 等のフッ化シリコン系のガスに対
しても適用できるものである。In the above embodiments, silane (SiH 4 ) was used as the silicon compound gas, but the present invention can be applied to all silane-based gases such as disilane (Si 2 H 6 ) and trisilane (Si 3 H 8 ). It is a thing. Also, S
It can also be applied to a silicon fluoride-based gas such as iF 2 or SiH 2 F 2 .
【0041】また,シリコン薄膜に微量のGe,C等の
4族元素を混入しても良い。図4は本発明の触媒CVD
法により生成したシリコン薄膜の薄膜トランジスタの例
である。Further, a small amount of a Group 4 element such as Ge or C may be mixed in the silicon thin film. FIG. 4 shows the catalytic CVD of the present invention.
It is an example of the thin film transistor of the silicon thin film produced by the method.
【0042】図4において,35はゲート電極であっ
て,結晶シリコンである。36はシリコン酸化膜であっ
て,ゲート電極35を酸化して生成したものであり,ゲ
ート絶縁膜である。In FIG. 4, reference numeral 35 denotes a gate electrode, which is crystalline silicon. A silicon oxide film 36 is formed by oxidizing the gate electrode 35 and is a gate insulating film.
【0043】37は多結晶性のシリコン薄膜であり,本
発明の触媒CVD法によりシリコン酸化膜36の上に堆
積して生成したものである。シリコン薄膜37の膜厚は
約0.1μmである。Reference numeral 37 denotes a polycrystalline silicon thin film, which is formed by depositing on the silicon oxide film 36 by the catalytic CVD method of the present invention. The film thickness of the silicon thin film 37 is about 0.1 μm.
【0044】38はアルミニウム電極であって,ソース
電極となるものである。39はアルミニウム電極であっ
て,ドレイン電極となるものである。図4のシリコン薄
膜トランジスタは,結晶シリコンのゲート電極35を酸
化してシリコン酸化膜36を生成する。シリコン酸化膜
の膜厚は約1200Åである。次にシリコン酸化膜36
上に本発明の触媒CVD法により多結晶性のシリコン薄
膜37を形成する。そして,シリコン薄膜37をエッチ
ングしてアルミニューム電極を蒸着し,エッチングして
ソース38とドレイン39を得る。ゲートのチャネル長
は15μmである。チャネル幅は600μmである。Reference numeral 38 is an aluminum electrode which serves as a source electrode. Reference numeral 39 denotes an aluminum electrode which serves as a drain electrode. The silicon thin film transistor of FIG. 4 oxidizes the gate electrode 35 of crystalline silicon to form a silicon oxide film 36. The film thickness of the silicon oxide film is about 1200Å. Next, the silicon oxide film 36
A polycrystalline silicon thin film 37 is formed thereon by the catalytic CVD method of the present invention. Then, the silicon thin film 37 is etched to deposit an aluminum electrode, and the source 38 and the drain 39 are obtained by etching. The channel length of the gate is 15 μm. The channel width is 600 μm.
【0045】なお,図4は,単結晶シリコンをゲート電
極とする構成であるが,一般的にはガラス基板にゲート
電極とする金属膜を設け,その表面にゲート絶縁膜を形
成してその上に本発明の方法により多結晶シリコン薄膜
を生成する。Although FIG. 4 shows a structure in which single-crystal silicon is used as a gate electrode, generally, a metal film serving as a gate electrode is provided on a glass substrate, and a gate insulating film is formed on the surface of the metal film. A polycrystalline silicon thin film is produced by the method of the present invention.
【0046】図5は図4のシリコン薄膜トランジスタの
ソース−ドレイン間電流IDSとソースゲート間電圧VGS
の関係を示すものである(ソース−ドレイン間電圧は5
Vである)。[0046] Figure 5 is the source of the silicon thin film transistor of FIG. 4 - drain current I DS and the source-gate voltage V GS
Is shown (the source-drain voltage is 5
V).
【0047】図5のIDSとVGSの関係を基に,薄膜トラ
ンジスタの移動度を求めることができる。図5の場合の
その値は約70cm2 である。このように,本発明の触
媒CVD法を使用することにより高移動度のシリコン薄
膜トランジスタを製造することが可能になる。The mobility of the thin film transistor can be obtained based on the relationship between I DS and V GS in FIG. In the case of FIG. 5, that value is about 70 cm 2 . As described above, by using the catalytic CVD method of the present invention, it becomes possible to manufacture a high mobility silicon thin film transistor.
【0048】[0048]
【発明の効果】本発明によれば,基板温度が500°C
以下,300°C程度であっても,膜厚が0.1μm以
下の薄い,高移動度の多結晶性のシリコン薄膜を生成す
ることができる。そのため,液晶ディスプレイ,半導体
集積回路装置等に使用する高移動度のシリコン薄膜トラ
ンジスタを低温処理で製造することができるようにな
る。According to the present invention, the substrate temperature is 500 ° C.
Hereinafter, even at about 300 ° C., a thin, high-mobility polycrystalline silicon thin film having a thickness of 0.1 μm or less can be formed. Therefore, high mobility silicon thin film transistors used for liquid crystal displays, semiconductor integrated circuit devices, etc. can be manufactured by low-temperature processing.
【図1】本発明の基本構成を示す図である。FIG. 1 is a diagram showing a basic configuration of the present invention.
【図2】本発明の触媒CVD装置の実施例を示す図であ
る。FIG. 2 is a diagram showing an embodiment of the catalytic CVD apparatus of the present invention.
【図3】本発明の触媒体の構成の実施例を示す図であ
る。FIG. 3 is a diagram showing an example of the constitution of the catalyst body of the present invention.
【図4】本発明の触媒CVD法により生成したシリコン
薄膜の薄膜トランジスタの例を示す図である。FIG. 4 is a diagram showing an example of a thin film transistor of a silicon thin film produced by the catalytic CVD method of the present invention.
【図5】本発明のシリコン薄膜トランジスタの例の特性
を示す図である。FIG. 5 is a diagram showing characteristics of an example of a silicon thin film transistor of the present invention.
【図6】従来の触媒CVD法によるシリコン薄膜の生成
方法の説明図である。FIG. 6 is an explanatory diagram of a conventional method for producing a silicon thin film by a catalytic CVD method.
1:反応室 2:基板 3:触媒体 4:原料ガス供給管 5:ヒータ 6:電力供給源 1: Reaction chamber 2: Substrate 3: Catalyst body 4: Raw material gas supply pipe 5: Heater 6: Electric power supply source
Claims (7)
原料ガスとの接触反応により原料ガスの一部もしくは全
部を分解し,分解されて生成した堆積種を基板に堆積し
て薄膜を生成する触媒CVD法により多結晶性のシリコ
ン薄膜を生成する方法において,原料ガスはシリコン
(Si)化合物のガスと他の物質の混合ガスであり,触
媒は供給される電力により加熱されるものであり,シリ
コン薄膜を生成する反応室の圧力を低圧とする圧力条
件,および原料ガスにおける他の物質のガスのシリコン
化合物のガスに対する割合を大きくする原料ガスの混合
比の条件,および該触媒に供給する電力を触媒体温度が
シリコン溶融温度以上に高いものとする触媒に対する供
給電力の条件を,堆積種により生成されるシリコン薄膜
が多結晶性の薄膜となる程度のものとし,低温度の基板
にシリコン薄膜を生成することを特徴とする触媒CVD
法によりシリコン薄膜の生成方法。1. A thin film is formed by spraying a raw material gas onto a catalyst body, decomposing a part or all of the raw material gas by a catalytic reaction between the catalyst body and the raw material gas, and depositing the deposited species generated by the decomposition on a substrate. In the method of producing a polycrystalline silicon thin film by the catalytic CVD method, the raw material gas is a mixed gas of a silicon (Si) compound gas and another substance, and the catalyst is heated by supplied electric power. A pressure condition in which the pressure of the reaction chamber for producing a silicon thin film is low, a condition of a mixing ratio of a raw material gas for increasing a ratio of a gas of another substance in the raw material gas to a gas of a silicon compound, and supply to the catalyst The power of the catalyst is set so that the temperature of the catalyst is higher than the melting temperature of the silicon. Catalytic CVD characterized by producing a silicon thin film on a substrate of low temperature
Method of producing silicon thin film by the method.
rr以下であり,該混合ガスの条件がシリコンを含む化
合物のガスの流量をA,他のガスの流量をBとした時,
B/Aがほぼ10より大きく,該供給電力の条件が触媒
体の占める部分の単位面積当たりほぼ10W/cm2 以
上であることを特徴とする請求項1に記載の触媒CVD
法によるシリコン薄膜の生成方法。2. The pressure condition of the reaction chamber is approximately 0.05 To.
When the flow rate of the gas containing the compound containing silicon is A and the flow rate of the other gas is B,
2. The catalytic CVD according to claim 1, wherein B / A is larger than about 10 and the condition of the supplied electric power is about 10 W / cm 2 or more per unit area of the portion occupied by the catalyst body.
Method for producing silicon thin film by the method.
であり,他の物質のガスが水素ガスであることを特徴と
する請求項1もしくは2に記載の触媒CVD法によるシ
リコン薄膜の生成方法。3. The method for producing a silicon thin film by the catalytic CVD method according to claim 1, wherein the gas of the silicon compound is a silane-based gas and the gas of the other substance is a hydrogen gas.
系のガスであり,他の物質のガスが水素ガスであること
を特徴とする請求項1もしくは2に記載の触媒CVD法
によるシリコン薄膜の生成方法。4. The production of a silicon thin film by the catalytic CVD method according to claim 1 or 2, wherein the silicon compound gas is a silicon fluoride-based gas and the other substance gas is a hydrogen gas. Method.
特徴とする請求項1,2,3もしくは4に記載の触媒C
VD法によるシリコン薄膜の生成方法。5. The catalyst C according to claim 1, 2, 3 or 4, wherein the substrate temperature is 500 ° C. or lower.
Method for producing silicon thin film by VD method.
の触媒CVD法により生成した多結晶性のシリコン薄膜
にトランジスタを形成することを特徴とする薄膜トラン
ジスタの製造方法。6. A method of manufacturing a thin film transistor, which comprises forming a transistor in a polycrystalline silicon thin film formed by the catalytic CVD method according to claim 1, 2, 3, 4 or 5.
のシリコン薄膜の生成方法により生成した多結晶性のシ
リコン薄膜に形成したトランジスタであって,移動度が
50Cm2 /V・S以上であることを特徴とする薄膜ト
ランジスタ。7. A transistor formed on a polycrystalline silicon thin film produced by the method for producing a silicon thin film according to claim 1, 2, 3, 4, or 5, having a mobility of 50 Cm 2 / V · S. A thin film transistor having the above.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP05576395A JP3453214B2 (en) | 1995-03-15 | 1995-03-15 | Method of manufacturing thin film transistor by catalytic CVD method and thin film transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP05576395A JP3453214B2 (en) | 1995-03-15 | 1995-03-15 | Method of manufacturing thin film transistor by catalytic CVD method and thin film transistor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH08250438A true JPH08250438A (en) | 1996-09-27 |
JP3453214B2 JP3453214B2 (en) | 2003-10-06 |
Family
ID=13007898
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP05576395A Expired - Lifetime JP3453214B2 (en) | 1995-03-15 | 1995-03-15 | Method of manufacturing thin film transistor by catalytic CVD method and thin film transistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3453214B2 (en) |
Cited By (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000001004A1 (en) * | 1998-06-30 | 2000-01-06 | Sony Corporation | Method of forming single-crystal silicon layer and method of manufacturing semiconductor device |
WO2000001005A1 (en) * | 1998-06-30 | 2000-01-06 | Sony Corporation | Method for forming monocrystalline silicon layer, method for manufacturing semiconductor device, and semiconductor device |
JP2000003876A (en) * | 1998-06-15 | 2000-01-07 | Asahi Optical Co Ltd | Semiconductor material manufacturing apparatus |
WO2000004572A1 (en) * | 1998-07-17 | 2000-01-27 | Sony Corporation | Method for manufacturing thin film semiconductor device, method for manufacturing display, method for manufacturing thin film transistor, and method for forming semiconductor thin film |
WO2000063956A1 (en) * | 1999-04-20 | 2000-10-26 | Sony Corporation | Method and apparatus for thin-film deposition, and method of manufacturing thin-film semiconductor device |
WO2001078123A1 (en) * | 2000-04-11 | 2001-10-18 | Genitech Co., Ltd. | Method of forming metal interconnects |
JP2002064205A (en) * | 2000-08-21 | 2002-02-28 | Matsushita Electric Ind Co Ltd | Tungsten-containing silicon thin film, method of manufacturing the same, and semiconductor device using the same |
WO2002025712A1 (en) * | 2000-09-14 | 2002-03-28 | Japan As Represented By President Of Japan Advanced Institute Of Science And Technology | Heating element cvd device |
JP2002151422A (en) * | 2000-08-30 | 2002-05-24 | Sony Corp | Method for growing polycrystalline silicon and single crystal silicon, and catalytic cvd apparatus |
US6548380B1 (en) | 1999-09-08 | 2003-04-15 | Matsushita Electric Industrial Co., Ltd. | Semiconductor thin film, semiconductor device employing the same, methods for manufacturing the same and device for manufacturing a semiconductor thin film |
WO2004100273A1 (en) | 2003-05-09 | 2004-11-18 | Shin-Etsu Handotai Co., Ltd. | Solar cell and process for producing the same |
KR100732858B1 (en) * | 2005-05-13 | 2007-06-27 | 삼성에스디아이 주식회사 | Field growth method of polycrystalline thin film |
JP2008103748A (en) * | 2007-11-19 | 2008-05-01 | Hideki Matsumura | Catalytic chemical vapor deposition equipment |
CN101290878A (en) * | 2007-04-20 | 2008-10-22 | 三洋电机株式会社 | Manufacturing method of semiconductor film and manufacturing method of photosensitive element |
EP1986242A3 (en) * | 2007-04-23 | 2010-07-21 | Sanyo Electric Co., Ltd. | Method of manufacturing a semiconductor film using hot wire CVD and method of manufacturing a photovoltaic element |
US8419856B2 (en) | 2010-01-14 | 2013-04-16 | Tokyo Electron Limited | Substrate processing apparatus |
JP2014522579A (en) * | 2011-06-10 | 2014-09-04 | アプライド マテリアルズ インコーポレイテッド | Method for cleaning a surface of a substrate using a hot wire chemical vapor deposition (HWCVD) chamber |
-
1995
- 1995-03-15 JP JP05576395A patent/JP3453214B2/en not_active Expired - Lifetime
Cited By (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000003876A (en) * | 1998-06-15 | 2000-01-07 | Asahi Optical Co Ltd | Semiconductor material manufacturing apparatus |
WO2000001004A1 (en) * | 1998-06-30 | 2000-01-06 | Sony Corporation | Method of forming single-crystal silicon layer and method of manufacturing semiconductor device |
WO2000001005A1 (en) * | 1998-06-30 | 2000-01-06 | Sony Corporation | Method for forming monocrystalline silicon layer, method for manufacturing semiconductor device, and semiconductor device |
US6399429B1 (en) | 1998-06-30 | 2002-06-04 | Sony Corporation | Method of forming monocrystalline silicon layer, method for manufacturing semiconductor device, and semiconductor device |
WO2000004572A1 (en) * | 1998-07-17 | 2000-01-27 | Sony Corporation | Method for manufacturing thin film semiconductor device, method for manufacturing display, method for manufacturing thin film transistor, and method for forming semiconductor thin film |
US6653179B1 (en) | 1998-07-17 | 2003-11-25 | Sony Corporation | Method for manufacturing a thin film semiconductor device, method for manufacturing a display device, method for manufacturing a thin film transistors, and method for forming a semiconductor thin film |
WO2000063956A1 (en) * | 1999-04-20 | 2000-10-26 | Sony Corporation | Method and apparatus for thin-film deposition, and method of manufacturing thin-film semiconductor device |
US6653212B1 (en) | 1999-04-20 | 2003-11-25 | Sony Corporation | Method and apparatus for thin-film deposition, and method of manufacturing thin-film semiconductor device |
US6548380B1 (en) | 1999-09-08 | 2003-04-15 | Matsushita Electric Industrial Co., Ltd. | Semiconductor thin film, semiconductor device employing the same, methods for manufacturing the same and device for manufacturing a semiconductor thin film |
US6846728B2 (en) | 1999-09-08 | 2005-01-25 | Matsushita Electric Industrial Co., Ltd. | Semiconductor thin film, semiconductor device employing the same, methods for manufacturing the same and device for manufacturing a semiconductor thin film |
WO2001078123A1 (en) * | 2000-04-11 | 2001-10-18 | Genitech Co., Ltd. | Method of forming metal interconnects |
JP2002064205A (en) * | 2000-08-21 | 2002-02-28 | Matsushita Electric Ind Co Ltd | Tungsten-containing silicon thin film, method of manufacturing the same, and semiconductor device using the same |
JP2002151422A (en) * | 2000-08-30 | 2002-05-24 | Sony Corp | Method for growing polycrystalline silicon and single crystal silicon, and catalytic cvd apparatus |
SG90263A1 (en) * | 2000-08-30 | 2002-07-23 | Sony Corp | Method of growing a polycrystalline silicon layer, method of growing a single crystal silicon layer and catalytic cvd apparatus |
WO2002025712A1 (en) * | 2000-09-14 | 2002-03-28 | Japan As Represented By President Of Japan Advanced Institute Of Science And Technology | Heating element cvd device |
US6593548B2 (en) | 2000-09-14 | 2003-07-15 | Japan As Represented By President Of Japan Advanced Institute Of Science And Technology | Heating element CVD system |
WO2004100273A1 (en) | 2003-05-09 | 2004-11-18 | Shin-Etsu Handotai Co., Ltd. | Solar cell and process for producing the same |
US8030223B2 (en) | 2003-05-09 | 2011-10-04 | Shin-Etsu Chemical Co., Ltd. | Solar cell and method of fabricating the same |
US7833579B2 (en) | 2005-05-13 | 2010-11-16 | Samsung Mobile Display Co., Ltd. | Method for in-situ polycrystalline thin film growth |
KR100732858B1 (en) * | 2005-05-13 | 2007-06-27 | 삼성에스디아이 주식회사 | Field growth method of polycrystalline thin film |
US8043885B2 (en) | 2007-04-20 | 2011-10-25 | Sanyo Electric Co., Ltd. | Method of manufacturing semiconductor film and method of manufacturing photovoltaic element |
CN101290878A (en) * | 2007-04-20 | 2008-10-22 | 三洋电机株式会社 | Manufacturing method of semiconductor film and manufacturing method of photosensitive element |
EP1983579A3 (en) * | 2007-04-20 | 2010-07-21 | SANYO Electric Techno Create Co., Ltd. | Method of manufacturing semiconductor film and method of manufacturing photovoltaic element |
EP1986242A3 (en) * | 2007-04-23 | 2010-07-21 | Sanyo Electric Co., Ltd. | Method of manufacturing a semiconductor film using hot wire CVD and method of manufacturing a photovoltaic element |
US7807495B2 (en) | 2007-04-23 | 2010-10-05 | Sanyo Electric Co., Ltd. | Method of manufacturing semiconductor film and method of manufacturing photovoltaic element |
JP2008103748A (en) * | 2007-11-19 | 2008-05-01 | Hideki Matsumura | Catalytic chemical vapor deposition equipment |
US8419856B2 (en) | 2010-01-14 | 2013-04-16 | Tokyo Electron Limited | Substrate processing apparatus |
JP2014522579A (en) * | 2011-06-10 | 2014-09-04 | アプライド マテリアルズ インコーポレイテッド | Method for cleaning a surface of a substrate using a hot wire chemical vapor deposition (HWCVD) chamber |
Also Published As
Publication number | Publication date |
---|---|
JP3453214B2 (en) | 2003-10-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3453214B2 (en) | Method of manufacturing thin film transistor by catalytic CVD method and thin film transistor | |
JP3558200B2 (en) | Method for forming polycrystalline film by crystallization of microcrystalline film, method for forming thin film transistor, thin film transistor, and liquid crystal display | |
CN100452423C (en) | Semiconductor device | |
Kumagawa et al. | Epitaxial growth with light irradiation | |
US5879970A (en) | Process of growing polycrystalline silicon-germanium alloy having large silicon content | |
US20080246101A1 (en) | Method of poly-silicon grain structure formation | |
JPH0773101B2 (en) | Plasma enhanced chemical vapor deposition | |
EP0344863A1 (en) | A method of producing a thin film transistor | |
US5753541A (en) | Method of fabricating polycrystalline silicon-germanium thin film transistor | |
JPH05343316A (en) | Manufacture of semiconductor device | |
JP2592238B2 (en) | Method for manufacturing thin film transistor | |
JPS6340314A (en) | Manufacture of thin film by catalytic cvd method and device therefor | |
US6326226B1 (en) | Method of crystallizing an amorphous film | |
JP3484815B2 (en) | Method for manufacturing thin film transistor | |
JP2008507846A (en) | Nanocrystalline silicon deposition using a single wafer chamber | |
WO2000001004A1 (en) | Method of forming single-crystal silicon layer and method of manufacturing semiconductor device | |
JPH04318973A (en) | Thin film transistor and manufacture thereof | |
JP3116403B2 (en) | Method for manufacturing thin film transistor | |
JP4222232B2 (en) | Thin film transistor manufacturing method | |
US20020047122A1 (en) | Polycrystalline silicon layer, its growth method and semiconductor device | |
KR100425857B1 (en) | Method of crystallizing amorphous silicon thin film using crystallization inducing thin film with minimum thickness and concentration | |
JP3881715B2 (en) | Crystalline semiconductor film forming method, active matrix device manufacturing method, and electronic device manufacturing method | |
JPH0639702B2 (en) | Deposited film formation method | |
JPH0365434B2 (en) | ||
Matsumura et al. | Low-temperature formation of device-quality polysilicon films by CAT-CVD method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20070718 Year of fee payment: 4 |
|
FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080718 Year of fee payment: 5 |
|
FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080718 Year of fee payment: 5 |
|
FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090718 Year of fee payment: 6 |
|
FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090718 Year of fee payment: 6 |
|
FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100718 Year of fee payment: 7 |
|
FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110718 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110718 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120718 Year of fee payment: 9 |
|
FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120718 Year of fee payment: 9 |
|
FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130718 Year of fee payment: 10 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
EXPY | Cancellation because of completion of term |