JPH0824198B2 - Heterojunction diode manufacturing method - Google Patents

Description

TECHNICAL FIELD The present invention relates to a method for manufacturing a heterojunction diode used for detecting light, radiation and the like.

2. Description of the Related Art Conventionally, a junction element using a semiconductor has been widely used as a device for converting visible light, infrared light, radiation, etc. into an electric signal. A depletion layer generated when a reverse bias voltage is applied to a pn (pin) junction diode manufactured by the injection method is used as a sensitive layer. However, these manufacturing processes require high-temperature treatment of 900 ° C or higher, which causes thermally-induced defects, and in the case of the ion implantation method, substrate damage due to implantation that occurred during implantation is also removed by annealing treatment. In many cases, the dark current due to recombination increases and it is difficult to obtain the S / N ratio. Moreover, since the manufacturing process is complicated, the manufacturing time is long.

Therefore, recently, an amorphous semiconductor film, for example, an amorphous silicon carbide film, is formed on a silicon single crystal substrate by a high frequency or direct current plasma CVD method at a relatively low temperature of 200 ° C to 300 ° C to induce defects in the crystal. Attempts have been made to reduce the time required for film deposition by forming a relatively large RF power which is constant all the time.

However, in the heterojunction diode by the above method, the dark current at the time of applying the reverse bias voltage is due to the recombination current through the defect level of the interface caused by the plasma damage on the surface of the silicon single crystal substrate. There was a problem of becoming big. Also, to reduce plasma damage
When a film is deposited with a low RF power, there is a problem that the film deposition rate decreases and the film deposition time increases.

For example, FIGS. 4 and 5 show the dark current when a reverse bias voltage is applied when a film is formed under the following conditions.
RF power dependence and film deposition rate RF power dependence.

Single crystal substrate P-type silicon (10kΩcm) Substrate temperature 200 ℃ Gas used Monosilane (100%), Methane (100%) Gas flow rate Monosilane 70SCCM Methane 30SCCM Gas pressure 0.6Torr Film thickness 150nm RF power 11mW / cm ² or less Low power In the case of, the dark current of the heterojunction diode is small and can be stably manufactured, but the film deposition rate is 1 / m compared with the case of high power of 40 mW / cm ^2.
4 to 1/3 slow.

An object of the present invention is to provide a method for manufacturing a heterojunction diode which can solve the above problems.

Means for Solving the Problems In order to solve the above problems, a method for manufacturing a heterojunction diode of the present invention is a low power to a high power in depositing an amorphous semiconductor film on a silicon single crystal substrate by a plasma CVD method. This is a method of switching the RF power in n steps (n ≧ 2).

Effect According to the manufacturing method of the present invention, first, in order to reduce the plasma damage on the surface of the silicon single crystal substrate, the amorphous semiconductor film is deposited with low power to a film thickness not affected by plasma. The dark current of the junction diode can be reduced, and the film deposition time can be shortened by subsequently depositing the amorphous semiconductor film with high power for high-speed deposition.

Example 1 An example of the present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1 shows a manufacturing process of a heterojunction diode manufactured by the manufacturing method of the present invention.

First, an amorphous silicon carbide film is used as an amorphous semiconductor film 2 which forms a heterojunction with the substrate 1 on the entire upper surface of a silicon single crystal substrate (P type, 10 kΩcm) 1 using a parallel plate plasma CVD apparatus. It is formed under the following conditions (FIG. 1 (a)).

Substrate temperature 200 ℃ Gas used Monosilane (100%), Methane (100%) Gas flow rate Monosilane 70SCCM Methane 30SCCM Gas pressure 0.6Torr RF power 5W (7mW / cm ² ) Film deposition rate 3nm / min Film thickness 5nm Next, amorphous On the entire surface of the high-quality semiconductor film 2 without changing other conditions
An amorphous silicon carbide film is continuously formed as the amorphous semiconductor film 3 under the following conditions while increasing only RF power and connecting discharge (FIG. 1 (b)).

Substrate temperature 200 ℃ Gas used Monosilane (100%), Methane (100%) Gas flow rate Monosilane 70SCCM Methane 30SCCM Gas pressure 0.6Torr RF power 30W (42mW / cm ² ) Film deposition rate 11.5nm / min Film thickness 150nm Finally, both sides Then, an aluminum electrode 4 is formed to a thickness of about 300 nm using a resistance heating vapor deposition device (FIG. 1 (c)).

FIG. 2 shows the IV characteristics of the heterojunction diode manufactured by the above method, in which the dark current is reduced by one to two digits as compared with the case where film deposition is continuously performed at 30 W. Further, the film deposition time is shortened to about 1/4 as compared with the case where the film deposition is always performed at 5W.

When the film quality of the amorphous silicon carbide film was analyzed by X-ray photoelectron spectroscopy (ESCA), the carbon (C) and silicon (Si) ratio (C / Si) in the film was 5 W. About 15
%, About 25% in the case of 30 W, which obviously depends on the magnitude of the RF power.

Second Embodiment Another embodiment of the present invention will be described below with reference to FIGS. 1 and 3.

First, an amorphous silicon film is used as an amorphous semiconductor film 2 forming a heterojunction with the substrate 1 on the entire upper surface of a silicon single crystal substrate (P type, 10 kΩcm) 1 and a parallel plate plasma CVD method is used.
It is formed using the apparatus under the following conditions (FIG. 1 (a)).

Substrate temperature 200 ℃ Gas used Monosilane (100%) Gas flow rate Monosilane 100SCCM Gas pressure 0.6Torr RF power 5W (7mW / cm ² ) Film deposition rate 3.5nm / min Film thickness 5nm Next, on the entire surface of the amorphous semiconductor film 2. Without changing other conditions
An amorphous silicon film is continuously formed as the amorphous semiconductor film 3 under the following conditions while increasing the RF power only and sustaining the discharge (FIG. 1 (b)).

Substrate temperature 200 ° C Gas used Monosilane (100%) Gas flow rate Monosilane 100SCCM Gas pressure 0.6Torr RF power 30W (42mW / cm ² ) Film deposition rate 13nm / min Film thickness 150nm Finally, aluminum electrodes 4 on both sides are heated by resistance heating. To form about 300 nm (FIG. 1 (c)).

FIG. 3 shows the IV characteristics of the heterojunction diode manufactured by the above method, in which the dark current is reduced by 1 to 2 digits as compared with the case where film deposition is continuously performed at 30 W. Further, the film deposition time is shortened to about 1/4 as compared with the case where the film deposition is always performed at 5W.

In addition, switching of RF power (P) is less than 15 mW / cm ² for low power, and 15 mw / cm ² or more for high power, 50 mW
/ cm ² or less (range shown in FIG. 5) is desirable.

EFFECTS OF THE INVENTION According to the above-described manufacturing method of the present invention, by first depositing an amorphous semiconductor film with low power to a film thickness at which the crystal substrate is not affected by plasma, dark current during reverse bias voltage application can be reduced. It is possible to reduce the film thickness, and then the film deposition time can be shortened by depositing the amorphous semiconductor film with high power, which is extremely effective in practice for realizing a high-performance heterojunction diode.

[Brief description of drawings]

FIG. 1 is an explanatory view showing a process of an embodiment of the present invention, FIG. 2 is a view showing IV characteristics of a heterojunction diode using the amorphous silicon carbide film of Embodiment 1, and FIG. The figure which shows the IV characteristic of the heterojunction diode using the amorphous silicon film of Example 2, FIG. 4 is a figure which shows RF power dependence of the dark current at the time of reverse bias voltage application, and FIG. It is a figure which shows RF power dependence of a deposition rate. 1 ... Silicon single crystal substrate, 2, 3 ... Amorphous semiconductor film,
4 ... Aluminum electrode, 5,7 ... with RF power switching,
6,8 …… RF power 30W (constant).

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takashi Hirao, 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) Bibliography Japanes of Applied Physics, Part 1, V. 23, No. 5, P.I. 515-524 (1984) IEICE Technical Report CPM93-61 (1993)

Claims (3)

[Claims] 1. In forming an amorphous silicon film or an amorphous silicon carbide film on a silicon single crystal substrate by a plasma CVD method, the high frequency power (RF power) is increased from low power to high power. N stages (n ≧ 2)
A method for manufacturing a heterojunction diode, characterized in that 2. The method for manufacturing a heterojunction diode according to claim 1, wherein the RF power is continuously switched. 3. RF power (P) is low power: P <15 mW / cm ² "High power: 50 mW / cm ² ≥ P ≥ 15 mW / cm ² " A method for manufacturing the heterojunction diode described.