JPH08236690A - Three-dimensional mounting module and manufacture thereof - Google Patents

Abstract

PURPOSE: To laminate a large number of semiconductor chips by laminating the wiring pads exposed to the side faces of a semiconductor chip and other exposed wiring pads while connecting through a wiring part formed on each side face of the semiconductor chip through metal deposition. CONSTITUTION: A plurality of semiconductor chips 1, each formed with a semiconductor laminated circuit, are laminated vertically. In other words, the wiring pads 2 exposed to the side face of the semiconductor chips 1 are connected with the wiring pads 2 exposed to the side face of another semiconductor chip 1 laminated thereon through the wiring parts 3 formed on each side face of the semiconductor chips 1 through metal 5 deposition. When the wiring pads 2 provided on the side face of the semiconductor chips 1 are interconnected through the wiring parts 3, the wiring pads 2 can be prevented from being concealed even if another semiconductor chip 1 is laminated on one semiconductor chip 1. With such arrangement, a large number of semiconductor chips 1 can be laminated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a three-dimensional mounting (multi-chip) module used for mounting a plurality of semiconductor chips in one package and a manufacturing method thereof.

[0002]

2. Description of the Related Art Conventionally, it has been practiced to form a module by combining a plurality of semiconductor chips and to mount the module in one package, but most of the semiconductor chips are arranged side by side. Then, there is a problem that the mounting area becomes large because it is mounted in the package. Therefore, it has been attempted to stack a plurality of semiconductor chips on top of each other and mount them in one package.

For example, in Japanese Unexamined Patent Publication No. 64-28856, as shown in FIG. 10, a second layer semiconductor chip 31 is stacked on the first layer semiconductor chip 30, and a third layer is formed on the second layer semiconductor chip 31. Pad 34 provided on the upper surface of each semiconductor chip 30, 31, 32
The modules are formed by bonding the wires to each other with the wires 35, and the pads 36 of the package and the semiconductor chips 30, 3 are formed.
A module is mounted on a package by bonding a pad 34 provided on the upper surfaces of the substrates 1 and 32 with a wire 35.

Further, in Japanese Patent Laid-Open No. 6-5665, FIG.
As shown in FIG. 3, a plurality of IC chips 42 each having an electrode portion 41 formed on the cutout portion 40 opened on the upper surface and the side surface are stacked and mounted, and a metal rod 44 having a strip-shaped electrode 43 is inserted into the cutout portion 40. The electrode portion 41 of the IC chip 42 and the electrode 43 of the metal rod 44 are brought into contact with each other to bring the upper and lower IC chips 4 into contact with each other.
There is described a multi-IC chip in which 2 is electrically connected.

[0005]

However, the above-mentioned Japanese Patent Application Laid-Open No. 64
No. 28856 discloses a second layer semiconductor chip 31 rather than the first layer semiconductor chip 30 and a second layer semiconductor chip 31 rather than the first layer semiconductor chip 30 in order to expose the pads 34 on the upper surfaces of the semiconductor chips 30, 31, 32. Third layer semiconductor chip 3
2 must be formed smaller, and there is a problem that a large number of semiconductor chips cannot be stacked due to a limit in the number of stacked semiconductor chips. Further, in the above-mentioned Japanese Laid-Open Patent Publication No. 6-5665, the metal rod 44 must be positioned and inserted with high accuracy, and there is a problem that the multi-IC chip cannot be easily manufactured.

The present invention has been made in view of the above points, and it is an object of the present invention to provide a three-dimensional mounting module which can stack a large number of semiconductor chips and can be easily manufactured, and a manufacturing method thereof. It is intended.

[0007]

A three-dimensional mounting module according to the present invention includes a wiring pad 2 exposed on a side surface of a semiconductor chip 1 and another semiconductor chip 1 stacked on the semiconductor chip 1. It is characterized in that it is formed by connecting the wiring pad 2 exposed on the side surface to the wiring portion 3 formed on each side surface of the semiconductor chip 1 by vapor deposition of metal 5.

In the method for manufacturing a three-dimensional mounting module according to the present invention, another semiconductor chip 1 is laminated on the semiconductor chip 1 formed by exposing the wiring pads 2 on the side surface,
The photoresist 4 is formed on the side surface of the semiconductor chip 1, and the photoresist 4 is exposed and developed to remove the photoresist 4 on the wiring pad 2 portion and its peripheral portion. Wiring part 3 for connecting wiring pads 2 of each semiconductor chip 1 by vapor deposition
And the metal 5 other than the wiring part 3 and the photoresist 4 are removed.

In the method for manufacturing a three-dimensional mounting module according to the present invention, another semiconductor chip 1 is laminated on the semiconductor chip 1 formed by exposing the wiring pads 2 on the side surface,
The metal 5 is deposited on the side surface of the semiconductor chip 1 and
Photoresist 4 is formed on the surface of the
Is exposed and developed to remove the photoresist 4 except for the wiring pad 2 portion and its peripheral portion to expose the metal 5, and the exposed metal 5 is removed by etching for wiring of each semiconductor chip 1. The wiring part 3 for connecting the pads 2 to each other is formed.

In the method for manufacturing a three-dimensional mounting module according to the present invention, another semiconductor chip 1 is stacked on the semiconductor chip 1 formed by exposing the wiring pads 2 on the side surface,
A wiring portion 3 for connecting the wiring pads 2 of each semiconductor chip 1 by vapor-depositing the metal 5 on the side surface of the semiconductor chip 1 and removing the metal 5 except the wiring pad 2 portion and its peripheral portion by physical means. Is formed.

[0011]

The wiring pad 2 exposed on the side surface of the semiconductor chip 1 and the wiring pad 2 exposed on the side surface of another semiconductor chip 1 stacked on the semiconductor chip 1 are deposited on the metal 5. Since the wiring pads 3 formed on the side surfaces of the semiconductor chip 1 are connected to each other by connecting the wiring pads 2 provided on the side surfaces of the semiconductor chip 1 to each other on the semiconductor chip 1, It is possible to prevent the wiring pad 2 from being covered even if another semiconductor chip 1 is stacked.

Further, the photoresist 4 is formed on the side surface of the semiconductor chip 1, and the photoresist 4 is exposed and developed to remove the photoresist 4 on the wiring pad 2 portion and its peripheral portion. A metal 5 is vapor-deposited on the surface of the semiconductor chip 1 to form a wiring portion 3 for connecting the wiring pads 2 of each semiconductor chip 1, and the metal 5 and the photoresist 4 other than the wiring portion 3 are removed, or a side surface of the semiconductor chip 1 The metal 5 is deposited on the surface of the metal 5, and the photoresist 4 is formed on the surface of the metal 5. The photoresist 4 is exposed and developed to remove the photoresist 4 except the wiring pad 2 portion and its peripheral portion. And the exposed metal 5 are removed by etching to connect the wiring pads 2 of the respective semiconductor chips 1 to each other.
Or forming metal 5 on the side surface of the semiconductor chip 1 and removing the metal 5 except the wiring pad 2 portion and its peripheral portion by a physical means.
Since the wiring portion 3 for connecting the wiring pads 2 to each other is formed, the wiring pads 2 are connected to each other by the wiring portion 3 formed by vapor deposition of the metal 5 to thereby form the semiconductor chip 1
It is possible not to use a separate member such as a metal rod when electrically connecting the two.

[0013]

EXAMPLES The present invention will be described in detail below with reference to examples. FIG.
Shows an example of the three-dimensional mounting module of the present invention. Reference numeral 1 is a semiconductor chip on which a semiconductor integrated circuit is formed, and a plurality of semiconductor chips 1 are vertically stacked.
The upper surface of the semiconductor chip 1 is entirely covered with SiO ₂ or SN.
The protective film 14 such as _x is grown and formed. Reference numeral 2 is a wiring pad made of aluminum (Al) or the like and electrically connected to the semiconductor integrated circuit. The protective film 14 is provided with a notch 16 opening to the upper surface and the side surface and is exposed to the outside. A wiring portion 3 is formed by vapor deposition of a metal 5, and the wiring portions 3 electrically connect the wiring pads 2 of different semiconductor chips 1 to each other. Reference numeral 15 is a wire bonding pad made of Al or the like that is electrically connected to the semiconductor integrated circuit, and is exposed by providing an opening 17 having an upper surface opened in the protective film 14 of the uppermost semiconductor chip 1. The three-dimensional mounting module thus formed is mounted on the package by wire-bonding the wire bonding pads 15 and the package terminal pads.

In the above three-dimensional mounting module, the insulation between the semiconductor chips 1 is provided by the protective film 14.
In addition, the insulation between the wiring parts 3 is provided by the substrate 20 of the semiconductor chip 1.
This can be performed by setting the conductivity type and the potential of the above and the potential of the wiring portion 3 to be the reverse bias of the Schottky junction. In such a three-dimensional mounting module, since a large number of semiconductor chips 1 are stacked in the vertical direction, the occupied area can be reduced as compared with mounting the semiconductor chips 1 side by side. Further, since the wiring pads 2 exposed on the side surface of the semiconductor chip 1 are connected by the wiring portion 3, it is not necessary to reduce the size of the semiconductor chip 1 stacked on the upper side, and therefore, in principle The semiconductor chip 1 can also be laminated on the layers. Then, for example, even if 20 semiconductor chips 1 having a thickness of 50 μm are used, the thickness of the three-dimensional mounting module is only 1 mm, and a considerably high density mounting becomes possible.

The semiconductor chip 1 can also be formed to a thickness of 50 μm or less, and when an SOI (silcon on insulator) substrate or the like as shown in FIG. 9 becomes widespread as the semiconductor chip 1, the SIO substrate or the like becomes a substrate. Since the SiO ₂ film 22 is interposed between the semiconductor element 21 and the semiconductor element 21 to electrically separate the substrate 20 and the semiconductor element 21, the thickness of the substrate 20 greatly affects the physical properties of the semiconductor element 21. Therefore, the thickness of the substrate 20 can be remarkably reduced, and the thickness of the three-dimensional mounting module can be remarkably reduced.

Next, a method of manufacturing the three-dimensional mounting module will be described in detail. FIG. 2 shows a process of forming the semiconductor chip 1. Reference numeral 10 shown in FIG. 2A is a wafer made of silicon or the like, and devices are formed on the wafer 10. Next, as shown in FIG. 2B, a metal such as aluminum is deposited on the entire surface of the wafer 10 to deposit the metal layer 12 thereon.
To form. Next, as shown in FIG. 2C, the unnecessary portion is removed by leaving only the required portion of the metal layer 12 and the pad portion 13 is formed.
To form. Next, as shown in FIG.
A protective film 14 such as SiO ₂ or SN _x is grown and formed on the wafer 10 so as to cover it. Next, as shown in FIG. 2E, the protective film 14 on the pad portion 13 used as a wire bonding pad 15 described later is removed by etching or the like to form an opening 17. Then Fig. 2 (e)
3, the wafer 10 is cut into a predetermined size and the cut end face is polished to form a cutout portion 16 opening to the side surface and the upper surface of the protective film 14 as shown in FIG. 3C. By exposing the pad portion 13 located at the outermost end as the wiring pad 2, the wiring pad portion 2, the wire bonding pad 15, and the protection on the substrate 20 as shown in FIGS. The semiconductor chip 1 having the film 14 formed thereon is produced. Note that it is not necessary to provide the opening 17 except for the semiconductor chip 1 stacked on the top.

FIG. 4 shows an example of a method of manufacturing a three-dimensional mounting module using the semiconductor chip 1 produced as described above. In this embodiment, first, the back surface of the semiconductor chip 1 is polished to make the thickness of the semiconductor chip 1 as thin as possible (about 50 μm).
As shown in (a), they are stacked on top of each other and bonded. At this time, the wiring chips 2 to be electrically joined are oriented in the same direction. Next, the side surface of this laminated body is polished to be flat, and a photoresist 4 is formed on the entire surface of the laminated body by means of dipping, spraying or the like as shown by hatching in FIG. Next, this laminated product is irradiated with light so that the photoresist 4 in the wiring chip 2 portion and the peripheral portion thereof is exposed as shown in FIG. And the photoresist 4 in the peripheral portion is removed.
Next, as shown by the arrow in FIG. 4 (d), the metal 5 such as aluminum (Al) is shown diagonally above the laminate (indicated by dots).
Is deposited to form the wiring portion 3 on the portion of the wiring chip 2 from which the photoresist 4 has been removed and its peripheral portion, and finally, the remaining photoresist 4 and the metal 5 thereon are removed by a lift-off method or the like. As a result, a three-dimensional mounting module as shown in FIG. 4 (e) can be formed. still,
In FIG. 4, the wire bonding pad 15 is not shown. Although the wiring chip 2 is provided only on one side surface of the semiconductor chip 1 in FIG. 4, the wiring chip 2 may be provided on the other side surface, and the wiring portion 3 is formed in the same manner as described above. Further, although only two semiconductor chips 1 are stacked in FIG. 4, any number of layers may be stacked.

FIG. 5 shows another method for manufacturing a three-dimensional mounting module. First, the back surface of the semiconductor chip 1 is polished to reduce the thickness of the semiconductor chip 1 as much as possible (about 50
μm), and this semiconductor chip 1 is vertically overlapped and bonded as shown in FIG. At this time, the wiring chips 2 to be electrically joined are oriented in the same direction. Next in FIG.
As shown by the arrow in (b), the side surface of this laminate is polished to be flat, and a metal 5 such as Al (shown by a dotted pattern) is vapor-deposited on the side surface of the laminate obliquely from above. Next, a photoresist 4 is formed on the entire surface of the layered product by means of dipping, spraying or the like, as shown by the hatching in FIG. Next, this laminate is irradiated with light and exposed and developed so that the photoresist 4 on the wiring chip 2 and its peripheral portion remains as shown in FIG. 5D. Next, the metal 5 in the portion not covered with the photoresist 4 is etched and removed with a chemical solution such as phosphoric acid or hydrochloric acid to form the remaining metal 5 as the wiring portion 3, and then the photoresist 4 on the surface of the remaining metal 5 is formed. By removing the, it is possible to form a three-dimensional mounting module as shown in FIG. The wire bonding pad 15 is not shown in FIG.
Further, in FIG. 5, the wiring chip 2 is provided only on one side surface of the semiconductor chip 1, but the wiring chip 2 is provided on the other side surface.
May be provided, and the wiring portion 3 is formed in the same manner as above. Further, although only two semiconductor chips 1 are stacked in FIG. 5, any number of layers may be stacked.

FIG. 6 shows another method for manufacturing a three-dimensional mounting module. First, the back surface of the semiconductor chip 1 is polished to reduce the thickness of the semiconductor chip 1 as much as possible (about 50
μm), and the semiconductor chip 1 is vertically overlapped and bonded as shown in FIG. At this time, the wiring chips 2 to be electrically joined are oriented in the same direction. Next, the side surface of this laminate is polished to be flat, and as shown by an arrow in FIG.
And the like metal 5 (indicated by dots) is deposited. Next, as shown by the arrow in FIG. 6C, the metal 5 is irradiated with a high-power laser so that the photoresist 4 in the wiring chip 2 portion and the peripheral portion thereof remains, and the unnecessary portion of the metal 5 is evaporated. 6E, or the remaining metal 5 is formed as the wiring portion 3 by scraping off the unnecessary portion of the metal 5 with the grinder 19 or the like as shown in FIG. 6D. The original implementation module can be created.
The wire bonding pad 15 is not shown in FIG. Although the wiring chip 2 is provided only on one side surface of the semiconductor chip 1 in FIG. 6, the wiring chip 2 may be provided on the other side surface, and the wiring portion 3 is formed in the same manner as described above. Further, although only two semiconductor chips 1 are stacked in FIG. 6, any number of layers may be stacked.

FIG. 7 shows another semiconductor chip 1 used in the three-dimensional mounting module of the present invention. In this semiconductor chip 1, the wafer 10 is cut into a predetermined size as shown in FIG. 2E, and then the cut end surface is polished to expose only the side surface of the wiring pad 2 to the side surface of the semiconductor chip 1. It was done. That is, the semiconductor chip 1 does not have the cutout portion 16.

By using the semiconductor chip 1 shown in FIG. 7 in the same manner as above, a three-dimensional mounting module as shown in FIG. 8 can be formed. The width dimension of the wiring portion 3 can be made smaller.

[0022]

As described above, according to the present invention, the wiring pad exposed on the side surface of the semiconductor chip and the wiring pad exposed on the side surface of another semiconductor chip stacked on this semiconductor chip are provided. Since it was formed by connecting the wiring parts formed on each side surface of the semiconductor chip by vapor deposition of metal, by connecting the wiring pads provided on the side surface of the semiconductor chip to another semiconductor chip on the semiconductor chip. Even if stacked, the wiring pads can be prevented from being covered up, and a large number of semiconductor chips can be stacked.

Further, a photoresist is formed on the side surface of the semiconductor chip, the photoresist is exposed and developed to remove the photoresist on the wiring pad portion and its peripheral portion, and metal is deposited on the side surface of the semiconductor chip. Forming a wiring part for connecting the wiring pads of each semiconductor chip and removing the metal and photoresist other than the wiring part, or depositing a metal on the side surface of the semiconductor chip and forming a photoresist on the surface of the metal Then, the photoresist is exposed and developed to remove the photoresist other than the wiring pad portion and its peripheral portion to expose the metal, and the exposed metal is removed by etching to form the wiring pad of each semiconductor chip. For wiring while forming a wiring part that connects each other or depositing metal on the side surface of the semiconductor chip By removing the metal other than the pad portion and its peripheral portion by a physical means to form a wiring portion that connects the wiring pads of each semiconductor chip, a metal is used when electrically connecting the semiconductor chips to each other. Since it is possible to avoid using a separate member such as a rod, it is not necessary to position the metal rod, and the three-dimensional mounting module can be easily manufactured.

[Brief description of drawings]

FIG. 1 is a perspective view showing an embodiment of a three-dimensional mounting module of the present invention.

2A to 2E are cross-sectional views showing a manufacturing process of a semiconductor chip used in the present invention.

3A is a sectional view of a semiconductor chip, FIG. 3B is a plan view, and FIG. 3C is a partial perspective view.

FIG. 4A to FIG. 4E are perspective views showing an embodiment of the manufacturing process of the three-dimensional mounting module of the present invention.

5A to 5E are perspective views showing manufacturing steps of another embodiment of the same.

6 (a) to 6 (e) are perspective views showing a manufacturing process of still another embodiment of the same.

7A is a cross-sectional view showing another semiconductor chip used in the present invention, and FIG. 7B is a side view.

8 is a perspective view showing another three-dimensional mounting module of the present invention using the semiconductor chip of FIG.

FIG. 9 is a cross-sectional view showing an SOI substrate.

FIG. 10 is a plan view showing a conventional example.

FIG. 11 is a perspective view showing another conventional example.

[Explanation of symbols]

 1 semiconductor chip 2 wiring pad 3 wiring part 4 photoresist 5 metal

Claims (4)

[Claims] 1. A wiring pad exposed on a side surface of a semiconductor chip and a wiring pad exposed on a side surface of another semiconductor chip stacked on the semiconductor chip are deposited on the semiconductor chip by metal deposition. A three-dimensional mounting module, which is formed by connecting wiring portions formed on each side surface. 2. A semiconductor chip is formed on a side surface of which a wiring pad is exposed, another semiconductor chip is laminated on the side surface of the semiconductor chip, a photoresist is formed on the side surface of the semiconductor chip, and the photoresist is exposed and developed. The photoresist on the wiring pad portion and its peripheral portion is removed, and a metal is deposited on the side surface of the semiconductor chip to form a wiring portion for connecting the wiring pads of each semiconductor chip, and the metal and photoresist other than the wiring portion A method for manufacturing a three-dimensional mounting module, characterized in that and are removed. 3. A semiconductor chip is formed on a side surface of which a wiring pad is exposed, another semiconductor chip is laminated on the side surface of the semiconductor chip, a metal is deposited on the side surface of the semiconductor chip, and a photoresist is formed on the surface of the metal. The photoresist is exposed and developed to remove the photoresist other than the wiring pad and its peripheral portion to expose the metal and the exposed metal is removed by etching to connect the wiring pads of each semiconductor chip. A method for manufacturing a three-dimensional mounting module, which comprises forming a wiring portion for forming the wiring part. 4. A semiconductor chip is formed on a side surface of which a wiring pad is exposed, another semiconductor chip is laminated on the side surface of the semiconductor chip, and a metal is vapor-deposited on the side surface of the semiconductor chip. A method for manufacturing a three-dimensional mounting module, characterized in that the wiring portion for connecting the wiring pads of each semiconductor chip is formed by removing the above by a physical means.