JPH08228168A - Spread spectrum communication equipment - Google Patents

Abstract

PURPOSE: To provide a correlation device with the circuit constitution of a small scale even when a multiplex number is large by preparing a spreading code channel dedicated to synchronization and providing a synchronization circuit for performing code phase synchronization and clock synchronization only in this channel. CONSTITUTION: The spreading code generator 103 of a transmission part generates code sequences PN1 -PNK for data and the code sequence PN0 for the synchronization, an adder 104 adds the code sequences for the data outputted from a parallel combination mapping part 102 and the code sequence PN0 directly inputted from the spreading code generator 103 and a high voltage stage 105 converts the output of the adder 104 into a prescribed frequency and sends it out. The carrier recovery circuit 205 of a reception part inversely spreads reception signals by the code sequence PN0 for the synchronization and recovers carrier waves and a base band demodulation circuit 206 generates base band signals based on the reproduction carrier waves and judges the data. By the constitution, digital processings are used often for the demodulation of the reception signals and a circuit scale is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a direct sequence spread spectrum communication apparatus, and more particularly to a communication apparatus in a parallel combination multiplex communication method for multiplexing and transmitting a plurality of spread code channels.

[0002]

2. Description of the Related Art Conventionally, in a spread spectrum communication system using a direct spread system, a transmitting side uses a spread code sequence such as a pseudo noise code (PN code) from a baseband signal of a digital signal to be normally transmitted, It produces a baseband signal with a much wider bandwidth than the raw data. In addition, PSK (Phase Shift Keying), FS
Modulates K (frequency shift keying), etc., and RF
Converts to (radio frequency) signal and transmits.

On the other hand, on the receiving side, the same spreading code as on the transmitting side is used to perform despreading for correlating with the received signal, and the received signal is converted into a narrow band signal having a bandwidth corresponding to the original data. . Then, normal data demodulation is performed to reproduce the original data.

As described above, in the spread spectrum communication system, the transmission bandwidth is extremely wider than the information bandwidth, and therefore, under the condition that the transmission bandwidth is constant, the transmission rate is much lower than that of the ordinary narrow band modulation system. It will not be possible.

In order to solve this problem, there is a method called parallel combination. In this method, a high-speed information signal is converted into low-speed parallel data, r pieces are selected from k spread code sequences according to the value of the parallel data, added, and then converted into an RF signal for transmission. By doing so, high-speed data transmission can be realized under the condition that the transmission bandwidth is constant without lowering the spreading factor of spread modulation.

FIG. 3 is a block diagram showing the structure of a transmitter of this system.

The input data is first converted into n parallel data by the serial / parallel converter 301. The converted parallel data is selected by the parallel combination mapping unit 302 from k different spread code outputs of the spread code generator 303, and r spread codes are selected and output to the adder 304.

If the output spreading code has a positive or negative polarity depending on the data, 2 ⁿ <2 ^r _k C
If n, k, and r are determined so as to satisfy _r , n times as much information can be transmitted as compared with the case where such multiplexing is not performed.

Next, the r spread code outputs are added by the adder 304 and output to the high frequency stage 305. In the high frequency stage 305, frequency conversion processing to the transmission frequency, amplification, filtering processing, etc. are performed, and the signal is transmitted by the antenna 306.

FIG. 4 is a block diagram showing the structure of the receiver.

The signal received by the antenna 401 is subjected to amplification, filtering and frequency conversion processing by the high frequency processing section 402 and converted into an intermediate frequency signal. The intermediate frequency signal is distributed to the channels corresponding to each of the k parallel spread codes. In each channel, the input signal is subjected to despreading in the correlator 403 by correlation detection with the output of the spreading code generator 404 corresponding to the channel.

The despread signal is then demodulated by demodulator 406. Subsequently, this demodulated signal is converted into n pieces of data by the parallel combination inverse mapping unit 407, and further converted into serial data by the parallel-serial converter 408, so that the original information is reproduced.

[0013]

However, in the above-mentioned conventional example, since the carrier wave is not reproduced at the time of inputting the correlator, the correlator of each demodulation channel must operate in the intermediate frequency stage. However, there is a drawback that the circuit scale becomes very large as the number of multiplexed signals increases.

In order to perform a normal demodulation operation in each demodulation channel, code phase synchronization and clock synchronization must be established for the transmission spread code included in the received signal output from each spread code generator. However, it is necessary to provide a synchronizing circuit for each channel for this purpose, which also causes an increase in circuit scale.

An object of the present invention is to provide a spread spectrum communication device capable of realizing a correlator with a small circuit configuration even when the number of multiplexed signals is large.

[0016]

According to the present invention, serial-parallel conversion means for converting an input serial data string into parallel data of a predetermined number of symbols n, driven by the same clock, having the same cycle, and having the same code phase. Of the k data code sequences among the k data code sequences, the spreading code generation means for generating the k (k <n) data code sequences and the one or more synchronization code sequences that match each other and the parallel data string are used. Parallel combination mapping means for selectively extracting r (r <k) codes, addition means for adding the r code sequences output from the parallel combination mapping means and the synchronization code sequence, and the addition means. Of the output of the converter to a predetermined frequency, a transmitter having an antenna means for sending the output of the converter to a transmission line, and a carrier recovery for reproducing a carrier based on a received signal and a reference code. hand A converting means for converting the received signal into a baseband signal based on the carrier wave reproduced by the carrier wave reproducing means; and a plurality of baseband signals converted by the converting means for judging based on a plurality of reference symbols. It is characterized in that it is provided with a receiver having a judging means and a converting means for converting the outputs of the plurality of judging means into n pieces of data.

[0017]

According to the present invention, a spread code channel dedicated to synchronization is prepared, and a synchronization circuit for performing code phase synchronization and clock synchronization common to all channels is provided only in this channel, so that other data channels can be used. There is no need to provide a synchronization circuit for each, and furthermore, the carrier is reproduced by despreading the synchronization dedicated channel, and the received signal is directly converted into a baseband signal using this reproduced carrier, so that the number of multiplexing is large. Even in such a case, the correlator can be realized with a small circuit configuration.

[0018]

1 is a block diagram showing the structure of a transmitter in a first embodiment of the present invention, and FIG. 2 is a block diagram showing the structure of a receiver in this first embodiment.

In FIG. 1, a serial-parallel converter 101 is for converting data input in series into n pieces of parallel data, and a parallel combination mapping section 102 is a spread code for the parallelized data. The r code is selected from the k spread codes output from the generator 103.

The spreading code generator 103 generates k different spreading codes and a spreading code dedicated to synchronization, and the adder 104 is parallel to the spreading code dedicated to synchronization output from the spreading code generator 103. Combination mapping unit 102
R outputs of are added. High frequency stage 105
Is for converting the output of the adder 104 into a transmission frequency signal.
The output of 5 is transmitted as a radio wave.

Further, in FIG. 2, the receiving antenna 201
Receives radio waves, and the high frequency signal processing unit 20
Reference numeral 2 is for performing processing such as filtering and amplification of the high frequency signal received by the receiving antenna 201.

The synchronization circuit 203 captures and maintains the synchronization with the spread code and the clock on the transmission side, and the spread code generator 204 receives the code synchronization signal and the clock signal input from the synchronization circuit 203 on the transmission side. The same k + 1 spreading codes as those of the spreading code group are generated.

The carrier reproduction circuit 205 reproduces a carrier signal from the carrier reproduction spread code output from the spread code generator 204 and the output of the high frequency signal processing section 202. The baseband demodulation circuit 206 performs demodulation in the baseband using the output of the carrier reproduction circuit 205, the output of the high frequency signal processing unit 202, and the k spread codes output from the spread code generator 204.

The parallel combination inverse mapping section 207 generates n parallel data from the k outputs of the baseband demodulation circuit 206, and the parallel-serial converter 208 parallel-serializes the n parallel demodulated data. It is to convert.

In the above structure, the transmitting side first
The input data is converted by the serial-parallel converter 101 into n pieces of parallel data. On the other hand, the spread code generator 103
Generates k + 1 pieces of spread codes PN _{0 to} PN _k having the same code period but different from each other.

Of these, PN ₀ is dedicated to synchronization and carrier reproduction, and is directly input to the adder 104 without being modulated by the parallel data. Further, the remaining k spreading codes are input to the parallel combination mapping unit 102, and r spreading codes out of k are selected by the parallel data.
It is modulated and input to the adder 104.

The adder 104 linearly adds the input r + 1 signals and outputs the added baseband signal to the high frequency stage 105. The baseband signal is subsequently converted into a high frequency signal having an appropriate center frequency in the high frequency stage 105 and transmitted from the transmitting antenna 106.

On the receiving side, the signal received by the receiving antenna 201 is appropriately filtered and amplified by the high frequency signal processing section 202, and is output as it is as a transmission frequency band signal or as an appropriate intermediate frequency band signal. It

This signal is input to the synchronizing circuit 203,
The synchronization circuit 203 establishes spread code synchronization and clock synchronization for the transmission signal by using the reference spread code input from the code generator 204, and outputs the code synchronization signal and the clock signal to the spread code generator 204.

The structure of this synchronizing circuit is described in, for example, R.M. C.
Dixon's "Spread spectrum communication system" (Jatech Publishing Co., Ltd.), pages 195 to 198.
The delay lock tracking circuit described in detail on page 227 is used, or pages 147 to 162 of “Basics and Applications of Spread Spectrum Communication Technology” edited by Nakagawa (Trikeps).
Correlators using surface acoustic wave devices, which are described in detail on the page, can be used.

After the synchronization is established, the spread code generator 204 generates spread code groups PN _{0 to} PN _{k in} which the clock and the spread code phase match with the spread code group on the transmission side.

The spreading code PN ₀ dedicated to synchronization of these code groups is input to the carrier reproducing circuit 205. The carrier reproduction circuit 205 despreads the reception signal converted into the transmission frequency band or the intermediate frequency band which is the output of the high frequency signal processing unit 202 by the synchronization-dedicated spreading code PN ₀ ,
The carrier wave in the transmission frequency band or the intermediate frequency band is reproduced.

As the carrier reproducing circuit 205, for example, a circuit utilizing a phase locked loop as shown in FIG. 5 is used. In FIG. 5, the received signal and the synchronization-specific spreading code PN ₀
Are multiplied by the multiplier 501. After synchronization is established, the clock and code phase of the synchronization dedicated spreading code and the reference synchronization dedicated spreading code in the received signal match, and the transmission side synchronization dedicated spreading code is not modulated with data, and, Since the signal is always sent during signal transmission, the multiplier 501 is despread and the component of the carrier appears at its output during reception.

This output is then input to the band pass filter 502, and only the carrier component is extracted and output. Then, this output is further detected by the phase detector 50.
3, loop filter 504 and voltage controlled oscillator 50
Input to a known phase-locked loop composed of 5,
Band-pass filter 50 from voltage-controlled oscillator 505
A signal whose phase is locked to the carrier wave component output from 2 is output as a reproduced carrier wave.

The reproduced carrier wave is input to the baseband demodulation circuit 206. In the baseband demodulation circuit 206, a baseband signal is generated from the reproduced carrier wave and the output of the high frequency signal processing unit 202. The baseband signal is distributed to k branches, despread for each code by the spreading code groups PN _{1 to} PN _k output from the spreading code generator 204, and then data demodulation is performed.

The baseband demodulation circuit 206 is constructed, for example, as shown in FIG. In FIG. 6, the received signal is converted into a baseband signal by multiplying the input received signal and the reproduced carrier wave by the multiplier 601.

This baseband signal is distributed to k branches, and in each branch, each of spreading code groups PN _{1 to} PN _k which are the outputs of the spreading code generator and multipliers 603-1 to 603-1.
Correlation detection is performed for each code by multiplying by k and filtering by the low pass filter groups 604-1 to 604-1, and the baseband reception spread signal is despread. By performing data determination on this signal by the determination circuit groups 605-1 to 60-k, k pieces of demodulated data in parallel can be obtained.

This demodulated data is output as multivalued information of three levels or more. The demodulated k data are
The parallel combination inverse mapping unit 207 converts the parallel data into n parallel data, and the parallel-serial converter 208 converts the parallel data into serial data and outputs the serial data.

Next, a second embodiment of the present invention will be described.

In the first embodiment described above, the case of binary modulation has been described. In the second embodiment, the case of transmitting the synchronizing signal orthogonal to the data signal will be described.

FIG. 7 is a block diagram showing the structure of the transmitter in the second embodiment.

In FIG. 7, a serial-parallel converter 701 is for converting data input in series into n pieces of parallel data, and a parallel combination mapping section 702 is for spreading codes on the parallelized data. The r code is selected from the k spread codes output from the generator 703.

The spreading code generator 703 is for generating k different spreading codes and a spreading code dedicated to synchronization, and the adder 704 is for adding the r outputs of the parallel combination mapping section 702. is there. The high frequency stage 705
The output of the adder 704 and the spreading code for synchronization output from the spreading code generator 703 are orthogonalized to each other and converted into a transmission frequency signal, and the transmission antenna 706 transmits the output from the high frequency stage 705 as a radio wave. It is a thing.

FIG. 8 is a block diagram showing the structure of the receiver in this second embodiment.

In FIG. 8, a receiving antenna 801 receives a radio wave, and a high frequency signal processing section 802.
Is for filtering and amplifying the received high frequency signal. The synchronization circuit 803 captures and maintains the synchronization with the spread code and the clock on the transmission side, and the spread code generator 804 receives the spread code on the transmission side according to the code synchronization signal and the clock signal input from the synchronization circuit 803. The same k + 1 spreading codes as the group are generated.

The carrier reproduction circuit 805 reproduces a carrier wave signal for data from the spread code for carrier reproduction output from the spread code generator 804 and the output of the high frequency signal processing section 802. The base band demodulation circuit 806 Output of carrier reproduction circuit 805 and high-frequency signal processing unit 802
And the spreading code generator 804 outputs k spreading codes, demodulation is performed in the base band.

The parallel combination inverse mapping unit 807 generates n parallel data from the k outputs of the baseband demodulation circuit 806, and the parallel-serial converter 808 parallel-serializes the n parallel demodulated data. It is to convert.

In the above configuration, the transmitting side first
The input data is converted into n parallel data by the serial / parallel converter 701. On the other hand, the spread code generator 703
Generates k + 1 pieces of spread codes PN _{0 to} PN _k having the same code period but different from each other.

Of these, PN ₀ is dedicated to synchronization and carrier reproduction, and is directly input to the high frequency stage 705 without being modulated by the parallel data. The remaining k spreading codes are input to the parallel combination mapping unit 702, r spreading codes out of k are selected by the parallel data, and modulated and input to the adder 704.

The adder 704 linearly adds the input r signals and outputs the added baseband signal to the high frequency stage 705. This baseband signal is input to the high frequency stage 705 together with the synchronization code output from the spread code generator 703, the baseband signal and the synchronization code are quadrature modulated, and converted into a high frequency signal having an appropriate center frequency. And transmitted from the transmitting antenna 706.

In the high-frequency stage 705, for example, as shown in FIG. 9, the output of the adder 704 is multiplied by the output from the local signal generator 903 in the multiplier 901 and converted into a high-frequency signal having an appropriate center frequency. And the spreading code generator 70
The synchronization code output from the multiplier 3 is multiplied by the output of the local signal generator 903 by the multiplier 902 and the signal whose phase is shifted by 90 degrees by the phase shifter 904, and the output of the multiplier 901 and the multiplier 9
The output of 02 is combined by the combiner 905 and output to the transmitting antenna 706.

On the receiving side, the signal received by the receiving antenna 801 is appropriately filtered and amplified by the high frequency signal processing section 802, and is output as it is as a transmission frequency band signal or as an appropriate intermediate frequency band signal. It

This signal is input to the synchronizing circuit 803,
The synchronization circuit 803 uses the reference spreading code input from the code generator 804 to establish spread code synchronization and clock synchronization for the transmission signal, and outputs the code synchronization signal and clock signal to the spread code generator 804.

After the synchronization is established, the spread code generator 80
4 generates a spread code group in which the clock and the spread code phase match the spread code group on the transmission side. Of these code groups, the spread code PN ₀ dedicated to synchronization is the carrier recovery circuit 8
It is input to 05.

The carrier reproducing circuit 805 despreads the received signal converted into the transmission frequency band or the intermediate frequency band which is the output of the high frequency signal processing section 802 by the synchronization-dedicated spreading code PN ₀ , and uses it as a carrier for the synchronization code. Regenerate orthogonal carrier waves. As the carrier reproducing circuit 805, for example, a circuit obtained by adding a 90-degree phase shifter to the output of the circuit shown in FIG. 5 is configured.

The reproduced carrier wave is input to the baseband demodulation circuit 806. The baseband demodulation circuit 806 generates a baseband signal from the reproduced carrier wave and the output of the high frequency signal processing unit 802. This baseband signal is demodulated by the same signal processing as in the first embodiment, further converted into n pieces of parallel data by the parallel combination inverse mapping unit 807, and then converted into serial data by the parallel-serial converter 808. Converted and output.

[0057]

As described above, according to the present invention,
In a spread spectrum communication device using a parallel combination method, a carrier wave is regenerated based on a received signal and a reference code, the received signal is converted to a baseband signal based on the carrier wave, and the baseband signal and a plurality of reference codes are used. With the configuration to judge the received data by limiting the amplitude of the spread signal, it is possible to avoid the problem of linearity of the transmitting and receiving circuits, and it is possible to use a lot of digital processing for demodulating the received signal, which reduces the circuit scale. There is an effect that can be.

[Brief description of drawings]

FIG. 1 is a block diagram showing a transmitter according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a receiver in the first embodiment.

FIG. 3 is a block diagram showing a configuration of a conventional transmitter.

FIG. 4 is a block diagram showing a configuration of a conventional receiver.

FIG. 5 is a block diagram showing a carrier reproducing circuit in the first embodiment.

FIG. 6 is a block diagram showing a baseband demodulation circuit in the first embodiment.

FIG. 7 is a block diagram showing a configuration of a transmitter according to a second exemplary embodiment of the present invention.

FIG. 8 is a block diagram showing a receiver in the second embodiment.

FIG. 9 is a block diagram showing a high frequency stage in the second embodiment.

[Explanation of symbols]

 101 ... Serial-parallel converter, 102 ... Parallel combination mapping section, 103, 204 ... Spread code generator, 104 ... Adder, 105 ... High frequency stage, 106 ... Transmit antenna, 201 ... Receive antenna, 202 ... High frequency signal processing section, 203 ... Synchronous circuit, 205 ... Carrier reproducing circuit, 206 ... Baseband demodulating circuit, 207 ... Parallel combination inverse mapping section, 208 ... Parallel-serial converter.

Claims (4)

[Claims] 1. A serial / parallel conversion means for converting an input serial data string into parallel data of a predetermined number n of symbols, and k (k <n), which are driven by the same clock, have the same cycle, and have the same code phase. Of the k data code sequences by the spreading code generation means for generating one data code sequence and one or more synchronization code sequences and the parallel data sequence.
The parallel combination mapping means for selectively extracting (r <k) codes, the addition means for adding the r code sequences output from the parallel combination mapping means and the synchronization code sequence, and the addition means A conversion unit for converting the output to a predetermined frequency, a transmission unit having an antenna unit for transmitting the output of the conversion unit to a transmission path, and a carrier wave reproduction unit for reproducing a carrier wave based on a received signal and a reference code. A converting means for converting the received signal into a baseband signal based on the carrier wave reproduced by the carrier wave reproducing means; and a plurality of baseband signals converted by the converting means for judging based on a plurality of reference symbols. A spread spectrum communication device comprising: a determination unit; and a reception unit having a conversion unit for converting outputs of the plurality of determination units into n pieces of data. Place. 2. A serial-parallel conversion means for converting an input serial data string into parallel data of a predetermined number n of symbols, and k (k <n), which are driven by the same clock, have the same cycle, and have the same code phase. Of the k data code sequences by the spreading code generation means for generating one data code sequence and one or more synchronization code sequences and the parallel data sequence.
Parallel combination mapping means for selectively extracting (r <k) codes, addition means for adding r code sequences output from the parallel combination mapping means, output of the addition means, and the synchronization code. A transmitting unit having a converting unit for converting a series into a predetermined frequency by making them orthogonal to each other and an antenna unit for transmitting an output of the converting unit to a transmission line, and reproducing a carrier wave based on a received signal and a reference code. Carrier converting means for converting the received signal into a baseband signal based on the carrier reproduced by the carrier reproducing means, and the baseband signal converted by the converting means based on a plurality of reference symbols. A spectrum comprising a plurality of judging means for judging and a receiving section having a converting means for converting the outputs of the plurality of judging means into n pieces of data. Communication device. 3. The r (r <k) code sequences and the synchronization code sequences selectively extracted by parallel data of a predetermined number n (n> k) of the k data code sequences. Receiving means for receiving the spread signal, carrier wave reproducing means for reproducing a carrier wave based on the received signal and a reference code, and converting the received signal into a baseband signal based on the carrier wave reproduced by the carrier wave reproducing means A spread spectrum communication device, comprising: a conversion unit for converting the baseband signal converted by the conversion unit into n pieces of data based on a plurality of reference codes. 4. The r (r <k) code sequence and the synchronization code sequence selectively extracted by parallel data of a predetermined number n (n> k) of the k data code sequences. Receiving means for receiving the spread signal, generating means for generating a plurality of reference codes in synchronization with the synchronizing code sequence, and demodulating a received signal based on the plurality of reference codes to obtain n pieces of data. A spread spectrum communication device comprising: a conversion means for converting.