JPH08222731A - Electrostatic protective circuit - Google Patents

Abstract

PURPOSE: To make it possible to constitute an electrostatic protective circuit without breaking the protective circuit itself and utilizing the extra elements of a semiconductor integrated circuit chip of a master slice method by a method wherein the gate of the first transistor of the plurality of series-connected MOS transistors is put in a state that it is connected with a potential to obtain non- continuity. CONSTITUTION: In an electrostatic protective circuit, P-channel MOS transistors 13 and 14 are connected in series to each other between a power line 11 and a grounding line 12. A gate of the transistor 13 is connected with the line 11 and when the protective circuit is actually actuated, the transistor 13 is put in a non-continuity state. As a result, a current does never flow from the line 11 to the line 12 via the transistors 13 and 14. A parasitic diode 15 is connected between a source of the transistor 13 and the line 11, a parasitic diode 16 is connected between a drain of the transistor 13 and the line 11 and a parasitic diode 17 is connected between a drain of the transistor 14 and the line 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrostatic circuit for a power source of a semiconductor device, which can efficiently eliminate an electrostatic pulse intruding into a CMOS integrated circuit from the outside.

[0002]

2. Description of the Related Art As a static electricity protection circuit for a power supply of a CMOS integrated circuit, a circuit as shown in FIG. 3 has been proposed in Japanese Patent Laid-Open No. 60-10767. In FIG. 3, resistors R1 and R
No. 2 is a resistor having a low value that alleviates the impact of the electrostatic pulse but does not hinder the power supply current supply and does not form a junction with the substrate like polycrystalline silicon. To be done. Also, the transistors Q1, Q2, Q
Reference numerals 3 and Q4 are field transistors having a threshold value higher than the threshold value of a transistor of an internal circuit (not shown), for example, a threshold value of about 10V to 20V, which is used for eliminating an electrostatic pulse invading from the outside. is there.

In the electrostatic protection circuit of the conventional power supply shown in FIG.
Is, for example, V_CCThe positive static electricity entering from the
Without being relaxed by R1, V through Q1 and Q3_SSEscaped to the side
And V _CC-V_SSThe potential difference between the internal elements is suppressed.
It is possible to suppress the difference, and as a result, electrostatic stress
The internal circuit can be protected.

[0004]

In the above circuit, it is necessary to previously form a field transistor having a threshold value higher than that of the transistor in the internal circuit. For example, in the case of a master slice type integrated circuit in which a desired transistor is formed by forming a transistor as a master in advance and wiring it as needed, a field transistor having only a function as a protection circuit is specially formed. What must be done is disadvantageous because it increases the area. As mentioned in the above publication, the resistors R1 and R2 should not be provided for stable operation of the internal circuit.

The present invention has been made in view of the above problems, and is excellent in the electrostatic pulse withstand voltage in the case where the electrostatic pulse continuously invades for a predetermined time, and constitutes a circuit. In this case, when a master slice type semiconductor device is used, it is an object to obtain a flexible electrostatic protection circuit for a power supply which can be configured by using an extra element which is not used for normal use.

[0006]

An electrostatic protection circuit of the present invention that achieves the above object is a P-type or N-type identical type connected in series and arranged between power sources. And a plurality of MOS transistors
Of the S transistors, the gate and the source of the first MOS transistor arranged on the first potential side which becomes non-conductive when applied to the gate are connected to the first potential, and the plurality of MOS transistors are connected. Among them, the gate of the second MOS transistor connected to the second potential side different from the first potential is in a floating state.

[0007]

In the present invention, since the gate of the first transistor of the plurality of MOS transistors connected in series is in the state of being connected to the potential at which the first MOS transistor becomes non-conducting, It is possible to fabricate a protection circuit with a MOS transistor having a threshold voltage, and it is possible to configure it by using an extra element of a master slice type semiconductor integrated circuit chip.

[0008]

Embodiments of the present invention will be described below. FIG. 1 is a circuit diagram of a first embodiment of an electrostatic protection circuit for a power supply of the present invention. The electrostatic protection circuit of this embodiment is composed of a power supply line 11, a ground line 12, and p-type MOS transistors 13 and 14 connected in series between them. The gate of the p-type MOS transistor 13 is connected to the power supply line 11, and the p-type MOS transistor 13 is turned off during the actual operation.
Ground line 12 via OS transistors 13 and 14
No current flows through In addition, due to the physical properties of the MOS transistor, a parasitic diode 15 is formed between the source of the p-type MOS transistor 13 and the power supply line 11, and a p-type MO transistor.
A parasitic diode 16 is provided between the drain of the S transistor 13 (which is also the source of the p-type MOS transistor 14) and the power supply line 11, and a parasitic diode 16 is provided between the drain of the p-type MOS transistor 14 and the power supply line 11. 17 is connected.

First, a power supply line 1 is added to the electrostatic protection circuit.
A case where positive static electricity enters from 1 to the ground line 12 will be described. In this case, three current paths are possible. The first path is a path from the power supply line 11 to the ground line 12 through the parasitic diode 17, and the second path is a power path 11 to the ground line 12 through the parasitic diode 15 and the parasitic diode 17. The third path is a path from the power supply line 11
Type MOS transistor 13 gate, parasitic diode 1
6, a path passing through the parasitic diode 17.

Consider which path the charge takes.
Consider the potential difference between the power supply line 11 and the ground line 12 required to pass through the path. The breakdown voltage of the oxide film of the p-type MOS transistors 13 and 14 is Vox, the forward voltage of the parasitic diodes 15, 16 and 17 is Vd, and the breakdown voltage of the parasitic diodes 15, 16 and 17 is Vb.
And The potential difference required to pass the first path is Vb. The potential difference required to pass the second path is Vd + V
b. The potential difference required to pass the third path is Vo
x + Vd + Vb. Therefore, when positive static electricity enters the electrostatic protection circuit from the power supply line 11 toward the ground line 12, the path through which the charge passes is the first path from the power supply line 11 through the parasitic diode 17 to the ground line 12. Is the route. Since the reverse breakdown of the parasitic diode 17 is reversible, it will not be destroyed, and since it does not pass through the third path, the p-type MOS transistor 13 will not be destroyed.

Next, the power supply line 1 is connected to the electrostatic protection circuit.
A case where negative static electricity enters from 1 to the ground line 12 will be described. This case is equivalent to the case where positive static electricity enters from the ground line 12 toward the power supply line 11, and the parasitic diode 17 works in the forward direction,
It is possible to eliminate static electricity entering from the outside. With the above mechanism, this electrostatic protection circuit can protect the internal circuit (not shown) from static electricity.

FIG. 2 is a circuit diagram of a second embodiment of the electrostatic protection circuit for the power supply of the present invention. The electrostatic protection circuit according to the present embodiment includes a power supply line 11, a ground line 12, and an n-type MOS transistor 2 connected in series between them.
3 and 24. The gate of the n-type MOS transistor 24 is connected to the ground line 12, and the n-type MOS transistor 24 becomes non-conductive during actual operation.
No current flows through the ground line 12 via the line 4. Due to the physical properties of the MOS transistor, a parasitic diode 27 is provided between the source of the n-type MOS transistor 24 and the ground line 12, and a drain of the n-type MOS transistor 24 (which is also a source of the n-type MOS transistor 23). Parasitic diode 2 between ground line 12
6, the parasitic diode 25 is connected between the drain of the n-type MOS transistor 23 and the ground line 12.

First, the power supply line 1 is added to the electrostatic protection circuit.
A case where positive static electricity enters from 1 to the ground line 12 will be described. In this case, three current paths are possible. The first path is a path from the power supply line 11 to the ground line 12 through the parasitic diode 25, and the second path is a power path 11 to the ground line 12 through the parasitic diode 25 and the parasitic diode 27. The third path is a path that passes from the power supply line 11 to the parasitic diode 25, the parasitic diode 27, and the gate of the n-type MOS transistor 24. Considering which path the charge passes through in the same manner as in the first embodiment, the path through which the charge passes is the path from the power supply line 11 which is the first path to the ground line 12 through the parasitic diode 25. . Since the reverse breakdown of the parasitic diode 25 is reversible, it will not be destroyed, and since it does not pass through the third path, the n-type MOS transistor 24 will not be destroyed.

Next, the power supply line 1 is added to the electrostatic protection circuit.
A case where negative static electricity enters from 1 to the ground line 12 will be described. This case is equivalent to the case where positive static electricity enters from the ground line 12 toward the power supply line 11, and the parasitic diode 25 works in the forward direction,
It is possible to eliminate static electricity entering from the outside. With the above mechanism, this electrostatic protection circuit can protect the internal circuit (not shown) from static electricity.

In both of the above two embodiments, M
Although only the case where two OS transistors are connected in series has been described, three or more OS transistors may be connected in series. Further, it goes without saying that any of the MOS transistors connected in series may be composed of a plurality of MOS transistors connected in parallel.

[0016]

As described above, according to the electrostatic protection circuit of the present invention, since the diode parasitic on the MOS transistor is efficiently used to form the protection circuit, the protection circuit itself is not destroyed. In addition, when a master slice type semiconductor device is used in the case of forming a circuit, it is possible to use an extra element that is not provided for normal use.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an electrostatic protection circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of an electrostatic protection circuit according to a second embodiment of the present invention.

FIG. 3 is a circuit configuration diagram of a conventional protection circuit.

[Explanation of symbols]

 11 power line 12 ground line 13,14 p-type MOS transistor 15, 16, 17 parasitic diode 23, 24 n-type MOS transistor 25, 26, 27 parasitic diode

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H01L 29/866

Claims (1)

[Claims] 1. A plurality of MOS transistors of the same type of P-type and N-type, which are connected in series with each other and arranged between power supplies, are provided, and a gate of the plurality of MOS transistors is provided. The first potential arranged on the first potential side that becomes non-conductive when applied.
Of the second MOS transistor connected to the second potential side different from the first potential among the plurality of MOS transistors while the gate and the source of the MOS transistor are connected to the first potential. An electrostatic protection circuit whose gate is in a floating state.