JPH08222631A - Multilayer wiring formation method - Google Patents

Abstract

(57) [Abstract] [Purpose] Multilayer wiring that solves the problem of step difference during the formation of metal plugs by selective growth and flattens the interlayer insulating film to improve the coverage of the wiring in the upper layer and to obtain a highly reliable device. A forming method is provided. A step of forming an interlayer insulating film 102 on the lower wiring layer 101 and forming an opening 103 communicating with the lower wiring layer in the interlayer insulating film; and forming a metal material in the opening 103 by selective growth. A step of growing and forming a metal plug 106 in the opening; a step of performing a chemical mechanical polishing process on the upper surface of the interlayer insulating film 102 to planarize the surface; and a step of forming a metal plug 106 on the interlayer insulating film 102 in the opening. And a step of forming an upper wiring layer 108 connected to the metal plug 106.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a multi-layer wiring in a semiconductor device manufacturing process, and more particularly to a multi-layer wiring having a contact hole or a via hole connecting an upper layer wiring and a lower layer wiring to form a metal plug by selective growth The present invention relates to a forming method.

[0002]

2. Description of the Related Art As the density of semiconductor devices has increased, so has the density of wiring patterns, and the wiring formation technology is becoming more and more miniaturized and multilayered. The specific gravity is increasing.

In the case of forming such a multilayer wiring, for example, a first layer aluminum wiring pattern is formed via an electrode on an active element portion such as a transistor formed on a silicon substrate, and the first layer wiring is formed. A second-layer aluminum wiring pattern is formed on the inter-layer insulating film. The wiring patterns of the first layer and the second layer are formed by embedding a metal material in openings such as contact holes and via holes formed in the interlayer insulating film to form plugs, and electrically connect to each other through the metal plugs. Make it conductive. Further, in a multilayer wiring structure of three or more layers, a stack contact structure in which the positions of the upper and lower contact holes are aligned and the plug positions are overlapped is used in order to simplify the pattern and reduce the wiring resistance. .

[0004]

However, when the interlayer insulating film is formed on the lower layer wiring, a step is formed in the interlayer insulating film according to the shape of the lower layer wiring pattern. With the progress, it becomes large and steep, which is a cause of lowering the processing accuracy of the upper wiring pattern and the reliability of patterning. In particular, in the case of aluminum wiring, it is necessary to improve the flatness of the interlayer insulating film at present because it is not possible to greatly improve the coverage to cope with such a step. The need to improve the flatness is important from the viewpoint of a decrease in the depth of focus due to the shortening of the wavelength of lithography, and the problem of step difference is to manufacture a highly accurate, high quality, and highly reliable semiconductor device. It becomes an important problem to be solved.

Another problem is that it is difficult to form a highly reliable metal plug for a contact hole or a via hole which is miniaturized and has a large aspect ratio (that is, a vertically long contact hole). In this regard, various insulating film forming techniques, flattening techniques, and metal plug techniques have been developed so far. Among them, the metal plug technology has been particularly attracting attention as a key technology of the multilayer wiring technology as a technology for embedding a wiring material in a miniaturized contact hole or the like. As this metal plug technology, for example, blanket metal technology, selective growth metal technology, high temperature aluminum sputtering technology, aluminum reflow technology, etc. have been developed.

Among them, the blanket metal technique using tungsten (W) or the like is put to practical use in a mass production site as a stable technique although the process is somewhat complicated. In this blanket metal technology, a metal film such as a tungsten film is formed on the entire surface of an interlayer insulating film including a contact hole, and the metal film is etched back to leave a contact hole portion and a metal plug is formed in the contact hole. However, in this blanket metal technology, there is a problem called plug loss in which a recess is formed in the contact hole portion due to over-etching at the time of etch back and a step is formed.

A selective growth metal technique is used as a metal plug forming technique without such a plug loss. In this selective growth metal technology, metal grows on the insulating film in the opening formed in the interlayer insulating film on the lower wiring due to the difference in crystal growth rate between the metal wiring material and the metal plug metal material on the insulating film material. Before this, a metal plug is formed by growing metal only in the opening.

FIG. 5 shows a multilayer wiring forming process using such a selective growth technique. First, as shown in FIG. 5A, the opening 1 is formed in the interlayer insulating film 102 on the lower wiring 101.
03 is formed. Next, as shown in FIG. 5B, a metal material is grown in the opening 103 by selective growth to form a metal plug 106. At this time, if a metal material is formed on the interlayer insulating film 102, the function of the insulating film is impaired and the characteristics of the wiring are deteriorated.
The growth process must be stopped before the growth of the metal material on 02 and before the crystal growth of the metal in the opening 103 grows above the opening. Therefore, the recess 109 is inevitably formed on the upper surface of the metal plug 106, so that the step 107 is formed on the interlayer insulating film 102.

When the upper wiring 108 is formed on the interlayer insulating film 102 having the step 107, the recess 110 is formed in the upper wiring 108 where the step 107 is formed, as exaggeratedly shown in FIG. 5C. Is formed. Due to the recesses 110, the coverage of the upper layer wiring is deteriorated, causing problems such as an increase in wiring resistance and a decrease in connection reliability. Particularly, in the above-mentioned stack contact structure, since the contact hole portions are vertically overlapped with each other, the problem caused by the formation of the recess 110 becomes remarkable, and it is considered that the reliability of the device itself is greatly affected.

The present invention has been made in view of the above-mentioned problems of the prior art, and solves the problem of the step formed on the upper surface of the opening at the time of forming the metal plug by selective growth and flattens the interlayer insulating film. An object of the present invention is to provide a method for forming a multi-layer wiring, which can improve the coverage of the upper layer wiring and obtain a highly reliable device.

[0011]

In order to achieve the above object, in the present invention, an interlayer insulating film is formed on a lower wiring layer, and an opening communicating with the lower wiring layer is formed in the interlayer insulating film. A step of growing a metal material in the opening by selective growth to form a metal plug in the opening; a step of performing chemical mechanical polishing on the upper surface of the interlayer insulating film to flatten the surface; A step of forming an upper wiring layer connected to the metal plug in the opening on the interlayer insulating film; and providing a multilayer wiring forming method.

In a preferred embodiment, the metal film material is tungsten, molybdenum, aluminum, titanium, an alloy thereof, or a silicide thereof.

[0013]

Function: An opening to be a via hole (or a contact hole) is formed in the interlayer insulating film formed on the lower wiring, and a metal plug is formed in this opening by selective growth. At this time, a step is formed on the upper surface of the opening. This step is eliminated by performing chemical mechanical polishing (CMP) after forming the metal plug, and the upper surface of the interlayer insulating film is flattened.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a flow chart of a method of forming a multi-layer wiring according to an embodiment of the present invention, and FIG. First, a first layer (lower layer), for example, an aluminum wiring 101 is formed on a substrate (not shown).
Are patterned (step S1). Next, an interlayer insulating film 102 made of an insulating material such as silicon oxide is formed on the lower wiring 101 by CVD or the like (step S2). Then, in step S3, an opening 103 to be a contact hole is patterned in the interlayer insulating film 102.

Next, tungsten is grown in the opening 103 by selective growth using, for example, a known silane reduction method or the like to form a metal plug 106 (step S4).
At this time, the metal growth process is stopped below the thickness of the interlayer insulating film so that the metal growth does not exceed the upper surface of the interlayer insulating film 102. Therefore, as shown in FIG. A recess 109 is formed in the
A step 107 of about 0 nm is formed.

An example of specific conditions for selective growth is as follows.

Gas flow rate: WF6 / SiH4 / H2 = 10/7 /
1000 sccm Temperature: 250 ° C. Pressure: 27 Pa The metal plug 106 is not limited to tungsten, but molybdenum (Mo), aluminum (Al), aluminum alloy, titanium (Ti), or their silicides can be used.

An example of conditions for selective growth when the metal plug 106 is formed of aluminum instead of tungsten is as follows. The selective growth in this case is performed by a known hydrogen reduction method, and DMAH (dimethylaluminum hydride) can be used as an aluminum source.

Gas flow rate: AlH (CH3) 2 / H2 = 10/10
00 sccm Temperature: 270 ° C. Pressure: 160 Pa Under these conditions, the aluminum plug 106 is formed in the opening 103 of the interlayer insulating film 102. At this time, as in the case of tungsten, the metal plug 106
The depression 1 having a step 107 of, for example, 200 nm on the upper surface of the
The growth of the metal is stopped below the film thickness of the interlayer insulating film 102 so that 09 is formed to prevent the selectivity from being broken.

Next, in step S5, the step 1
In order to eliminate 07, a chemical mechanical polishing process is performed on the upper surface of the interlayer insulating film 102. As a result, the upper surface of the interlayer insulating film 102 is flattened as shown in FIG.

FIG. 4 shows the basic structure of the polishing apparatus used for this chemical mechanical polishing process. The wafer 5 to be polished is set on the carrier 6 and fixed by mechanical chucking means (not shown). The wafer 5 set on the carrier 6 is arranged so as to face the pad (polishing cloth) 9 on the upper surface of the polishing plate 3. Slurry tank 10 on pad 9
The slurry 2 is supplied from here as indicated by arrow A. Although the slurry 2 is schematically shown, it is made by suspending a suitable polishing powder in a liquid.

When performing the polishing treatment, while the slurry 2 is being supplied onto the pad 9 as indicated by arrow A, the polishing plate 3 is rotated as indicated by arrow 4 and the carrier 6 is indicated by arrow 7 in FIG.
While rotating as described above, the wafer 5 set on the carrier is pressed against the pad 9 with a predetermined pressing force as shown by an arrow 8 to polish the wafer surface. By adjusting the number of rotations of the polishing plate 3 and the number of rotations of the carrier 6 and the pressing force, polishing is performed under optimum or desired polishing conditions corresponding to the wafer 5.

In this way, as shown in FIG. 3, the wiring 108 of the second layer (upper layer) is formed on the interlayer insulating film 102 whose surface is flattened by the chemical mechanical polishing treatment (step of FIG. 1). S6). In this case, the step 107 in FIG.
Has disappeared due to the polishing process.
Has good coverage, and a highly reliable upper layer wiring is formed.

Specific polishing processing conditions actually performed according to the process of the above embodiment are shown below.
The slurry is KO for polishing in a basic atmosphere.
A suspension of H / water / alcohol was used.

Polishing plate rotation speed: 50 rpm Carrier rotation speed: 17 rpm Polishing pressure: 8 psi Polishing pad temperature: 30 to 40 ° C. Slurry flow rate: 225 ml / min Chemical mechanical polishing is performed under such polishing conditions, and the metal plug and the interlayer are processed. By polishing the upper surface of the insulating film, a flat insulating film surface without steps was obtained.

Regarding the chemical mechanical polishing treatment, the adhesion layer may be performed in an acidic atmosphere and the interlayer insulating film may be performed in a basic atmosphere. In addition, as a specific method of each step in the above-mentioned flow, a known lithography technique or C
Techniques such as VD, sputtering and RIE can be used as appropriate.

[0027]

As described above, in the present invention, the step that is inevitably formed when the metal plug is formed by the selective growth is removed by the chemical mechanical polishing process, so that the interlayer insulating film is uniformly formed. A flat surface is formed. Therefore, the coverage of the upper layer wiring is improved, a stable and highly reliable wiring structure is obtained, and a high-quality and highly reliable semiconductor device is obtained. Especially when applied to the multilayer wiring structure of the stack contact structure, a remarkable effect can be obtained because step formation is prevented at each contact hole portion.

[Brief description of drawings]

1 is a flow chart of the method of the present invention.

FIG. 2 is a cross-sectional view of a main part of a laminated structure showing different steps of a method for forming a multilayer wiring according to an example of the present invention.

FIG. 3 is a sectional view of an essential part of a multilayer wiring structure formed by the method of the present invention.

FIG. 4 is a main part configuration diagram of a chemical mechanical polishing apparatus for carrying out the method of the present invention.

FIG. 5 is a cross-sectional view of a main part of a laminated structure showing, in order, each step of a conventional method for forming a multilayer wiring.

[Explanation of symbols]

101: Lower layer wiring, 102: Interlayer insulating film, 103:
Opening, 106: Metal plug, 107: Step,
108: upper layer wiring, 109: concave portion.

Claims (2)

[Claims] 1. A step of forming an interlayer insulating film on a lower wiring layer and forming an opening communicating with the lower wiring layer in the interlayer insulating film; growing a metal material by selective growth in the opening. A step of forming a metal plug in the opening; a step of performing chemical mechanical polishing from the upper surface of the interlayer insulating film to planarize the surface; an upper layer connected to the metal plug in the opening on the interlayer insulating film And a step of forming a wiring layer; 2. The method for forming a multilayer wiring according to claim 1, wherein the metal film material is tungsten, molybdenum, aluminum, titanium, an alloy thereof, or a silicide thereof.