JPH0821962B2 - Carrier tracking circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a carrier tracking circuit for obtaining a reference signal for synchronous detection corresponding to an input signal of each channel from a time division multiplexed signal.

[Technical background of the invention and its problems] TDMA (Time Division Multiple Access) often used in satellite communication, etc.
In the communication system, signals are sent in bursts from multiple transmitting stations, and time-division multiplexed incoming TDMA signals are synchronously detected at the receiving station using the same demodulator. For synchronous detection of time division multiplexed signals, it is necessary to create a reference signal corresponding to each channel signal. Conventionally, many methods such as baseband processing, inverse modulation, remodulation, and multiplication have been adopted for a carrier tracking circuit for creating this reference signal. Both of these are
The reference signal is obtained by removing the information contained therein and extracting the frequency and phase of the carrier contained in the modulated signal through an equivalently high Q tuning circuit or phase locked loop.

In the TDMA system, the carrier frequency and phase are generally different for each burst of each channel. Therefore, difference frequency information between the burst signal of the previous channel and the corresponding reference signal remains in the carrier tracking circuit immediately after the channel switching. However, unlike the phase information, the frequency information cannot be instantaneously obtained, and cannot be obtained without referring to a sufficiently long input signal. Therefore, after the burst signal of the next channel is input, a very long transition time is required until the new reference signal is synchronized with the burst signal.
Therefore, a very long preamble for carrier tracking has to be inserted at the beginning of each burst signal, which causes a problem that the transmission efficiency is lowered.

[Object of the Invention] The present invention has been made in view of the above problems, and an object thereof is to be able to synchronize with an input signal in an extremely short time after channel switching of a time division multiplexed signal. It is to provide a carrier tracking circuit capable of improving the transmission efficiency.

According to the present invention, difference frequency information between an input signal of each channel of a time division multiplexed signal and a reference signal corresponding to these input signals is stored independently for each channel and selected at the time of channel switching. The difference frequency information corresponding to the selected channel is selectively taken out, and this information is combined with the phase error signal, and further combined with a constant corresponding to the specified value of the frequency of the input signal of the selected channel, which is obtained. It is characterized in that the phase of the reference signal is controlled using the phase signal obtained by cumulatively adding the combined signal.

That is, the carrier tracking circuit according to the present invention comprises phase comparison means for comparing the phase of an input signal of each channel of a time division multiplexed signal with the phase of a reference signal corresponding to these, and a phase comparison means for generating a phase error signal between the two signals. Storage means for storing, for each channel, difference frequency information between the input signal of each channel and the corresponding reference signal, and difference frequency information corresponding to the channel of the incoming input signal in the time division multiplexed signal from this storage means , A first combining means for combining the difference frequency information extracted by this means and the phase error signal, a combined signal obtained by the first combining means and the incoming input. Second synthesis means for synthesizing a constant corresponding to the specified value of the frequency of the signal, and a position for generating a phase signal by cumulatively adding the synthesized signals obtained by the second synthesis means. It is characterized by comprising signal generating means and sine wave / cosine wave generating means for generating, as the reference signal, a sine wave and a cosine wave having a phase given by the phase signal generated from the phase signal generating means. .

EFFECTS OF THE INVENTION According to the present invention, the difference frequency information between the input signal and the reference signal is stored for each channel, and the difference frequency information of the corresponding channel is selectively extracted to perform the carrier tracking operation. Therefore, when focusing on the same channel, the difference frequency information has a value that continuously changes. Therefore, immediately after the channel switching, the frequency of the reference signal is instantly determined and quickly synchronized with the input signal. As a result, the length of the preamble inserted at the beginning of the burst signal can be shortened, and the transmission efficiency can be greatly improved.

Embodiments of the Invention Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows the present invention as a baseband processing type digital
It is a figure which shows the example applied to the carrier tracking circuit. This carrier tracking circuit includes a phase comparison means 1, a loop filter 2, a signal generation circuit 3 and a sine wave
The cosine wave conversion circuit 4 is connected so as to form a feedback loop.

The phase comparison circuit 1 receives an input signal Si obtained by time-division-multiplexing burst signals of each channel and a reference signal Sr from the sine wave / cosine wave conversion circuit 4, and inputs both signals Si, S.
Compare the phase difference of r. Then, the phase comparison circuit 1 outputs the demodulation signal So, removes the modulation signal component from the input signal Si, detects the phase difference between the modulation carrier and the reference signal Sr, and outputs the phase error signal e _o .

The loop filter 2 smoothes the error signal e _o . That is, the error signal e _o is introduced to one input of the synthesizing circuit 11 via the coefficient circuit 10 and to one input of the synthesizing circuit 13 via the coefficient circuit 12. The output of the synthesis circuit 13 is stored in the storage circuit 14 via the switching circuit 15 as the difference frequency information between the input signal Si and the reference signal Sr. Memory circuit 14
Is a switching circuit 15,1 that is switched by a control signal Sc from the outside.
Depending on 6, the storage area MA, MB, ... Mi corresponding to each channel
Is selected. The information stored in the selected storage area is fed back to the synthesizing circuit 13 and guided to the other input of the synthesizing circuit 11.

The signal generation circuit 3 generates a phase signal Sp that gives the phase of the reference signal Sr based on the error signal e _o ′ smoothed by the loop filter 2. That is, the error signal e _o ′ is
By 18 it is combined with the constant Sf corresponding to the frequency (specified value) of the input signal of each channel. The output of the synthesizing circuit 18 is introduced to one input of the synthesizing circuit 19. The output of the synthesis circuit 19 is stored in the output phase memory 20. The output of the output phase memory 20 is fed back to the other input of the synthesizing circuit 19 and given to the sine wave / cosine wave converting circuit 4 as a phase signal Sp. That is, the error signal e _o ′ is cumulatively added in the phase signal generation circuit 3, so that the phase signal Sp
Is generated.

The sine wave / cosine wave conversion circuit 4 is composed of, for example, a ROM table, and generates a sine wave and a cosine wave having a phase given by the input phase signal Sp as the reference signal Sr. Note that Sf can be configured to be zero in FIG. 1, and in this case, the synthesis circuit 18 becomes unnecessary.

As shown in FIG. 2, the carrier tracking circuit according to the present embodiment having such a configuration selects the storage area MA of the storage circuit 14 and selects the burst of the channel B during the period of receiving the burst of the channel A, for example. Same MB during receiving period
Is selected, and the MC is selected while the burst of channel C is being received. Then, the difference frequency information of each channel stored in these storage areas MA, MB, MC is
The input time division signal is selectively extracted corresponding to the incoming channel. In this case, since the time for one frame (the interval at which signals of the same channel arrive) is generally defined, the one-frame period is known by, for example, an internal clock or the like, and the difference frequency information is switched during the period when the burst signal does not exist. You can do it like this.

The difference frequency information extracted in this way is a value that fluctuates quite continuously when attention is paid only to the same channel. Therefore, at the time of channel switching, it is possible to quickly establish synchronization as if the continuous operation was started from the previous frame. Therefore, the time required for the tracking is significantly reduced as compared with the conventional case, so that the preamble length can be shortened and the transmission efficiency can be improved.

FIG. 3 is a diagram showing an embodiment in which the present invention is applied to an inverse modulation type. The input signal Si is the phase comparison circuit 21 and the inverse modulation circuit 22.
Is input to The reference signal Sr from the sine wave / cosine wave conversion circuit 23 is also input to the phase comparison circuit 21, and demodulation data So is output based on the reference signal Sr and the input signal Si. The demodulated data So is input to the inverse modulation circuit 22 via the identification circuit 24 and is used for inverse modulation of the input signal Si. The modulation component is removed by this inverse modulation and the unmodulated signal Sn is disturbed by noise.
Is input to the phase comparison circuit 25 together with the reference signal Sr. The phase comparison circuit 25 generates and outputs the phase error signal e _o . This phase error signal e _o is smoothed by the loop filter 26,
The waveform is converted via the signal generation circuit 27 and the sine wave / cosine wave conversion circuit 23 to become the reference signal Sr.

A storage circuit having a storage area corresponding to each channel is provided in the loop filter 26 as in the above embodiment, and the storage area is switched for each channel by an external control signal Sc.

Also in this embodiment, the same effect as in the previous embodiment can be obtained.

FIG. 4 is a diagram showing an embodiment in which the present invention is applied to a remodulation type. The input signal Si is input to the phase comparison circuits 31 and 32. The reference signal Sr from the sine wave / cosine wave conversion circuit 33 is also input to the phase comparison circuit 32, and the reference signal Sr and the input signal Si are input.
Based on and, demodulated data So is output. This demodulated data
So is re-modulation circuit 35 together with reference signal Sr via identification circuit 34.
Is input to The re-modulation signal Si ′ from the re-modulation circuit 35 and the input signal Si are compared in phase by the phase comparison circuit 31. The phase comparison circuit 31 outputs the phase error signal e _o from which the modulation component is removed based on the phase comparison between the modulation signals. Thereafter, the sine wave / cosine wave conversion circuit 33 performs waveform conversion via the loop filter 36 and the signal generation circuit 37 to generate the reference signal Sr. Also in this embodiment, the same effect as above can be obtained by configuring the loop filter 36 in the same manner as described above.

FIG. 5 is a diagram showing an embodiment in which the present invention is applied to an inverse modulation tank system. The input signal Si is input to the phase comparison circuit 41 and the inverse modulation circuit 42. The reference signal Sr from the tank circuit 43 is also input to the phase comparison circuit 41, and demodulation data So is output based on the reference signal Sr and the input signal Si. The demodulated data So is input to the inverse modulation circuit 42 via the identification circuit 44. The inverse modulation circuit 42 inversely modulates the input signal Si to remove the modulation component and outputs the unmodulated signal Sn disturbed by noise. This unmodulated signal Sn is sent to the phase comparison circuit 45 as a reference signal Sr.
Is input together with. Phase error signal from the phase comparison circuit 45
e _o is output. The signal e _o controls the tuning frequency of the tank limiter circuit 43 that removes the noise component of the non-converted signal Sn through the loop filter 46, and generates the reference signal Sr.

The tank circuit 43 can be constituted by a second-order feedback type digital filter as shown in FIG. 6, for example. In addition, 50,5 in the figure
1 is a synthesis circuit, 52 and 53 are word memories, 54 and 55 are variable coefficient multiplication circuits, e _o ′ is a control signal of the loop filter output, 56
Respectively show filter coefficient banks for determining the tuning frequency of the tank. Further, the same configuration as the above can be applied to the loop filter 46, as in the above embodiment.

FIG. 7 is a diagram showing an embodiment in which the present invention is applied to a multiplication system. The input signal Sr consisting of the N-phase PSK signal is multiplied by N in the frequency multiplication circuit 60 to remove the modulation component, and the mixer 61
In the signal generation circuit 62 consisting of a variable frequency oscillator
Is mixed with the unmodulated tone signal S _T output from and mixed down. The output signal Sm of the mixer 61 is the tank circuit
The noise component is removed at 63, the frequency is divided by 1 / N at the frequency dividing circuit 64, and then mixed up at the mixer 65. As a result, the mixer 65 outputs the reference signal Sr for synchronous detection. Further, the input / output signals of the tank circuit 63 are compared in phase by the phase comparison circuit 66. The phase error signal e _o output from the phase comparison circuit 66 controls the signal generation circuit 62 via the loop filter 67. Also in this embodiment, the loop filter 67 has the same structure as that of the first to third embodiments.

As described above, the present invention can be applied to various types of carrier tracking circuits. Further, the present invention is not limited to a digital circuit, and part or all of the present invention can be configured by an analog circuit.

[Brief description of drawings]

FIG. 1 is a block diagram showing a baseband processing type carrier tracking circuit according to an embodiment of the present invention, FIG. 2 is a diagram for explaining the operation of the circuit, and FIGS. 3 to 5 are the present invention. 6 is a block diagram showing a carrier tracking circuit according to another embodiment of the present invention, FIG. 6 is a block diagram showing an example of the configuration of the tank circuit in FIG. 5, and FIG. 7 is a carrier according to still another embodiment of the present invention. It is a block diagram which shows a tracking circuit. 1,21,25,31,32,41,45,66 ... Phase comparison circuit, 2,26,36,46,6
7 ... Loop filter, 3,27,37,62 ... Signal generation circuit, 4,23,
33 ... Signal generating circuit, 10,12 ... Coefficient circuit, 11,13 ... Combining circuit, 14 ... Memory circuit, 15,16 ... Switching circuit.

Front page continuation (72) Inventor Hidehiro Takahashi 1 Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi, Kanagawa Higashi Koshibaura Electric Co., Ltd. (56) References Japanese Patent Publication No. 48-7209 (JP, B1) Showa 58 Proceedings of the Annual Conference of IEICE General Conference, [Volume 8], p. 8-136, Paper No. 2156, "128Kbps Digital Phase Tracking Circuit", Takahashi et al.

Claims (1)

[Claims] 1. A phase comparing means for comparing the phases of an input signal of each channel of a time division multiplexed signal and a reference signal corresponding to these to generate a phase error signal between both signals, and an input signal of each channel. Storage means for storing, for each channel, difference frequency information from the corresponding reference signal, and means for selectively extracting from the storage means the difference frequency information corresponding to the channel of the incoming input signal in the time division multiplexed signal. A first synthesizing means for synthesizing the difference frequency information extracted by this means and the phase error signal; and a prescribed value of the frequency of the synthesized signal obtained by the first synthesizing means and the incoming input signal. A second synthesizing means for synthesizing a constant corresponding to, a phase signal generating means for cumulatively adding the synthesized signals obtained by the second synthesizing means to generate a phase signal, and the phase signal generating means. Carrier tracking circuit, characterized by comprising a sine wave, cosine wave generating means for generating a sine wave and cosine wave as the reference signal having a phase given by the phase signal generated from the stage.