JPH08181144A - Mounting of semiconductor device - Google Patents
Mounting of semiconductor deviceInfo
- Publication number
- JPH08181144A JPH08181144A JP6322032A JP32203294A JPH08181144A JP H08181144 A JPH08181144 A JP H08181144A JP 6322032 A JP6322032 A JP 6322032A JP 32203294 A JP32203294 A JP 32203294A JP H08181144 A JPH08181144 A JP H08181144A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- electrodes
- electrode
- circuit board
- protruding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、各種電子機器の製造工
程において、半導体装置の電極を、回路基板上の電極に
電気的に接続する半導体装置の実装方法に関するもので
ある。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device mounting method for electrically connecting electrodes of a semiconductor device to electrodes on a circuit board in a manufacturing process of various electronic devices.
【０００２】[0002]
【従来の技術】各種電子機器の製造工程において、半導
体装置の複数電極を、回路基板上の複数の電極に電気的
に一括して接続する半導体装置の実装方法の従来例を、
図８〜図１１に基づいて説明する。2. Description of the Related Art In a manufacturing process of various electronic devices, a conventional example of a semiconductor device mounting method for electrically connecting a plurality of electrodes of a semiconductor device to a plurality of electrodes on a circuit board all at once,
A description will be given based on FIGS. 8 to 11.
【０００３】図８に示すように、半導体装置１の各電極
２上に、金ワイヤ、半田ワイヤ等で、ボールボンディン
グ法を使用して突起電極３を形成する。この場合、形成
された突起電極３は、これらの高さを揃えることは困難
で、高さの不揃いは避けられない。As shown in FIG. 8, a bump electrode 3 is formed on each electrode 2 of the semiconductor device 1 by a ball bonding method using a gold wire, a solder wire or the like. In this case, it is difficult for the formed protruding electrodes 3 to have the same height, and uneven heights cannot be avoided.
【０００４】図９に示すように、実装前に、前記の突起
電極３の高さの不揃いを修正するために、加圧ノズル５
を使用して加圧し、半導体装置１の複数の突起電極３
を、平坦面４の上に押し付けて、突起電極３の先端を変
形させ、複数の突起電極３の高さを揃えて平坦化させ
る。As shown in FIG. 9, before mounting, in order to correct the uneven height of the protruding electrodes 3, the pressure nozzle 5 is used.
Is used to apply pressure to the plurality of protruding electrodes 3 of the semiconductor device 1.
Are pressed against the flat surface 4 to deform the tips of the protruding electrodes 3 to make the heights of the plurality of protruding electrodes 3 uniform and flat.
【０００５】図１０に示すように、導電性接着剤７が規
定厚さに塗られた転写用平坦面６上に、半導体装置１の
平坦化した複数の突起電極３の先端を合わせて、導電性
接着剤７を、前記複数の突起電極３の先端に転写する。As shown in FIG. 10, the tips of a plurality of flattened protruding electrodes 3 of the semiconductor device 1 are aligned on a transfer flat surface 6 coated with a conductive adhesive 7 to a prescribed thickness, and the conductive adhesive 7 is electrically conductive. The adhesive 7 is transferred to the tips of the plurality of protruding electrodes 3.
【０００６】図１１に示すように、回路基板８の複数の
電極９の上に、前記の導電性接着剤７を転写した複数の
突起電極３の先端を位置決めして実装する。As shown in FIG. 11, the tips of the plurality of protruding electrodes 3 to which the conductive adhesive 7 is transferred are positioned and mounted on the plurality of electrodes 9 of the circuit board 8.
【０００７】[0007]
【発明が解決しようとする課題】しかし、上記の従来例
の構成では、突起電極３の高さの不揃いを修正するため
に、突起電極３の高さを平坦化しており、且つ、突起電
極３の先端での転写後の導電性接着剤７の厚みが１０μ
ｍ程度であるので、この１０μｍ程度の転写後の導電性
接着剤７の厚みによって、実装すべき回路基板８の電極
９の厚みのバラツキを吸収しなければならず、１０μｍ
以上の反りがある回路基板や、基板電極の厚みのバラツ
キが１０μｍ以上ある回路基板には、実装できないとい
う問題点がある。However, in the structure of the above-mentioned conventional example, the height of the protruding electrode 3 is flattened in order to correct the unevenness of the height of the protruding electrode 3, and the protruding electrode 3 is also formed. The thickness of the conductive adhesive 7 after transfer at the tip of the
Since the thickness of the conductive adhesive 7 after transfer is about 10 μm, variations in the thickness of the electrodes 9 of the circuit board 8 to be mounted must be absorbed.
There is a problem that it cannot be mounted on a circuit board having the above warpage or a circuit board having a variation in the thickness of the board electrodes of 10 μm or more.
【０００８】又、図１１に示すように、半導体装置１の
突起電極３の先端と、回路基板８の電極９との距離がば
らつくので、接合強度が不足することや、接続抵抗値
が、例えば、標準値である３０ｍΩ／バンプのものもあ
れば、１００ｍΩ／バンプになるものもあるというよう
にバラツクという問題点がある。Further, as shown in FIG. 11, since the distance between the tip of the protruding electrode 3 of the semiconductor device 1 and the electrode 9 of the circuit board 8 varies, the joint strength is insufficient and the connection resistance value is, for example, The standard value is 30 mΩ / bump, and the standard value is 100 mΩ / bump.
【０００９】本発明は、上記の問題点を解決し、半導体
装置の複数の突起電極を、回路基板上の複数の電極に、
信頼性良く、一括接続する半導体装置の実装方法に関す
るものである。The present invention solves the above-mentioned problems and allows a plurality of protruding electrodes of a semiconductor device to be provided on a plurality of electrodes on a circuit board.
The present invention relates to a method of mounting a semiconductor device that is reliable and collectively connected.
【００１０】[0010]
【課題を解決するための手段】本願第１発明の半導体装
置の実装方法は、上記の課題を解決するために、半導体
装置の各電極に突起電極を設け、これらの突起電極を、
電気回路が形成された回路基板の各電極に接続する半導
体装置の実装方法において、半導体装置の電極上に突起
電極を形成した後、この半導体装置の前記突起電極を実
装すべき回路基板の対応する電極上に位置決めし、加圧
して、前記半導体装置の各突起電極の先端の形状を変形
し、前記各突起電極の高さを、前記回路基板の各電極の
高さの実態に整合させることを特徴とする。In order to solve the above-mentioned problems, a semiconductor device mounting method according to the first invention of the present application provides projecting electrodes on each electrode of a semiconductor device, and these projecting electrodes are
In a method of mounting a semiconductor device, which is connected to each electrode of a circuit board on which an electric circuit is formed, after forming a protruding electrode on the electrode of the semiconductor device, the corresponding protruding electrode of the semiconductor device is to be mounted on the circuit board. Positioning on the electrode and applying pressure to deform the shape of the tip of each protruding electrode of the semiconductor device, and match the height of each protruding electrode with the actual state of the height of each electrode of the circuit board. Characterize.
【００１１】本願第２発明の半導体装置の実装方法は、
上記の課題を解決するために、本願第１発明において、
加圧に加熱を伴わせることを特徴とする。A method of mounting a semiconductor device according to the second invention of the present application is
In order to solve the above problems, in the first invention of the present application,
It is characterized in that pressurization is accompanied by heating.
【００１２】本願第３発明の半導体装置の実装方法は、
上記の課題を解決するために、本願第１、第２発明にお
いて、半導体装置の各突起電極の高さを、回路基板の各
電極の高さの実態に整合させた後、平坦面上に塗工され
た導電性接着剤、又は、クリーム半田の面に、前記半導
体装置の各突起電極を合わせて、前記半導体装置の各突
起電極に前記導電性接着剤、又は、クリーム半田を転写
し、前記導電性接着剤、又は、クリーム半田を転写した
前記半導体装置の各突起電極を、実装すべき回路基板の
各電極に位置決めし、実装することを特徴とする。A method of mounting a semiconductor device according to the third invention of the present application is
In order to solve the above-mentioned problems, in the first and second inventions of the present application, the height of each protruding electrode of the semiconductor device is matched with the actual state of the height of each electrode of the circuit board, and then applied on a flat surface. Aligned each protruding electrode of the semiconductor device on the surface of the manufactured conductive adhesive or cream solder, transfer the conductive adhesive or cream solder to each protruding electrode of the semiconductor device, It is characterized in that the protruding electrodes of the semiconductor device to which the conductive adhesive or the cream solder is transferred are positioned and mounted on the electrodes of the circuit board to be mounted.
【００１３】[0013]
【作用】本願第１発明の半導体装置の実装方法は、半導
体装置の各電極に突起電極を設け、これらの突起電極
を、電気回路が形成された回路基板の各電極に接続する
半導体装置の実装方法において、半導体装置の電極上に
突起電極を形成した後、この半導体装置の前記突起電極
を実装すべき回路基板の対応する電極上に位置決めし、
加圧して、前記半導体装置の各突起電極の先端の形状を
変形し、前記各突起電極の高さを、前記回路基板の各電
極の高さの実態に整合させるので、回路基板の各電極の
厚みにバラツキがあっても、回路基板に反りや、うねり
があっても、極めて安定して正確に、半導体装置の各突
起電極の高さを、前記回路基板の各電極の高さの実態に
整合させることができる。According to the method for mounting a semiconductor device of the first invention of the present application, the semiconductor device is mounted by providing projecting electrodes on each electrode of the semiconductor device and connecting the projecting electrodes to each electrode of a circuit board on which an electric circuit is formed. In the method, after forming a protruding electrode on an electrode of a semiconductor device, positioning the protruding electrode of the semiconductor device on a corresponding electrode of a circuit board to be mounted,
By applying pressure, the shape of the tip of each protruding electrode of the semiconductor device is deformed, and the height of each protruding electrode is matched with the actual state of the height of each electrode of the circuit board. Even if there are variations in thickness, warpage or undulations in the circuit board, the height of each protruding electrode of the semiconductor device can be accurately and accurately determined by the actual height of each electrode of the circuit board. Can be matched.
【００１４】本願第２発明の半導体装置の実装方法は、
加圧に加熱を伴わせることにより、本願第１方法に比較
して、加圧力が小さくて済み、且つ、加圧時間を短縮で
きる。A method of mounting a semiconductor device according to the second invention of the present application,
By applying the heating with the pressurization, compared with the first method of the present application, the applied pressure can be small and the pressurization time can be shortened.
【００１５】本願第３発明の半導体装置の実装方法は、
半導体装置の各突起電極の高さを、回路基板の各電極の
高さの実態に整合させた後、平坦面上に塗工された導電
性接着剤、又は、クリーム半田の面に、前記半導体装置
の各突起電極を合わせて、前記半導体装置の各突起電極
に前記導電性接着剤、又は、クリーム半田を転写し、前
記導電性接着剤、又は、クリーム半田を転写した前記半
導体装置の各突起電極を、実装すべき回路基板の各電極
に位置決めし、実装するので、本願第１、第２発明の作
用に加えて、半導体装置の各突起電極と回路基板の各電
極間の接続のオープン不良がなくなり、接続強度が向上
し、接続抵抗値が２０〜３０ｍΩに安定し、極めて安定
した、信頼性が高い半導体装置の実装が可能になる。A method of mounting a semiconductor device according to the third invention of the present application is
After adjusting the height of each protruding electrode of the semiconductor device to the actual height of each electrode of the circuit board, a conductive adhesive applied on a flat surface or a surface of cream solder, the semiconductor Each projection electrode of the device is combined with each other, and the conductive adhesive or cream solder is transferred to each projection electrode of the semiconductor device, and the conductive adhesive or cream solder is transferred to each projection of the semiconductor device. Since the electrodes are positioned and mounted on the respective electrodes of the circuit board to be mounted, in addition to the effects of the first and second inventions of the present application, there is an open defect in the connection between each protruding electrode of the semiconductor device and each electrode of the circuit board. Is eliminated, the connection strength is improved, the connection resistance value is stabilized at 20 to 30 mΩ, and it is possible to mount an extremely stable and highly reliable semiconductor device.
【００１６】[0016]
【実施例】本発明の第１実施例を図１〜図４に基づいて
説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described with reference to FIGS.
【００１７】図１に示すように、半導体装置１の各電極
２上に、金ワイヤ、半田ワイヤ等で、ボールボンディン
グ法を使用して突起電極３を形成する。この場合、形成
された突起電極３は、これらの高さを揃えることは困難
で、高さの不揃いは避けられない。As shown in FIG. 1, a bump electrode 3 is formed on each electrode 2 of the semiconductor device 1 by a ball bonding method using a gold wire, a solder wire or the like. In this case, it is difficult for the formed protruding electrodes 3 to have the same height, and uneven heights cannot be avoided.
【００１８】図２に示すように、半導体装置１を実装す
べき回路基板８の複数の電極９の厚みが不揃いであるこ
とがある。このような回路基板８の電極９の厚みの不揃
いや、回路基板８の反りやうねりによって、前記回路基
板８の電極９の高さに不揃いがあっても、半導体装置１
の突起電極３の先端を変形させて、半導体装置１の突起
電極３の先端の高さを、回路基板８の電極９の高さの不
揃いに整合させれば、信頼性良く電極間の接続ができ
る。As shown in FIG. 2, the electrodes 9 on the circuit board 8 on which the semiconductor device 1 is to be mounted may have uneven thicknesses. Even if the height of the electrodes 9 of the circuit board 8 is uneven due to the uneven thickness of the electrodes 9 of the circuit board 8 or the warp or undulation of the circuit board 8, the semiconductor device 1
By deforming the tips of the protruding electrodes 3 in order to match the height of the tips of the protruding electrodes 3 of the semiconductor device 1 with the uneven height of the electrodes 9 of the circuit board 8, the connection between the electrodes can be reliably performed. it can.
【００１９】このために、従来例における平坦面４によ
る平坦化を行う平坦化ステージを設けることなく、図３
に示すように、実装工程で、図示しない半導体装置吸着
ノズルに吸着した半導体装置１の突起電極３を、位置決
め済みの実装すべき回路基板８の実際に接続する電極９
に位置決めし、ＡＣサーボモータ、又は、エアシリンダ
を使用して、約５０ｇ／突起電極の荷重を１秒前後加え
て、前記突起電極３を変形させ、前記突起電極３の高さ
を、回路基板８の電極９の高さに整合させる。勿論、加
圧力と時間とは、電極の形状、大きさ、突起電極の材
質、形状、大きさに合わせて変更すれば良い。For this reason, without providing a flattening stage for flattening by the flat surface 4 in the conventional example, FIG.
As shown in FIG. 5, in the mounting process, the electrode 9 for actually connecting the protruding electrode 3 of the semiconductor device 1 attracted by the semiconductor device adsorption nozzle (not shown) to the positioned circuit board 8 to be mounted
Position, the AC servo motor or air cylinder is used to apply a load of about 50 g / projection electrode for about 1 second to deform the projection electrode 3 and adjust the height of the projection electrode 3 to the circuit board. The height of the electrode 9 of 8 is matched. Of course, the pressing force and time may be changed according to the shape and size of the electrode and the material, shape and size of the protruding electrode.
【００２０】このようにすると、図４に示すように、回
路基板８の実装すべき電極９の高さの不揃いに整合して
高さが調整された半導体装置１が得られる。In this way, as shown in FIG. 4, the semiconductor device 1 whose height is adjusted to match the uneven height of the electrodes 9 to be mounted on the circuit board 8 is obtained.
【００２１】この場合、同時に、加熱を加えても良い。
３００°Ｃ程度に加熱すると、荷重は１／２程度にな
り、加圧時間も短くなる。勿論、温度は、電極の形状、
大きさ、突起電極の材質、形状、大きさに合わせて変更
すれば良い。In this case, heating may be applied at the same time.
When heated to about 300 ° C., the load becomes about ½ and the pressurizing time becomes short. Of course, the temperature depends on the shape of the electrode,
The size may be changed according to the material, shape, and size of the protruding electrode.
【００２２】本発明の第２実施例を図５〜図７に基づい
て説明する。A second embodiment of the present invention will be described with reference to FIGS.
【００２３】図５に示すように、実装工程で、図示しな
い半導体装置吸着ノズルに吸着した半導体装置１の各突
起電極３を、位置決め済みの実装すべき回路基板８の接
続すべき各電極９に位置決めし、ＡＣサーボモータ、又
は、エアシリンダを使用して、約５０ｇ／突起電極で、
２秒前後の荷重を加えて、前記突起電極３を変形させ、
その高さを、回路基板８の電極９の高さの不揃いに整合
させる。As shown in FIG. 5, in the mounting process, each protruding electrode 3 of the semiconductor device 1 sucked by the semiconductor device suction nozzle (not shown) is connected to each electrode 9 to be connected of the positioned circuit board 8 to be mounted. Positioning, using AC servo motor or air cylinder, about 50g / projection electrode,
Applying a load for about 2 seconds to deform the protruding electrode 3,
The height is matched with the uneven height of the electrodes 9 of the circuit board 8.
【００２４】図６に示すように、上記の、回路基板８の
電極９の高さの不揃いに整合させた半導体装置１の複数
の突起電極３の先端を、平坦面６上に塗布された導電性
接着剤７、又は、クリーム半田の平坦な面上に合わせ
て、導電性接着剤７、又は、クリーム半田を、前記複数
の突起電極３の先端に転写する。As shown in FIG. 6, the tips of the plurality of projecting electrodes 3 of the semiconductor device 1 aligned with the uneven heights of the electrodes 9 of the circuit board 8 are electrically conductive coated on the flat surface 6. The conductive adhesive 7 or the cream solder is transferred to the tips of the plurality of protruding electrodes 3 in conformity with the flat surface of the conductive adhesive 7 or the cream solder.
【００２５】図７に示すように、導電性接着剤７、又
は、クリーム半田が、前記複数の突起電極３の先端に転
写された半導体装置１を、回路基板８の複数の電極９の
上に、位置決めして実装し必要時間加熱して、仮硬化さ
せる。仮硬化後、次工程に送られ、加熱炉で加熱されて
実装が完了する。As shown in FIG. 7, the semiconductor device 1 having the conductive adhesive 7 or cream solder transferred to the tips of the plurality of protruding electrodes 3 is placed on the plurality of electrodes 9 of the circuit board 8. Positioning, mounting, heating for a required time, and temporary curing. After temporary curing, it is sent to the next step and heated in a heating furnace to complete mounting.
【００２６】上記実施例のようにして、実装すべき回路
基板の電極の上に、半導体装置の突起電極を押し付け
て、両者の電極と突起電極との突き合わせ状態を整合し
てから、実装することにより、半導体装置の突起電極と
回路基板の電極とを密接させることができ、接合強度が
向上すると共に、接続抵抗値も２０〜３０ｍΩ程度の小
さい値に安定させることができる。As in the above-described embodiment, the protruding electrodes of the semiconductor device are pressed against the electrodes of the circuit board to be mounted so that the two electrodes and the protruding electrodes are aligned with each other, and then mounted. Thereby, the protruding electrode of the semiconductor device and the electrode of the circuit board can be brought into close contact with each other, the bonding strength can be improved, and the connection resistance value can be stabilized at a small value of about 20 to 30 mΩ.
【００２７】[0027]
【発明の効果】本願第１発明の半導体装置の実装方法
は、回路基板の各電極の厚みにバラツキがあっても、回
路基板に反りや、うねりがあっても、極めて安定して正
確に、半導体装置の各突起電極の高さを、前記回路基板
の各電極の高さの実態に整合させることができるという
効果を奏する。According to the method of mounting a semiconductor device of the first invention of the present application, even if there are variations in the thickness of each electrode of the circuit board, or even if the circuit board is warped or undulated, it can be carried out very stably and accurately. The height of each protruding electrode of the semiconductor device can be matched to the actual height of each electrode of the circuit board.
【００２８】本願第２発明の半導体装置の実装方法は、
加圧に加熱を伴わせることにより、本願第１発明に比較
して、加圧力が小さくて済み、且つ、加圧時間を短縮で
きるという効果を奏する。A semiconductor device mounting method according to the second invention of the present application is
Since heating is accompanied by pressurization, compared to the first invention of the present application, there is an effect that the applied pressure can be small and the pressurization time can be shortened.
【００２９】本願第３発明の半導体装置の実装方法は、
本願第１、第２発明の効果に加えて、半導体装置の各突
起電極と回路基板の各電極間の接続のオープン不良がな
くなり、接続強度が向上し、接続抵抗値が小さい値に安
定し、極めて安定した信頼性が高い半導体装置の実装が
可能になるという効果を奏する。A method of mounting a semiconductor device according to the third invention of the present application is
In addition to the effects of the first and second inventions of the present application, open defects in the connection between the protruding electrodes of the semiconductor device and the electrodes of the circuit board are eliminated, the connection strength is improved, and the connection resistance value is stabilized at a small value. It is possible to mount a semiconductor device that is extremely stable and highly reliable.
【図１】半導体装置の突起電極の側面図である。FIG. 1 is a side view of a protruding electrode of a semiconductor device.
【図２】回路基板の電極の側面部である。FIG. 2 is a side surface portion of an electrode of a circuit board.
【図３】本発明の第１実施例の半導体装置の突起電極と
回路基板の電極との高さの整合動作の側面図である。FIG. 3 is a side view of the height matching operation between the protruding electrodes of the semiconductor device of the first embodiment of the present invention and the electrodes of the circuit board.
【図４】本発明の第１実施例の半導体装置の突起電極の
高さの整合状態の側面図である。FIG. 4 is a side view of the semiconductor device of the first embodiment of the present invention in which the heights of the protruding electrodes are matched.
【図５】本発明の第２実施例の半導体装置の突起電極と
回路基板の電極との高さの整合動作の側面図である。FIG. 5 is a side view of the height matching operation between the protruding electrodes of the semiconductor device of the second embodiment of the present invention and the electrodes of the circuit board.
【図６】本発明の第２実施例の導電性接着剤の転写動作
の側面図である。FIG. 6 is a side view of the transfer operation of the conductive adhesive according to the second embodiment of the present invention.
【図７】本発明の第２実施例の実装状態の側面図であ
る。FIG. 7 is a side view of a mounted state of the second embodiment of the present invention.
【図８】半導体装置の突起電極の側面図である。FIG. 8 is a side view of a protruding electrode of a semiconductor device.
【図９】従来例の半導体装置の突起電極の高さの平坦化
動作の側面図である。FIG. 9 is a side view of the operation of flattening the height of the protruding electrodes of the semiconductor device of the conventional example.
【図１０】従来例の導電性接着剤の転写動作の側面図で
ある。FIG. 10 is a side view of a transfer operation of a conductive adhesive of a conventional example.
【図１１】従来例の実装状態の側面図である。FIG. 11 is a side view of a mounting state of a conventional example.
１ 半導体装置 ２ 電極 ３ 突起電極 ６ 平坦面 ７ 導電性接着剤、又は、クリーム半田 ８ 回路基板 ９ 電極 1 Semiconductor Device 2 Electrode 3 Projection Electrode 6 Flat Surface 7 Conductive Adhesive or Cream Solder 8 Circuit Board 9 Electrode
フロントページの続き (72)発明者 熊谷 浩一 大阪府門真市大字門真1006番地 松下電器 産業株式会社内Front page continuation (72) Inventor Koichi Kumagai 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.
Claims (3)
これらの突起電極を、電気回路が形成された回路基板の
各電極に接続する半導体装置の実装方法において、半導
体装置の電極上に突起電極を形成した後、この半導体装
置の前記突起電極を実装すべき回路基板の対応する電極
上に位置決めし、加圧して、前記半導体装置の各突起電
極の先端の形状を変形し、前記各突起電極の高さを、前
記回路基板の各電極の高さの実態に整合させることを特
徴とする半導体装置の実装方法。1. A projection electrode is provided on each electrode of a semiconductor device,
In a method of mounting a semiconductor device, in which these protruding electrodes are connected to respective electrodes of a circuit board on which an electric circuit is formed, after forming the protruding electrodes on the electrodes of the semiconductor device, the protruding electrodes of this semiconductor device are mounted. Positioning on the corresponding electrode of the circuit board to be pressed and applying pressure, the shape of the tip of each protruding electrode of the semiconductor device is deformed, and the height of each protruding electrode is set to the height of each electrode of the circuit board. A method for mounting a semiconductor device, which is characterized by conforming to actual conditions.
において、加圧に加熱を伴わせることを特徴とする半導
体装置の実装方法。2. The method for mounting a semiconductor device according to claim 1, wherein the pressing is accompanied by heating.
の実装方法において、半導体装置の各突起電極の高さ
を、回路基板の各電極の高さの実態に整合させた後、平
坦面上に塗工された導電性接着剤、又は、クリーム半田
の面に、前記半導体装置の各突起電極を合わせて、前記
半導体装置の各突起電極に前記導電性接着剤、又は、ク
リーム半田を転写し、前記導電性接着剤、又は、クリー
ム半田を転写した前記半導体装置の各突起電極を、実装
すべき回路基板の各電極に位置決めし、実装することを
特徴とする半導体装置の実装方法。3. The method for mounting a semiconductor device according to claim 1, wherein the height of each protruding electrode of the semiconductor device is made flat after the height of each electrode of the circuit board is matched. Conductive adhesive coated on the surface, or the surface of the cream solder, each projection electrode of the semiconductor device is aligned, the conductive adhesive or cream solder to each projection electrode of the semiconductor device. A method for mounting a semiconductor device, comprising: positioning and mounting each protruding electrode of the semiconductor device, which has been transferred and to which the conductive adhesive or cream solder has been transferred, on each electrode of a circuit board to be mounted.
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6322032A JPH08181144A (en) | 1994-12-26 | 1994-12-26 | Mounting of semiconductor device |
| US08/576,160 US5686353A (en) | 1994-12-26 | 1995-12-21 | Semiconductor device and manufacturing method thereof |
| EP95120500A EP0720226B1 (en) | 1994-12-26 | 1995-12-22 | Semiconductor device comprising contact bumps |
| TW084113772A TW288194B (en) | 1994-12-26 | 1995-12-22 | |
| DE69535551T DE69535551T2 (en) | 1994-12-26 | 1995-12-22 | Semiconductor arrangement with contact holes |
| CN95113148A CN1051641C (en) | 1994-12-26 | 1995-12-25 | Semiconductor and its producing method |
| KR1019950056321A KR100239286B1 (en) | 1994-12-26 | 1995-12-26 | Semiconductor device and mounting method |
| CNB991084586A CN1153267C (en) | 1994-12-26 | 1999-06-11 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6322032A JPH08181144A (en) | 1994-12-26 | 1994-12-26 | Mounting of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08181144A true JPH08181144A (en) | 1996-07-12 |
Family
ID=18139169
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6322032A Pending JPH08181144A (en) | 1994-12-26 | 1994-12-26 | Mounting of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08181144A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005071735A1 (en) * | 2004-01-22 | 2005-08-04 | Bondtech Inc. | Joining method and device produced by this method and joining unit |
| JP2011204966A (en) * | 2010-03-26 | 2011-10-13 | Fujitsu Ltd | Semiconductor device, and method of manufacturing the same |
-
1994
- 1994-12-26 JP JP6322032A patent/JPH08181144A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005071735A1 (en) * | 2004-01-22 | 2005-08-04 | Bondtech Inc. | Joining method and device produced by this method and joining unit |
| US7784670B2 (en) | 2004-01-22 | 2010-08-31 | Bondtech Inc. | Joining method and device produced by this method and joining unit |
| US8091764B2 (en) | 2004-01-22 | 2012-01-10 | Bondtech, Inc. | Joining method and device produced by this method and joining unit |
| US8651363B2 (en) | 2004-01-22 | 2014-02-18 | Bondtech, Inc. | Joining method and device produced by this method and joining unit |
| JP2011204966A (en) * | 2010-03-26 | 2011-10-13 | Fujitsu Ltd | Semiconductor device, and method of manufacturing the same |
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