JPH08167587A - Flattening method of semiconductor wafer - Google Patents

Abstract

PURPOSE: To reduce the rough surface of a semiconductor wafer in a narrow region by a method wherein fluid is applied flat onto the surface of the semiconductor wafer to form a coating film, and the coating film and the semiconductor wafer are etched back nearly at a constant etching rate so as to flatten the surface of the wafer. CONSTITUTION: The surface of a silicon semiconductor wafer 10 is subjected to a chemical mechanical polishing process for finishing. Then, fluid is applied flat onto the other primary surface of the wafer 10 and turned into a coating film 12 by baking. The coating film 12 and the wafer 10 are etched back nearly at a constant etching rate under such etching conditions that the etching selection ratio of the coating film 12 to the wafer 10 is set to 1:1 to flatten the surface of the wafer 10. By this setup, the wafer 10 can markedly lessen degree of roughness in a narrow region, and the wafers 10 can be made uniform in roughness in a narrow region.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of flattening a semiconductor wafer, and more particularly, to an LTV (Local Thichness) by etching back the surface of a semiconductor wafer which has been polished.
Variation: The flatness is improved by reducing the degree of unevenness in a narrow area.

[0002]

2. Description of the Related Art Conventionally, as a semiconductor wafer used for LSI manufacturing, for example, one obtained by cutting a silicon single crystal grown by the Czochralski method and subjecting it to polishing or the like is known. For this type of wafer, CMP (chemical mechanical polishing) is usually performed as a finishing process.

[0003]

According to the above-mentioned prior art, since only CMP processing is used as the finishing processing, L
There is a limit to how small the TV can be suppressed, and there is a large variation in the LTV between wafers.

In the LSI manufacturing, the depth of focus of the stepper becomes shallower as the pattern becomes finer in the future, and there is a concern that the yield may decrease due to a pattern defect due to defocus (defocus). Therefore, in the future, there will be an increasing need to suppress LTV (local unevenness) on the wafer to a small level. However, at present, the only method for obtaining a small LTV wafer is to select one that meets the required specifications from a large number of CMP-finished wafers, and the more stringent the required specifications, the lower the yield. It will be a big cost increase.

An object of the present invention is to improve the flatness of a semiconductor wafer.

[0006]

A method for flattening a semiconductor wafer according to the present invention comprises a step of forming a coating film by flatly applying a fluid to a surface of a semiconductor wafer that has been subjected to a polishing treatment, Etching back the coating film and the semiconductor wafer at a substantially constant rate to planarize the surface of the semiconductor wafer.

[0007]

According to the method of the present invention, since the wafer surface is subjected to the etch back process after the polishing process, the LTV is processed.
Can be significantly reduced, and the variation in LTV between wafers can be reduced.

[0008]

1 to 3 show a method of flattening a semiconductor wafer according to an embodiment of the present invention, and steps (1) to (3) corresponding to each drawing will be sequentially described.

(1) The surface of the semiconductor wafer 10 made of, for example, silicon is subjected to a CMP process as a finishing process. At the stage where this processing is completed, large LTV remains on the wafer surface as shown in FIG.

(2) Next, a fluid is applied in a flat state on one main surface of the wafer 10 to form a coating film 12. As the fluid, for example, photoresist can be used. The photoresist is spin-coated to a thickness of about 1 μm, and then baked to form the coating film 12.

(3) Next, the wafer 10 is dry-etched from the coating film 12 side. In this case, the wafer 10
Etching back is performed at a substantially constant speed by setting the etching conditions such that the etching selection ratio between the silicon forming the film and the material forming the coating film 12 (eg, resist) is about 1: 1.

As a result, as shown in FIG. 3, an extremely flat surface 10a having a significantly reduced LTV is obtained. Also,
Since the flat surface 10a is obtained for each wafer, the variation in LTV between wafers is extremely small.

If the recess is too steep, a part of the coating film may remain in the recess even after the etching back process. For such a case, a coating film removing step may be added after the etch back process. For the contamination of metal or the like that occurs during the etch-back process, it is not necessary to provide a contamination removal step. This is because the metal contamination removal process is performed with ammonia hydrogen peroxide before the initial oxidation in the LSI process or the like, and therefore this process can be used.

[0014]

As described above, according to the present invention, since the polished surface of the semiconductor wafer is subjected to the etch back process to reduce the LTV, the flatness can be greatly improved. Even if the depth of focus of the stepper becomes shallower in the future, it is possible to obtain the effect of avoiding a decrease in yield due to a pattern defect due to defocus.

[Brief description of drawings]

FIG. 1 is a wafer sectional view showing a wafer polishing step in a wafer flattening method according to an embodiment of the present invention.

FIG. 2 is a wafer cross-sectional view showing a coating film forming step following the step of FIG.

FIG. 3 is a wafer cross-sectional view showing an etchback process following the process of FIG.

[Explanation of symbols]

 10: semiconductor wafer, 12: coating film.

Claims (1)

[Claims] 1. A step of flatly applying a fluid to a surface of a semiconductor wafer that has been subjected to a polishing treatment to form a coating film; and a step of etching back the coating film and the semiconductor wafer at a substantially constant speed. And a step of planarizing a surface of the semiconductor wafer.