JPH08161831A - Disk reproducing device - Google Patents

Abstract

PURPOSE: To change over error processing to assure the reliability of reproduced data and error processing to assure the continuity of the reproduced data at the time of successively reading and reproducing the data recorded by each of prescribed processing units on a disk-shaped recording medium. CONSTITUTION: The operation mode of a sub-CPU 84 which executes the error processing meeting the result of the error detection by a decoder 82 is changed over by a host CPU 51 at the time of successively reading and reproducing the data recorded by each of the prescribed processing units on an optical disk. The reproduced data free from the errors accumulated in a buffer memory 83 is outputted at a retry mode in a first operation mode. The updating of the reproduced data accumulated in a buffer memory 83 is prohibited in a frame unit and the reproduced data is outputted at a no-retry mode when the error is detected in a second operation mode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a disk reproducing apparatus for sequentially reading and reproducing data recorded in a disk-shaped recording medium for each predetermined processing unit, and more particularly to program data and image data for video game machines and the like. And a disk reproducing device for supplying audio data.

[0002]

2. Description of the Related Art Conventionally, in a video game device such as a home TV game machine, a ROM (Read Only) that can be accessed at high speed
Program data, image data, and audio data were supplied from the (Memory) cartridge, but with the increase in data volume due to complicated software,
Optical discs that have a large storage capacity and are used as recording media for program data, image data, and audio data are becoming popular.

By the way, in a disc-shaped recording medium such as an optical disc, an error is unavoidable when reading data due to its nature, so data is managed in a predetermined processing unit called a sector, and each sector is managed. An error correction code (ECC) is added. Then, in a disc reproducing device for reproducing data from the disc-shaped recording medium, error-correction is performed using an error correction code added to the data read from the disc-shaped recording medium, so that reproduction data with few errors is obtained. I have to.

The error correction process using the above error correction code can correct an error with a certain probability.
When an error that exceeds the threshold value occurs, it becomes impossible to perform error correction, so it may not be possible to perform error correction depending on the state of the disk recording medium or the state of vibration. Therefore, in such a case, so-called retry read is performed in which the head is returned and the same sector is read again.

In this retry read processing, since it is necessary to control the position of the head with high accuracy in sector units, a central processing unit (CPU: Central Processing Unit) on the host side is required.
It) cannot be performed, but is automatically performed by a hardware circuit or a dedicated sub CPU provided in the disk drive.

[0006]

In the conventional disc reproducing apparatus as described above, the quality of the reproduced data from the disc-shaped recording medium can be guaranteed by the retry read process, and the temporal continuity such as program data can be ensured. The reliability of the data can be ensured when playing back unrequested data, but when playing back temporally continuous data such as video data and music data in real time from a disc-shaped recording medium, the above-mentioned retry is performed. When the read processing occurs, there is a problem that the reproduced video or audio becomes discontinuous.

Therefore, an object of the present invention is to successively read the data recorded on the disk-shaped recording medium for each predetermined processing unit and reproduce it, and perform error processing for ensuring the reliability of the reproduced data and continuous reproduction data. It is an object of the present invention to provide a disc reproducing apparatus capable of switching between error processing for ensuring the property.

[0008]

DISCLOSURE OF THE INVENTION The present invention is a disk reproducing apparatus for sequentially reading and reproducing data recorded in a disk-shaped recording medium for each predetermined processing unit, and storing the reproduced data. Means, error occurrence detecting means for detecting an error occurring in the reproduced data, error processing means for performing error processing according to the detection result by the error occurrence detecting means, and control means for switching the operation mode of the error processing means And in the first operating mode,
When an error is detected by the error occurrence detection means, the error processing means reads again the data of the predetermined processing unit in which the error is detected from the disk-shaped recording medium and reproduces the data, and the predetermined processing unit without error The reproduction data stored in the storage means is updated with the data of 1., and in the second operation mode, when an error is detected by the error occurrence detection means, the reproduction data stored in the storage means by the error processing means. Is prohibited, and the reproduction data is updated only by using data of a predetermined processing unit having no error.

Further, the disc reproducing apparatus according to the present invention,
A disc reproducing apparatus for sequentially reading and reproducing image data recorded by dividing one frame into a plurality of predetermined processing units on a disc-shaped recording medium, wherein the error processing means comprises: When an error is detected by the error occurrence detecting means, updating of the reproduction data is prohibited on a frame-by-frame basis.

Further, in the disk reproducing apparatus according to the present invention, the control means switches the error processing means to the first operation mode when reproducing the program data recorded on the disk-shaped recording medium, When the image data recorded on the recording medium is reproduced, the error processing means is switched to the second operation mode.

[0011]

In the disc reproducing apparatus according to the present invention, when the data recorded in the disc-shaped recording medium for each predetermined processing unit is sequentially read and reproduced, an error process is performed in accordance with the detection result of the error occurrence detecting means. The operation mode of the processing means is switched by the control means, and in the first operation mode, when an error is detected by the error occurrence detection means, data of a predetermined processing unit in which the error is detected by the error processing means. Is read again from the disk-shaped recording medium and reproduced, and the reproduction data stored in the storage means is updated with data of a predetermined processing unit having no error, and the reproduction data stored in the storage means is output,
In the second operation mode, when an error is detected by the error occurrence detecting means, the error processing means prohibits the update of the reproduction data stored in the storage means, and a predetermined processing unit without an error occurs. The reproduction data is updated using only the data, and the reproduction data stored in the storage means is output.

Further, in the disc reproducing apparatus according to the present invention, when the image data recorded on the disc-shaped recording medium in which one frame is divided into a plurality of predetermined processing units are sequentially read and reproduced, the error occurrence detecting means is used. When an error is detected by the above, the error processing means prohibits the update of the reproduction data on a frame-by-frame basis, and updates the reproduction data by using only the data of a predetermined processing unit having no error. Perform error handling in mode.

Further, in the disc reproducing apparatus according to the present invention, when reproducing the program data recorded on the disc-shaped recording medium, the error processing means performs error processing in the first operation mode to perform the disc-shaped recording. When reproducing the image data recorded on the medium, the error processing means performs error processing in the second operation mode.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a disc reproducing apparatus according to the present invention will be described below in detail with reference to the drawings.

The disc reproducing apparatus according to the present invention is applied to a video game apparatus as shown in FIG. 1, for example.

This video game device plays a game in accordance with an instruction from a user by reading and executing a game program stored in an auxiliary storage device such as an optical disk. It has a configuration as shown in.

That is, this video game device is a control system 50 including a central processing unit (CPU) 51 and its peripheral devices, and an image processing device (GPU: Graphic Proce) for drawing in a frame buffer 63.
ssing Unit) 62 and other graphic system 60
And a sound processing device (SPU: Sound
Processing unit) etc. sound system 70
And an optical disk controller 80 for controlling an optical disk which is an auxiliary storage device, and an input / output from an auxiliary memory for storing an instruction input from a controller for inputting an instruction from a user and a game setting. Communication controller 90
And a bus 100 to which the control system 50 to the communication control unit 90 are connected.

The control system 50, CPU 51, and interrupt control and direct memory access (DMA: Dynamic Memory).
y Access) Peripheral device controller 52 that controls transfer and random access memory (RAM: Random Acce
Main memory (main memory) 53 composed of ss Memory)
And a read only memory (ROM) 54 storing a program such as a so-called operating system for managing the main memory 53, the graphic system 60, the sound system 70 and the like. The CPU 51 controls the entire apparatus by executing the operating system stored in the ROM 54, and is a 32-bit RISC CPU.
Consists of

In the video game device, when the power is turned on, the CPU 51 of the control system 50 causes the ROM
By executing the operating system stored in 54, the graphic system 60, the sound system 70, etc. are controlled.
Also, when the operating system runs, CP
After performing initialization of the entire device such as operation confirmation, the U51 controls the optical disc control unit 80 to execute a program such as a game recorded on the optical disc. By executing the program such as this game, the CPU 5
Reference numeral 1 controls the graphic system 60, the sound system 70, etc. in accordance with an input from the user to control the display of images, the generation of sound effects, and the generation of musical sounds.

Further, the graphic system 60 is
A geometry transfer engine (GTE) 61 that performs processing such as coordinate conversion, and a CPU 5
A GPU 62 that draws in accordance with a drawing instruction from 1.
A frame buffer 63 for storing an image drawn by the GPU 62 and an image decoder 64 for decoding image data compressed and encoded by orthogonal transform such as discrete cosine transform are provided.

The GTE 61 has, for example, a parallel operation mechanism for executing a plurality of operations in parallel, and can perform coordinate conversion, light source calculation, calculation of a matrix or a vector at high speed in response to a calculation request from the CPU 51. It is like this. Specifically, this GTE 61 is, for example, 1
In the case of calculation that performs flat shading that draws the same color on two triangular polygons, maximum 1 per second
It is possible to calculate the coordinates of about 500,000 polygons. This makes it possible to reduce the load on the CPU 51 and perform high-speed coordinate calculations in this video game device. .

Further, the GPU 62 draws a polygon or the like on the frame memory 62 according to a drawing command from the CPU 51. This GPU 62 is
A maximum of about 360,000 polygons can be drawn in one second.

In this embodiment, the CPU 51 is
The main memory 53 has a drawing command sequence for generating an image for one screen. The drawing command holds the address of the drawing command to be executed in a part thereof. DM provided as the peripheral device controller 52
The A controller transfers the drawing command from the main memory 53 to the GPU 62. The GPU 62 executes the drawing command received from the DMA controller and writes the result in the frame buffer 63. When the DMA controller transfers one drawing command, it follows the address incorporated in the drawing command and executes the next command.

Here, for example, as shown in FIG. 2, a checkered texture pattern Tx is formed on a trapezoidal polygon PG.
When drawing is performed by mapping, the drawing command A of the quadrangle ABDC for drawing with the texture map is shown in FIG.

That is, in drawing, drawing 4
Vertex coordinates (XA, YA), (XB, Y) of the polygon ABDC
B), (XD, YD), (XC, YC) and texture coordinates (UA, VA), (UB, V) corresponding to each vertex.
B), (UD, VD), and (UC, VC) are described.
When this drawing command sequence is executed, the GPU 62 draws on the frame buffer 63 a polygon decorated by texture mapping involving primary conversion.

In this embodiment, the process for constructing an image for one screen is as follows. For example, as shown in the flowchart of FIG. 4, the conversion matrix is first obtained in step S1, and the drawing command A is obtained in step S2. And the depths of drawing commands (ZA, ZB, ZD, ZC) are given, the respective vertex coordinates (XA, YA), (XB, YB), (X
D, YD) and (XC, YC) are perspective-transformed.

Then, in step S3, the vertex coordinates (XA, YA), (XB, Y) described in the drawing command A are written.
B), (XD, YD), (XC, YC), and the size (ΔX, ΔY) after perspective transformation is calculated. As a result, in step S4, as shown in FIG.
Determine the number and location of n. In this way, the amount of calculation can be optimized by adaptively changing the number of representative points Pn according to the size of the polygon.

In the next step S5, the above step S4 is performed.
It is determined whether or not the number of the representative points Pn determined in step 2 is plural, and if there is more than one, the process proceeds to step S6, and the vertex coordinates (Xn, , Yn) is determined by perspective transformation.

Then, in step S7, the square ABC
Four small squares AP0P2 each having a representative point as a vertex
P1, P0BP3P2, P1P2P4C, P2P3DP
4 and each drawing command sequence B0 to B4 is generated. That is, the vertex coordinates / texture coordinates of each sub drawing command sequence Bn are previously calculated (XA, YA),
(XB, YB), (XC, YC), (XD, YD) and (UP0, VP0), (UP1, VP1), (UP
2, VP2), (UP3, VP3), (UP4, VP
Set the value of 4).

When the number of the representative points determined in step S4 is one, the process proceeds to step 8 and the drawing command is immediately created.

In the next step S9, as shown in FIG. 6, a drawing command list is created by setting the address of the sub drawing command string Bn in the tag TAG of the sub drawing command string Bn-1, and this drawing command list is created. Is replaced with the original drawing command A.

Then, in the next step S9, it is determined whether or not the processing has been completed for all polygons. If there is an unprocessed polygon, the process returns to step S2 and the vertex coordinates of the new polygon are also determined. Perspectively transforms.

If there is no unprocessed polygon in step S9, the drawing of the previous frame is awaited in step S11, and then the process proceeds to step S12 to start drawing from the head of the list.

As shown in FIG. 7, the GPU 62 determines a texture pixel other than the representative point Pn by internally dividing, or linearly interpolating between the perspective-transformed representative points Pn, as shown in FIG. Then, drawing is performed on the frame buffer 63.

As described above, the representative points in the polygon, which is a unit of the three-dimensional image information forming the object to be displayed as an image, are extracted, the coordinates of the representative points are perspective-transformed, and then the representative points are linearly interpolated. As a result, the amount of calculation is extremely small compared to the case where perspective conversion is performed for all the points in the polygon, and a realistic natural mapping image can be obtained in real time.

The frame buffer 63 comprises a so-called dual port RAM, and the GPU 62
It is possible to simultaneously perform drawing from the memory or transfer from the main memory and reading for display. The frame buffer 63 has a capacity of 1 Mbytes, and each has 16 bits in the horizontal direction and 1024 in the vertical direction.
Treated as a matrix of 2 pixels. In addition to the display area that is output as video output, the frame buffer 63 also includes a color lookup table (CLUT: Cclo: Cclo: Cclo) that the GPU 62 refers to when drawing a polygon or the like.
There is provided a CLUT area in which r Lock Up Table) is stored and a texture area in which a material (texture) to be inserted (mapped) into a polygon or the like whose coordinates are converted at the time of drawing and drawn by the GPU 62 is stored. . These CLUT area and texture area are dynamically changed according to the change of the display area and the like.

As shown in FIG. 9, the GPU 62 prepares two rectangular areas A and B on the frame buffer 63, and while drawing in one rectangular area B, the other rectangular area is drawn. By displaying the contents of A and exchanging the two rectangular areas A and B within the vertical blanking period after the drawing is completed, the rewriting state is prevented from being displayed.

In addition to the above flat shading, the GPU 62 pastes the Gouraud shading that complements the color of the vertex of the polygon to determine the color inside the polygon and the texture stored in the texture area to the polygon. Texture mapping can be performed. When performing these Gouraud shading or texture mapping, the above G
The TE 61 can perform coordinate calculation of up to about 500,000 polygons per second.

Further, when the GPU 62 outputs the contents of an arbitrary rectangular area in the frame buffer 63 as a video output of the display area, the GPU 10 shown in Table 1 below.
Supports different screen modes.

[0040]

[Table 1]

The screen size, that is, the number of pixels on the CRT screen is variable, and as shown in FIG.
Display start position (DTX, DT)
Y) and the display end position (DBX, DBY) can be designated.

Further, the GPU 62 supports two modes as a mode relating to the number of display colors, a 15-bit mode for displaying 32,768 colors and a 24-bit mode for displaying 16,777,216 colors.

As a drawing function, the GPU 62 can freely set the number of dots in the vertical and horizontal directions of 1 ×.
It supports the sprite drawing function of 1 dot to 256 × 256 dots.

Here, as shown in FIG. 11, the image data to be attached to the sprite, that is, the sprite pattern, is transferred to the frame buffer prior to the execution of the drawing command and placed in the non-display area on the frame buffer.

The above sprite pattern has a size of 256 × 25.
One page (texture page) is made up of 6 pixels, and any number can be placed on the frame buffer within the memory capacity.

The size of one texture page is shown in FIG.
As shown in 2, it depends on the mode. The location of the texture page in the frame buffer is determined by designating the page number in the parameter called TSB in the drawing command, as shown in FIG.

The sprite pattern has a 4-bit CLU.
3 of T, 8-bit CLUT and 15-bit DIRECT
There are different color modes.

In the 4-bit CLUT mode, 16-color sprite drawing is performed using the CLUT. Also, 8-bit C
In the LUT mode, 256-color sprite drawing is performed using the CLUT. Further, in the 15-bit DIRECT mode, 15768 bits are directly used to perform 32768-color sprite drawing.

The sprite pattern in the 4-bit CLUT mode or the 8-bit CLUT mode is a number that specifies 16 to 256 RGB values representing the finally displayed color and the RGB values of the CLUT arranged on the frame buffer. Represents the color of each pixel. The CLUT can be specified for each sprite, and it is also possible to have an independent CLUT for all sprites.

Under the control of the CPU 51, the image decoder 64 decodes the image data of the still image or the moving image stored in the main memory 53 and stores it in the main memory 53.

The reproduced image data is GP
By storing it in the frame buffer 63 via U62, it can be used as the background of the image drawn by the GPU 62.

The sound system 70 includes the CPU 51.
SP that generates musical sounds, sound effects, etc. based on instructions from
A U71, a sound buffer 72 for recording waveform data and the like by the SPU 71, and a speaker 73 for outputting a musical sound, a sound effect, etc. generated by the SPU 71 are provided.

The SPU 71 uses adaptive prediction coding (ADPCM: A) with 16-bit audio data as a 4-bit differential signal.
ADPCM decoding function for reproducing daptive Diffrential PCM audio data, a reproducing function for generating sound effects by reproducing waveform data stored in the sound buffer 72, and a sound buffer 72 for storing. It has a modulation function to modulate and reproduce waveform data.

By providing such a function, the sound system 70 can be used as a so-called sampling sound source for generating a musical sound, a sound effect, etc. based on the waveform data recorded in the sound buffer 72 according to an instruction from the CPU 51. You can do it.

The optical disc control unit 80 includes an optical disc device 81 for reproducing a program, data, etc. recorded on the optical disc, and an error correction code (ECC: Err), for example.
(or Correction Code) is added to the decoder 82 for decoding the recorded program, data, etc., and the memory for speeding up the reading from the optical disk by temporarily storing the reproduced data from the optical disk device 81. A buffer 83 and a sub CPU 84 that controls these are provided.

The optical disk device 81 is adapted to read data to which an error correction code is added for each processing unit called a sector from the optical disk. In addition,
One sector consists of 2048 bytes, for example. Further, the decoder 82 detects an error occurring in the reproduction data of the data supplied from the optical disk device 81, and uses an error correction code for the generated error to perform error correction processing for each processing unit. It has an error correction processing function to perform, and when an error exceeding its error correction capability occurs, an error signal indicating a processing unit including an error is given to the sub CPU 84.

Here, the data recorded on the optical disk has, for example, 2048 bytes in one sector, and a meaningful data unit in n sectors, for example, constitutes a frame corresponding to one screen of a moving image. . Then, in order to recognize the frame, a sector header is added to each sector, and as information of this sector header,
At least the frame number (Sframeno), the number of sectors of the frame including the sector (Ssize), and
The intra-frame offset (Soffset) of the sector is given. Frame number (Sframeno)
Are consecutive in the order in which they are stored on the optical disc.

In the optical disc controller 80, the sub CPU 84 is the CPU of the control system 50.
The operation mode is designated by 51, and the following error processing is performed.

That is, the sub CPU 84 is operated as shown in FIG.
As shown in the flowchart of FIG. 3, a determination process for determining the operation mode designated by the CPU 51 (step S
21) is performed. If the first operation mode is designated, the process proceeds to step S22 to perform retry mode error processing. If the second operation mode is designated, the process proceeds to step S23 to perform no retry mode error. Perform processing.

Here, the CPU 51 of the control system 50 is
When the data reproduced by the optical disk device 81 is program data which does not require temporal continuity but needs to ensure reliability, the first operation mode, that is, the retry mode is designated. When reproducing moving image data and music data that are temporally continuous in real time, the second operation mode, that is, the no-retry mode is designated.

In the retry mode error processing, as shown in the flowchart of FIG. 14, the head of the optical disk device 81 is first moved to the data reading start position to start data reading (step S2).
1). In the next step S22, error determination processing is performed to determine whether or not an error signal is supplied from the decoder 82. The determination result in step S22 is [YES].
That is, when the error signal is supplied, the process returns to step S21 and the sector in which the error has occurred is read again. If the determination result in step S22 is "NO", that is, no error signal is supplied, the process proceeds to step S23, and it is determined whether or not the data reading of all the sectors is completed. If the determination result in step S23 is [NO], that is, if data reading is to be continued, the process returns to step S22, and error determination processing is performed. In addition, this step S23
When the result of the determination in [YES] is [YES], that is, when the data reading of all the sectors is completed, the error processing in the retry mode is completed.

By such error processing in the retry mode, it is possible to surely store the sector-by-sector reproduced data having no error in the buffer memory 83, and it is necessary to ensure reliability although temporal continuity is not required. It is possible to reliably reproduce certain program data and the like.

In the error processing in the no-retry mode, first, as shown in the flowchart of FIG. 15, the head of the optical disk device 81 is moved to the data reading start position and data reading is started (step S3).
1). In the next step S32, error determination processing is performed to determine whether or not an error signal is supplied from the decoder 82. If the determination result in step S32 is [NO], that is, the error signal is not supplied, the process proceeds to step S33, and if the determination result is [YES], that is, the error signal is supplied, the process proceeds to step S34 and an error occurs. Discard the sector where the occurred.

In step S33, it is determined whether or not the previous sector has already been discarded due to the error signal from the decoder 82. If the determination result in this step S33 is [NO], that is, the previous sector has not been discarded, the process proceeds to step S35, and if the determination result is [YES], that is, the previous sector has been discarded, the above step S34. And the sectors are discarded until the end of the frame containing the sector in which the error occurred.

Here, in the determination processing in step S33, the sector offset (Soffset) in the frame embedded in the header of the sector is a sector offset (offs) which is an internal variable held in the program.
et) or the frame number (Sframeno) embedded in the header of the sector is a frame number (fra) which is an internal variable held inside the program.
It is determined that the sector is abandoned if any of the following conditions is satisfied.

When the frame number (Sframeno) is changed compared to the immediately preceding sector header and the sector offset (Soffset) is not “0”, the immediately preceding sector offset (Sof is within the same frame.
fset) is not Soffset-1 Immediately after the sector satisfies the above conditions, but the sector offset (Soffset) is not "Ssize-1" In addition, the data discarding in step S34 is performed by not advancing the data pointer. Has been realized. That is, if the data pointer is not advanced, the next data is overwritten.

Further, in step S35, the sector offset (Soffset) and the frame size (Ss
It is determined whether it is not the last sector of the frame based on the size. If the determination result in step S35 is [NO], that is, the last sector of the frame, the process proceeds to step S36, the sector offset (offset) of the internal variable is set to "0", and then the process proceeds to step S37. Frame number of internal variable (fra
increment) and move to step S39. Further, the determination result in this step S35 is [Y
If it is not "ES", that is, if it is not the last sector of the frame, the process proceeds to step S38, the sector offset (offset) of the internal variable is incremented, and the process proceeds to step S39.

Then, in step S39, it is determined whether or not the data has been reproduced until the end of all the frames, based on the frame number (Sframeno).
If the determination result in step S39 is "NO", that is, if data reading is to be continued, the process returns to step S32 to perform an error determination process. If the result of the determination in step S39 is [YES], that is, if the data reading of all frames is completed, the error processing in the no retry mode is completed.

By such error processing in the no-retry mode, the reproduction data accumulated in the buffer memory 83 is updated frame by frame with the reproduction data having no error, and the temporally continuous moving image data and music data are reproduced in real time. Can be played at.

Here, as the audio data recorded on the optical disc reproduced by the optical disc device 81,
In addition to the ADPCM data described above, there is so-called PCM data obtained by analog / digital converting a voice signal.

As ADPCM data, for example, audio data recorded by representing the difference of 16-bit digital data by 4 bits is recorded by the decoder 82 and then supplied to the above-mentioned SPU 71, and the SPU 71 performs digital / analog. After processing such as conversion, the speaker 73
Used to drive the. Audio data recorded as PCM data, for example, 16-bit digital data, is decoded by the decoder 82,
It is used to drive the speaker 73.

Further, as the data recorded on the optical disc reproduced by the optical disc device 81,
There is still or moving image data.

Here, the image data is a macro block (MB: Ma) with a rectangular area of 16 × 16 pixels as one unit.
Discrete Cosine transform (DCT) for each cro block
Transform) and compression, and then variable length coding (VLC: Variable Length Coding) by Huffman coding, so-called JPEG (Joint Photgraphic Coding Experts).
Group) and MPEG (Moving Picture Experts Group) image coding methods.

As shown in FIG. 16, the reproduction of the moving image is controlled by the CPU 51, and the optical disc device 8 is operated.
The image data of the bit stream continuously reproduced at 1 is taken into the main memory 53, and the image decoder 6
It is performed by decoding in units of macro blocks (MB) by 4 and transferring to the GPU 62.

Here, the resolution and the number of frames of the moving image are determined by the development speed of the image decoder 64 and the transfer speed of the optical disk device 81. The image decoder 6
The maximum developing speed of No. 4 is 9000 macroblocks / second, and an image of 320 × 240 pixels can be expanded at a speed of 30 sheets per second. Further, the transfer speed of the optical disk device 81 can be selected from standard speed (150 KB / second degree) and double speed (300 KB / second degree). During double-speed reproduction, 30 frames / second of data can be read from the optical disc recorded by compressing the bit stream constituting one frame to 10 KB (= 300 KB / 30) or less.

Then, in the reproduction of the moving picture, for example, as shown in FIG.
As shown in FIG. 7, the image data expanded in macro block (MB) units is once transferred to the texture area on the frame buffer 63, and is drawn in the display area by texture mapping to perform texture animation.

In this way, the time-varying texture pattern is reproduced from the optical disc by the optical disc device 81, transferred to the texture area on the frame buffer 63, and the texture pattern is updated frame by frame. By executing the drawing command, it is possible to have a texture pattern larger than the main memory and change the texture pattern in real time to generate an image.

Note that, as shown in FIG. 18, the reproduction of a simple moving image is realized by sequentially transferring images expanded in macro block (MB) units to the drawing buffer with the frame buffer 63 having a double buffer structure. . At this time, the transfer of the animation can be used as an initial clearing of the background surface on which the object primitives can be drawn.

Also, the color conversion data is reproduced from the optical disk as the conversion data which changes with time by the optical disk device 81, and the CLU on the frame buffer 63 is reproduced.
The display output image data may be generated by transferring to the T area and executing the drawing command while updating the color lookup table for each frame by the GPU 62. As a result, it is possible to have color conversion data larger than the main memory and change the color conversion data in real time to generate an image.

Further, the communication controller 90 controls the communication with the CPU 51 via the bus 100.
And a controller 92 for inputting instructions from the user
Is connected to a slot 93 and two card connectors 95A and 95B to which memory cards 94A and 94B for storing game setting data are connected.
It is provided in.

The controller 92 connected to the slot 93 has, for example, 16 instruction keys for inputting an instruction from the user, and changes the state of the instruction key according to the instruction from the communication controller 91. , Is transmitted to the communication controller 91 about 60 times per second by synchronous communication. Then, the communication controller 91 changes the state of the instruction key of the controller 92 to C.
It transmits to PU51. As a result, an instruction from the user is input to the CPU 51, and the CPU 51 performs processing according to the instruction from the user based on the game program or the like being executed.

When it is necessary to store the setting data of the game being executed, the CPU 51 transmits the stored data to the communication controller 91, and the communication controller 9
1 is the data from the CPU 51, the card connector 95
The data is stored in the memory card 93A or the memory card 93B connected to the A or card connector 95B.

Here, the communication controller 91 has a built-in protection circuit for preventing electrical breakdown. The memory cards 93A and 93B are separated from the bus 100, and can be attached / detached while the apparatus main body is powered on. Therefore, if the storage capacity becomes insufficient, a new memory card can be installed without shutting off the power of the device body, and game data that needs to be backed up is not lost You can install a memory card and write the necessary data to a new memory card.

Further, the memory cards 93A, 93B
Consists of flash memory that is randomly accessible and does not require a backup power supply, and has a built-in microcomputer. This memory card 93A, 93
When B is connected to the card connector 95A or the card connector 95B, power is supplied from the main body of the apparatus to the microcomputer via the card connector.

Here, the memory cards 93A and 93B are
From the application, it is recognized as a file device identified by a 2-digit hexadecimal number that specifies a port and a card connector. In addition, this memory card 93A, 93B
Implements an automatic initialization function when opening a file.

In the microcomputer, when the memory cards 93A and 93B are connected to the card connector 95A or the card connector 95B and power is supplied from the main body of the apparatus, the internal state is first set to "not communicated". The setting is made, and then the communication via the communication controller 91 is accepted.

The CPU 51 on the apparatus main body side, based on the field indicating the "internal state" in the reply packet for confirming the connection from the card to the host in the communication protocol, uses the card connector 95A or the card connector 95B.
By testing the internal state of the microcomputer built in the memory cards 93A and 93B connected to the memory card, it is confirmed that the communication with the newly connected memory cards 93A and 93B is made in the case of "not communication". Can be recognized. And the newly connected memory card 9
The structure of file management data with 3A and 93B, for example, information such as file name, file size, slot number and status is read.

With such a communication protocol, it is possible to perform communication corresponding to the dynamic insertion / removal of the memory cards 93A and 93B.

As a result, game settings and the like can be stored in the two memory cards 93A and 93B. Further, the data can be directly copied by the two memory cards 93A and 93B, and various data can be directly taken into the apparatus main body from the two memory cards 93A and 93B at the same time.

Since the memory cards 93A, 93B are made of flash memory which is randomly accessible and does not require a backup power source, data can be semi-permanently stored.
Parallel input / output (I / O) 10 connected to the bus 100
1 and a serial input / output (I / O) 102.

The parallel I / O 101 can be connected to peripheral devices, and the serial I / O 102 can be used to communicate with other video game devices. It is like this.

By the way, the main memory 53, the GPU
62, the image decoder 64, the decoder 82, etc.,
It is necessary to transfer a large amount of image data at high speed when reading a program, displaying an image, drawing, or the like.

For this reason, in this video game device, as described above, data is directly transferred between the main memory 53, the GPU 62, the image decoder 64, the decoder 82, etc. by the control of the peripheral device control section 52 without passing through the CPU 51. So-called DMA transfer can be performed.

As a result, the CPU 51 by data transfer
The load of can be reduced, and high-speed data transfer can be performed.

In this video game device, when the power is turned on, the CPU 51 executes the operating system stored in the ROM 54.

When executed by this operating system, the CPU 51 controls the graphic system 60, the sound system 70 and the like.

When the operating system is executed, the CPU 51 initializes the entire device such as operation confirmation and then controls the optical disc control unit 80 to execute a game or the like recorded on the optical disc. Run the program.

Then, by executing the program of this game or the like, the CPU 51 controls the graphic system 60, the sound system 70, etc. according to the input from the user to display an image, generate a sound effect and a musical sound. Control.

[0099]

As described above, in the disc reproducing apparatus according to the present invention, when the data recorded in the disc-shaped recording medium for each predetermined processing unit is sequentially read and reproduced,
The control means switches the operation mode of the error processing means for performing error processing according to the detection result by the error occurrence detection means. In the first operation mode, when an error is detected by the error occurrence detection means, the error processing means reads the data of a predetermined processing unit in which the error is detected again from the disc-shaped recording medium and reproduces it. However, since the reproduction data stored in the storage means is updated with the data of the predetermined processing unit having no error and the reproduction data stored in the storage means is output, the data of the predetermined processing unit having no error is stored in the storage means. Therefore, it is possible to reliably store the program data, and to reliably reproduce the program data that does not require temporal continuity but needs to ensure reliability. Further, in the second operation mode, when an error is detected by the error occurrence detection means, the error processing means prohibits the update of the reproduction data stored in the storage means to perform a predetermined error-free processing. Since the reproduction data is updated using only unit data and the reproduction data accumulated in the storage means is output, temporally continuous moving image data and music data can be reproduced in real time.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a video game device to which the present invention has been applied.

FIG. 2 is a diagram schematically showing an example of texture patterns and polygons to be mapped.

[FIG. 3] 4 for performing drawing with a texture map
It is a figure which shows typically the content of the drawing command of a polygon.

FIG. 4 is a flowchart showing a process of forming an image for one screen in the video game device.

FIG. 5 is a diagram schematically showing representative points in the process of forming the image for one screen.

FIG. 6 is a diagram schematically showing a drawing command list created in the process of forming an image for one screen.

FIG. 7 is a diagram schematically showing texture pixels determined by performing linear interpolation in the process of forming the image for one screen.

FIG. 8 is a diagram schematically showing a result of drawing on a frame buffer in the process of forming the image for one screen.

FIG. 9 is a diagram schematically showing a switching state of frame buffers by a GPU in the video game device.

FIG. 10 is a diagram schematically showing how to specify a screen size in the video game device.

FIG. 11 is a diagram schematically showing a sprite drawing operation in the video game device.

FIG. 12 is a diagram schematically showing one texture page in the video game device.

FIG. 13 is a flowchart showing error processing by the sub CPU of the optical disc control unit in the video game device.

FIG. 14 is a flowchart showing a retry mode error process in the video game device.

FIG. 15 is a flowchart showing error processing in a no-retry mode in the video game device.

FIG. 16 is a diagram schematically showing a data flow of moving image data in the video game device.

FIG. 17 is a diagram schematically showing a moving image reproduction operation by texture transfer in the video game device.

FIG. 18 is a diagram schematically showing a moving image reproduction operation by direct transfer in the video game device.

[Explanation of symbols]

 50 control system 51 CPU 52 peripheral device control unit 53 main memory 54 ROM 60 graphic system 61 GTE 62 GPU 63 frame buffer 64 image decoder 65 display device 70 sound system 71 SPU 72 sound buffer 73 speaker 80 optical disc control unit 81 optical disc device 82 decoder 83 buffer memory 90 communication controller 91 communication controller 92 controller 93 slot 94A, 94B memory card 95A, 95B card connector 100 bus 101 parallel I / O 102 serial I / O

Claims (3)

[Claims] 1. A disk reproducing apparatus for sequentially reading and reproducing data recorded on a disk-shaped recording medium for each predetermined processing unit, the storage means accumulating and outputting the reproduced data, and the reproducing means. The first operation mode includes an error occurrence detection unit that detects an error, an error processing unit that performs error processing according to a detection result of the error occurrence detection unit, and a control unit that switches the operation mode of the error processing unit. Then, when an error is detected by the error occurrence detection means, the error processing means reads again the data of the predetermined processing unit in which the error is detected from the disc-shaped recording medium and reproduces the data, and a predetermined error-free The reproduction data stored in the storage means is updated with the data of the processing unit, and in the second operation mode, the error occurrence detection means When an error is detected, the error processing means prohibits the reproduction data stored in the storage means from being updated, and the reproduction data is updated using only data of a predetermined processing unit without error. A disc reproducing device characterized by. 2. A disk reproducing apparatus for sequentially reading and reproducing image data recorded on a disk-shaped recording medium, wherein one frame is divided into a plurality of predetermined processing units and recorded, wherein the error processing means comprises the second 2. The disk reproducing apparatus according to claim 1, wherein, in the operation mode, when the error occurrence detecting means detects an error, updating of the reproduction data is prohibited in frame units. 3. The control means switches the error processing means to the first operation mode when reproducing the program data recorded on the disk-shaped recording medium, and the image recorded on the disk-shaped recording medium. 3. The disc reproducing apparatus according to claim 2, wherein the error processing means is switched to the second operation mode when reproducing the data.