JPH08125197A - Method and system for fabricating semiconductor device - Google Patents

Abstract

PURPOSE: To increase the S value and the field effect mobility while enhancing the breakdown strength of a gate insulation film itself by carrying out the annealing at a specified temperature in an atmosphere containing a nitrogen oxide being excited or decomposed with ultraviolet ray thereby reducing the recombination center on the interface of the gate insulation film and an active layer. CONSTITUTION: A gate insulation film 15, principally comprising a thermal oxide film deposited over an insular crystalline silicon region or a silicon oxide deposited on the insular silicon region by CVD or PVD, is subjected to annealing at 400-700 deg.C in an atmosphere containing a nitrogen oxide being excited or decomposed with ultraviolet ray. Consequently, the interface characteristics between an active layer and the gate insulation film 15 can be improved and the recombination center can be reduced on the interface between the gate insulation film 15 and the active layer. As a result, the S value and the field effect mobility can be increased and the breakdown strength of the gate insulation film itself can be enhanced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an insulating substrate such as glass,
Alternatively, a semiconductor device having an insulating gate structure using a silicon film provided on an insulating film formed on various substrates, for example, a thin film transistor (TFT) or a thin film diode (TFD), or a thin film integrated circuit to which they are applied In particular, the present invention relates to a thin film integrated circuit for an active type liquid crystal display device (liquid crystal display) and a method for manufacturing the same, and in particular, manufacture of a semiconductor device for forming the semiconductor device by a low temperature process having a maximum process temperature of 700 ° C. or lower. Regarding the method.

[0002]

2. Description of the Related Art In recent years, semiconductor devices having TFTs on an insulating substrate such as glass, for example, active type liquid crystal display devices using TFTs for driving pixels and image sensors have been developed. These substrates have a strain point of 750 ° C. or less, typically 550 to 680, from the viewpoint of mass productivity and price.
A glass substrate at ℃ is generally used. Therefore,
When using such a glass substrate, the maximum process temperature was required to be 700 ° C. or lower, preferably 650 ° C. or lower.

Thin film silicon semiconductors are generally used for TFTs used in these devices. The thin-film silicon semiconductor is roughly classified into two, that is, an amorphous silicon semiconductor (a-Si) and a crystalline silicon semiconductor. Amorphous silicon semiconductors are the most commonly used because they have a low manufacturing temperature, can be relatively easily manufactured by a vapor phase method, and have high mass productivity. Since the physical properties are inferior to those of crystalline silicon semiconductors, in order to obtain higher speed characteristics in the future,
There is a strong demand for establishment of a method for manufacturing a TFT made of a crystalline silicon semiconductor.

TFT using amorphous silicon having low mobility
In this case, the characteristics of the gate insulating film did not pose a problem. For example, in a TFT using amorphous silicon, a silicon nitride film having electric characteristics inferior to that of silicon oxide is used as a gate insulating film. However, in a TFT using a crystalline silicon film having high mobility, the characteristics of the gate insulating film are as much a problem as the characteristics of the silicon film itself.

In particular, as the technique for obtaining a crystalline silicon film has improved, the demand for a good-quality gate insulating film has greatly increased. In particular, even if the channel forming region is substantially made of one single crystal or a plurality of crystals, a TFT made of a crystalline silicon film in which all the crystals have the same orientation (such a crystalline state is called a monodomain) In contrast, unlike a normal TFT using polycrystalline silicon, the contribution to the deterioration of the characteristics of the grain boundaries is very small, and the electrical characteristics are almost determined by the characteristics of the gate insulating film.

That is, in the ordinary polycrystalline structure, the two crystals constituting the grain boundary have different crystallographic orientations, and as a result, a high grain boundary barrier is generated. However, in the mono-domain structure, even if it is composed of a plurality of crystals, two crystals sandwiching a boundary corresponding to a grain boundary in a normal polycrystal have the same crystal orientation, and therefore, in such a boundary, The barrier is very low, almost no difference from single crystals. Therefore, in the monodomain structure, the contribution of the grain boundaries to the TFT characteristics is small and is almost determined by the gate insulating film.

A thermal oxide film is known as an excellent gate insulating film suitable for such a purpose. For example, a gate insulating film could be obtained by using a thermal oxidation method on a substrate such as a quartz substrate that can withstand high temperatures. (For example, Japanese Examined Patent Publication No. 3-71793) However, in order to obtain a silicon oxide film that can be used as a gate insulating film by a thermal oxidation method, a high temperature of 950 ° C. or higher is necessary, and such a high temperature treatment can be endured. The only substrate material was quartz. In order to use a glass substrate having a low strain point as described above, it was necessary to set the maximum process temperature to 700 ° C. or lower, preferably 650 ° C. or lower, but the method by thermal oxidation could not satisfy this requirement. .

[0008]

A thermal oxide film could be formed even under 700 ° C. or below under special conditions such as high pressure steam oxidation. For example, a thermal oxide film could be formed at 100 to 1000 Å by thermal oxidation at 500 to 700 ° C. However, the thermal oxide film thus obtained has a higher hydrogen concentration than the thermal oxide film obtained at a high temperature, and the characteristics of the TFT using this as a gate insulating film were extremely poor. Due to these problems, the gate insulating film is formed by physical vapor deposition (PVD) such as sputtering, plasma CVD, thermal C
It had to be manufactured by using a chemical vapor deposition (CVD) method such as a VD method. With these methods, the maximum process temperature could be 650 ° C. or lower.

However, the insulating film produced by the PVD method or the CVD method has a high concentration of dangling bonds and hydrogen, and has poor interface characteristics. Therefore, it is weak against injection of hot electrons and the like, and it is easy for charge trap (recombination) centers to be formed due to dangling bonds and hydrogen. Moreover, the breakdown voltage was low. In particular, many recombination centers were formed at the interface with crystalline silicon. Therefore, when it is used as a gate insulating film of a TFT, the electric field mobility and the subthreshold characteristic value (S value) are not good, or the leak current of the gate electrode is large and the on current decreases (deteriorates).・ There was a problem that the change over time was large.

For example, in the case of using the sputtering method which is the PVD method, if synthetic quartz composed of high-purity oxygen and silicon is used as a target, in principle only a film of a compound of oxygen and silicon is formed. However, it was extremely difficult to obtain a silicon oxide film in which the ratio of oxygen to silicon in the obtained coating is close to the stoichiometric ratio and the number of dangling bonds is small. For example, when oxygen is used as the sputtering gas, a silicon oxide film having a stoichiometric ratio can be obtained. However, oxygen has a small atomic weight and a low sputtering rate (deposition rate), and is unsuitable as a sputtering gas in consideration of mass production.

Further, although a sufficient film formation rate was obtained in an atmosphere of argon or the like, the ratio of oxygen to silicon was different from the stoichiometric ratio, which was extremely unsuitable as a gate insulating film. Furthermore, it is difficult to reduce the dangling bonds of silicon whatever the sputter atmosphere, and hydrogen annealing is performed after the film formation to remove dangling bonds of silicon Si. -OH
As a result, it was necessary to stabilize. However, Si-H and Si-OH bonds are unstable, and are easily broken by accelerated electrons such as hot electrons,
It has changed to the original dangling bond of silicon. The existence of such weakly bonded Si-H and Si-OH is a factor that causes the deterioration due to the hot electron injection.

Similarly, a silicon oxide film formed by the plasma CVD method also contains a large amount of hydrogen in the form of Si--H and Si--OH, which has been a source of the above problems.
In addition, when tetra-ethoxy-silane (TEOS) is used as a silicon source that is relatively easy to handle, there is a problem that carbon is contained in the silicon oxide film. The present invention
The present invention provides a means for improving the characteristics of the silicon oxide film deposited by the PVD method or the CVD method.

[0013]

In the present invention, 500 to 7 are used.
A thermal oxide film formed by oxidizing a silicon film at a temperature of 00 ° C., or an insulating film containing silicon oxide as a main component deposited by PVD method or CVD method covering island-shaped crystalline silicon. On the other hand, the silicon oxide film is modified by performing thermal annealing at 400 to 700 ° C. in a highly reactive gas atmosphere containing nitrogen oxides excited by ultraviolet light or photolyzed. It is characterized by being used as a gate insulating film. The nitrogen oxide used in the present invention includes nitrogen oxides such as dinitrogen monoxide (N ₂ O), nitric oxide (NO), and nitrogen dioxide (N ₂ O) (NO _x : 0.5 in the general formula). ≦ x ≦ 2.5)
Is preferred.

However, it is not preferable that water (H ₂ O) or carbon dioxide (CO, CO ₂ etc.) is mixed in this atmosphere. Water or carbon dioxide is less than 1ppm, preferably 10p
Should be below pb. In addition, if necessary, after the annealing step with the above nitrogen oxide, ammonia (NH ₃ ) similarly excited or decomposed by ultraviolet light,
Hydrogen nitride such as hydrazine (N ₂ H ₄ ) (N in the general formula
H _x : 1.5 ≦ x ≦ 3) is introduced, and 400 to
Thermal annealing at 700 ° C. may be performed. Also in this case, water (H ₂ O) and carbon dioxide (CO, CO ₂ ) in the atmosphere
Etc.) should be below 1 ppm, preferably below 10 ppb.

In the following, in the present invention, a gas containing nitrogen oxide (or hydrogen nitride) excited or decomposed by ultraviolet light is referred to as reactive nitrogen oxide (reactive hydrogen nitride). In the present invention, the reactive nitrogen oxide (or reactive hydrogen nitride) is nitrogen oxide (hydrogen nitride).
It may be composed of only one or may be mixed with argon or other inert gas. The thermal annealing using such reactive nitrogen oxide or reactive hydrogen nitride improves the characteristics of the silicon oxide film, especially the characteristics at the interface with the silicon film.

Before and after the step of thermal annealing using the reactive nitrogen oxide or hydrogen nitride as described above, normal hydrogen nitride, nitrogen oxide, or hydrogen (having a low concentration of excited molecules and active species) is used. Thermal annealing may be performed in an atmosphere of oxygen, ozone, or the like. An example of a device for carrying out the present invention is shown in FIG. In order to carry out the present invention, a first reaction chamber 1 for exciting nitrogen oxides or hydrogen nitride by ultraviolet light, and reactive nitrogen oxides or hydrogen nitride obtained by the first reaction chamber are introduced. A second reaction chamber is required to thermally anneal the gate insulating film at a temperature of 400 to 700 ° C. In FIG. 1A, 1 is a first reaction chamber and 2 is a second reaction chamber. It is desirable that these reaction chambers and the pipes between them be kept at an appropriate temperature. Although only the heater 3 for heating the second reaction chamber 2 is shown in FIG. 1A, a heater for heating the first reaction chamber 1 and the pipe may be provided.

In the first reaction chamber, it is preferable to have a structure in which ultraviolet light is irradiated as much as possible in order to make the gas reactive. A conceptual diagram of the first reaction chamber is shown in FIG.
It is preferable to have a structure in which a pipe 6 (which is preferably synthetic quartz) for transmitting ultraviolet light for introducing gas is bent, and an ultraviolet light source (for example, a low pressure mercury lamp) is arranged between them. FIG. 1C shows a cross section taken along the dotted line in FIG. 1B, in which a low pressure mercury lamp 7 is arranged between pipes 6. The temperature of the first reaction chamber may be room temperature, but
It is more preferable that the temperature is kept at 00 to 700 ° C. Further, for the purpose of avoiding temperature distribution and fluctuation in the second reaction chamber, it is ideal that the temperature of the first reaction chamber is kept the same as the temperature of the second reaction chamber.

In the present invention, the lower limit of the temperature of the second reaction chamber is determined by the reaction rate, and the upper limit thereof is determined by the substance to be heat treated such as the substrate. In view of these, the temperature of the second reaction chamber is 400 ~ 700 ° C, preferably 450-650
℃ is appropriate. The higher the temperature of the second reaction chamber, the easier the reaction proceeds, but when a glass substrate is used, for example, heat shrinkage may occur. Especially 650
At 700 ° C., many glass substrates cause heat shrinkage, which becomes a problem in forming a fine pattern. When a glass substrate is used, it is desirable that the temperature is below the strain point.

When the temperature of the pipe between the first reaction chamber and the second reaction chamber is extremely low, the gas molecules excited in the first reaction chamber return to the ground state and the reactivity decreases. Therefore, in order to maintain the reactivity, it is desirable that the temperature be maintained at an appropriate temperature even in the piping. Further, it is desirable that the inner wall of the pipe is made of a material containing quartz as a main component so that reactive gas molecules do not react. It is preferable to use high-purity quartz composed of 90 mol% or more of silicon oxide.

When the inner wall is made of a metal material, atomic or excited molecules are returned to the ground state or recombined to be stabilized and become unreactive. However, when the inner wall is made of quartz, such an effect is small, and for example, many atoms and molecules were in an activated state even if the inner wall was 50 to 100 cm away from the first reaction chamber. A large number of substrates 5 may be placed on the susceptor 4 in the second reaction chamber 2 so that a large number of substrates can be processed at one time. It is also effective to make the pressure of the atmosphere in the second reaction chamber lower than atmospheric pressure.

As a method of forming the gate insulating film in the present invention, for example, a PVD method is a sputtering method, and a CVD method.
As a method, a plasma CVD method, a low pressure CVD method, or an atmospheric pressure CVD method may be used. Other film forming methods can also be used. As the plasma CVD method and the low pressure CVD method, a method using TEOS as a raw material may be used. In order to deposit a silicon oxide film using TEOS and oxygen as raw materials by the plasma CVD method, the substrate temperature is preferably 200 to 500 ° C. In the low pressure CVD method, TE
The reaction between OS and ozone is relatively low (for example, 37
5 ° C. ± 20 ° C.), and a silicon oxide film free from plasma damage can be obtained. Similarly, by the low pressure CVD method, a silicon oxide film which is not damaged by plasma can be obtained by using monosilane (SiH ₄ ) and oxygen (O ₂ ) or monosilane and nitrogen oxide such as dinitrogen monoxide as raw materials.

A combination of monosilane and a nitrogen oxide such as dinitrogen monoxide may be used in the plasma CVD method. Further, among the plasma CVD methods, the ECR-CVD method using discharge under ECR (electron cyclotron resonance) conditions is less damaged by plasma, so that a better gate insulating film can be formed. According to the inventor's knowledge, an insulating film containing silicon oxide, which is somewhat hard, as a main component is suitable as a gate insulating film of a TFT. As a specific index, the etching rate by buffered hydrofluoric acid at 23 ° C. mixed at a ratio of hydrofluoric acid 1, ammonium fluoride 50, and acetic acid 50 is 1000 Å / min or less, typically 300 to 800 Å
It has been revealed that a silicon oxide film having a rate of 1 / min is preferable. Many silicon oxide films containing nitrogen of 1 × 10 ¹⁷ to 1 × 10 ²¹ atoms / cm ^{3 on} average satisfy such an etching rate condition.

In order to form crystalline silicon to be an active layer in the present invention, C such as plasma CVD method or low pressure CVD method is used.
An amorphous silicon film obtained by the VD method is used as a starting material, and there are roughly two crystallization methods. First, after forming an amorphous silicon film,
This is a method of crystallizing by performing thermal annealing at a temperature of 650 ° C. for an appropriate time. An element that promotes crystallization of amorphous silicon such as nickel, iron, platinum, palladium, or cobalt may be added during the crystallization. When these elements are added, the crystallization temperature can be lowered and the crystallization time can be shortened.

If these elements are contained in a high concentration, the semiconductor characteristics of silicon will be impaired. Therefore, it is desirable that these elements have a low concentration sufficient for crystallization and having little influence on the semiconductor characteristics. That is, secondary ion mass spectrometry (SIM
The minimum value in the silicon film measured by S) is 1 × 10
The concentration is preferably ^{15 to} 3 × 10 ¹⁹ atoms / cm ³ . Since the concentration distribution of such an element that promotes crystallization varies depending on the method of processing the silicon film, the minimum value may be obtained at the interface or in the vicinity of the center of the film. The second method is to crystallize the amorphous silicon film by irradiating it with intense light such as a laser.
There is a so-called laser annealing method. First, second
Which of the above methods should be selected may be determined in consideration of the characteristics of the TFT required for implementing the present invention, available equipment, the amount of capital investment, and the like.

Further, the first method and the second method may be combined. For example, after crystallizing by thermal annealing, a method of further enhancing crystallinity by laser annealing may be used. In particular, when thermal anneal was performed by adding a crystallization-promoting element such as nickel, it was observed that an amorphous portion was left in the crystal grain boundaries. The laser annealing method is effective for converting the material. On the contrary, by thermally annealing the silicon film crystallized by the laser annealing method, the stress strain of the film generated by the laser annealing can be relaxed.

Further, it is effective to perform treatment by irradiation with UV light in an atmosphere containing nitrogen oxide, oxygen or nitrogen before forming the gate insulating film. By performing this treatment, the charge trap centers and the charge density at the interface between the active layer and the gate insulating film can be reduced. It is useful to perform heating at 400 ° C. to 700 ° C. at the same time for this UV light irradiation.

It can be understood that the process before forming the gate insulating film is a process of cleaning the surface of the active layer (island semiconductor region). When nitrogen oxide or oxygen is used, it can be said that this is a step of forming a thin oxide film on the surface simultaneously with cleaning.

In order to maximize the effect of cleaning the surface of the active layer by performing the treatment by irradiation with UV light in the atmosphere containing nitrogen oxide, oxygen or nitrogen,
It is important to maintain a clean atmosphere until the next step of forming the gate electrode.

By carrying out this treatment, the surface of the active layer can be washed, and the generation of recombination centers and unnecessary charges due to organic substances existing on the surface of the active layer can be suppressed. In addition, the action of active nitrogen or oxygen (particularly oxygen) can neutralize dangling bonds on the surface of the active layer and suppress the existence of unnecessary levels.

In the above structure, nitrogen oxide or oxygen or nitrogen may contain ammonia or hydrazine.

Further, two or more kinds of gases selected from nitrogen oxide, oxygen and nitrogen may be used as the atmosphere.

Further, it is very effective to perform the processing disclosed in the present specification after the formation of the gate insulating film in combination with the processing performed before the formation of the gate insulating film.

[0033]

The thermal oxide film obtained by oxidation at a low temperature of 500 to 700 ° C. and the silicon oxide film formed by the CVD method or PVD method have many dangling bonds of silicon or S.
It contains i-H bond and Si-OH bond. When such a silicon oxide film is treated at a high temperature of 800 ° C. or higher in a dinitrogen monoxide atmosphere, Si—H bonds in silicon oxide are nitrided or oxidized, and Si≡N, or Si ₂ ═N—O bond, Si -Change to N = O bond or the like. The Si-OH bond changes as well. In particular, this reaction easily proceeds at the interface between silicon oxide and silicon, and as a result, nitrogen is concentrated at the silicon oxide-silicon interface. The amount of nitrogen concentratedly added near the interface by such means is 10 times or more the average concentration of the silicon oxide film. Further, 0.1 to 10 atom% in silicon oxide,
Typically, it is preferable for the gate insulating film to contain 1 to 5 atomic% of nitrogen.

However, at a low temperature of 750 ° C. or lower,
Such a reaction did not proceed. This is because dinitrogen monoxide is not decomposed at such a low temperature, and thus active atoms / molecules that penetrate into the silicon oxide film could not be obtained. That is, in the above reaction,
The decomposition reaction of nitrous oxide was rate limiting. The same applies to other nitrogen oxides such as nitric oxide and nitrogen dioxide even if the optimum temperature is different.
It was impossible to modify the silicon oxide film and the interface between the silicon oxide film and the active layer at 0 to 700 ° C., preferably 450 to 650 ° C.

However, when nitrogen oxide is made reactive, active atoms / molecules are contained therein, so that it penetrates into the inside of the silicon oxide film even at a temperature of 700 ° C. or lower, It causes the above reaction. The present invention focuses on the fact that reactive nitrogen oxides can be retained for a long time and moved spatially under appropriate conditions. That is, the nitrogen oxide which has been made reactive by irradiation with ultraviolet light can be introduced into the reaction chamber at 400 to 700 ° C. and reacted with the gate insulating film. In the present invention, 400 to 70 is used for thermal annealing.
Although a temperature of 0 ° C. is necessary, this temperature is not a temperature for decomposing nitrogen oxides, but a temperature necessary for active atoms / molecules to enter the silicon oxide film.

A similar phenomenon occurs in an atmosphere of hydrogen nitride such as ammonia or hydrazine. For example, when annealing a silicon oxide film deposited by a CVD method or a PVD method at a high temperature of 850 ° C. or higher in an ammonia atmosphere,
The dangling bonds of Si, the Si-H bond and the Si-OH bond are nitrided and changed to Si≡N or the like. This reaction also does not proceed below 650 ° C, but this is due to the decomposition of ammonia,
This is because a high temperature of 850 ° C. or higher is required to obtain active nitrogen atoms.

Therefore, if ammonia is made reactive beforehand, the nitriding reaction proceeds even at a low temperature of 400 to 700 ° C. Note that in the treatment with hydrogen nitride, Si—H bonds and Si═O bonds may be nitrided, resulting in Si—N = H ₂ . This is true even if it is not reactive. Such a bond is then annealed in an atmosphere of dinitrogen monoxide to form an extremely stable Si≡N bond or Si-N = O.
Converted to a join.

The reaction with the gate insulating film is different when hydrogen nitride is used and when nitrogen oxide is used.
This will be described with reference to FIG. In FIG. 7, a shows the nitrogen concentration of a silicon oxide film deposited on the active layer of crystalline silicon by the sputtering method, analyzed by the secondary ion mass spectrometry (SIMS). The quantitative value is effective only in the silicon oxide (gate insulating film) portion and contains 1 × 10 ¹⁸ atoms / cm ³ of nitrogen. A peak in the nitrogen concentration is observed near the interface between the active layer and the gate insulating film. This is due to the effect of the discontinuity of the material (matrix effect), and the nitrogen concentration does not actually increase at the interface. Absent.

First, this is annealed in a nitrogen monoxide atmosphere for 1 hour using the apparatus shown in FIG. At this time, both the first and second reaction chambers are set to 600 ° C. When the silicon oxide film thus treated is similarly analyzed by SIMS, it becomes as shown in FIG. 7B. As a result of the treatment with nitrous oxide, a peak of nitrogen concentration is observed at the interface as in the case of a, but the maximum value is two orders of magnitude larger than that of a. This means that the matrix effect actually contributes, but more than that, nitrogen actually accumulates near the interface.

When nitrogen is accumulated at the interface in this way to form a silicon oxynitride film, bonds between atoms become stronger,
Even if hot electrons are injected, this reduces the possibility of defects. In this way, the physical properties of the gate insulating film can be improved. Although sufficient effect can be obtained by this alone, a larger effect can be obtained by performing annealing using hydrogen nitride excited or decomposed by ultraviolet light such as ammonia.

After the above nitrous oxide anneal, again using the apparatus of FIG. Anneal in an ammonia atmosphere for 1 hour. The temperature of the first and second reaction chambers is 600
℃. The silicon oxide film that has been subjected to such a treatment is used as a SIM.
When analyzed by S, the result is as shown in FIG. That is, the nitrogen concentration is increased in the entire gate insulating film, and it is not particularly observed that it is concentrated on the interface. As described above, by performing the ammonia treatment, silicon oxide becomes silicon oxynitride. As a result, the breakdown voltage of the entire film is improved.

The effect is particularly remarkable when the present invention is applied to a silicon oxide film formed by a sputtering method (in particular, a silicon oxide film in which the oxygen concentration in the film is lower than the stoichiometric ratio). That is, when such a film is annealed in a reactive nitrogen oxide atmosphere, it is possible to make up for the lack of oxygen,
This is because the composition of the silicon oxide film can be brought close to the stoichiometric ratio. Similarly, in annealing in a reactive hydrogen nitride atmosphere, nitrogen enters the position where oxygen should enter, so that an electrically stable silicon oxynitride film is formed.

The above shows that the formation of the silicon oxide film by the sputtering method is not disadvantageous. That is,
Conventionally, to form a silicon oxide film by a sputtering method,
In order to bring the composition close to the stoichiometric ratio, it was possible to perform it only in an atmosphere of limited conditions. For example, considering a system of a mixed atmosphere of oxygen and argon as the atmosphere, it is necessary to satisfy the condition of oxygen / argon> 1, and it is preferable to carry out in a pure oxygen atmosphere. Therefore, the film forming rate was low and it was not suitable for mass production. Further, oxygen is a reactive gas, and there is a problem that the vacuum device, the chamber and the like are oxidized.

However, according to the present invention, even a silicon oxide film having a composition deviating from the stoichiometric composition can be converted into a silicon oxide film suitable for use as a gate insulating film according to the present invention. Even in an atmosphere system, it can be carried out under more advantageous conditions regarding the film formation rate, such as oxygen / argon ≦ 1. For example, it is possible to form a film under stable conditions with a very high film forming rate as in a pure argon atmosphere.

The present invention is applied to a CVD method such as plasma CVD method or low pressure CVD method using a silicon source containing carbon such as TEOS.
When applied to a silicon oxide film formed by the method, a special effect can be obtained. A large amount of carbon is contained in these silicon oxide films, and in particular, carbon existing near the interface with the silicon film was a cause of deterioration of TFT characteristics. When the oxidation is advanced by the annealing in the reactive nitrogen oxide atmosphere of the present invention, carbon is also oxidized at that time and is released to the outside as carbon dioxide gas, whereby the carbon concentration in the film can be reduced.

This process will be described with reference to FIG. In this example, dinitrogen monoxide is used as the nitrogen oxide. Reactive dinitrogen monoxide contains a large amount of atomic nitrogen and oxygen. These can easily enter the inside of the silicon oxide film. Then, carbon existing in the inside of silicon oxide (mostly in the form of Si—C bond) and atomic oxygen are combined into chemically extremely stable carbon dioxide gas, which is discharged to the outside. On the other hand, silicon bonded to carbon has dangling bonds, which are nitrided and converted into Si—N bonds.

When the present invention is applied to an active layer made of a crystalline silicon film crystallized by adding an element such as nickel, cobalt, iron, platinum or palladium which promotes crystallization of the amorphous silicon film. Has a special effect on. The crystallinity of the silicon film crystallized by adding such a crystallization-promoting element was extremely good, and the field effect mobility was very high. Good things were desired. The gate insulating film according to the present invention is suitable for this. In addition, the annealing step of the present invention can crystallize the amorphous regions remaining in the crystal grain boundaries and further improve the crystallinity.

When the present invention is applied to an active layer using a laser-annealed silicon film, in addition to the effect of improving the characteristics of the gate insulating film during the annealing step of the present invention, the laser is used. It also has an effect that the strain on the silicon film generated by the annealing can be simultaneously relaxed in the annealing step. Further, when it is used for a silicon film having an extremely good crystallinity such as a mono-domain structure, the gate insulating film is required to have characteristics equivalent to those of the thermal oxide film, but the thermal oxide film processed by the present invention, CVD Oxide film, PV
The D oxide film is suitable for that purpose.

[0049]

【Example】

[Embodiment 1] This embodiment is shown in FIG. This embodiment is an example in which a silicon oxide film formed by a sputtering method is used as a gate insulating film and the thermal annealing according to the present invention is performed to form an N-channel TFT. First, a silicon oxide film is formed on the substrate 11 (Corning 7059, 100 mm × 100 mm) as a base oxide film 12 by a sputtering method.
˜3000 Å, for example 2000 Å was deposited. The underlying silicon oxide film 12 is for preventing contamination from the substrate. The silicon oxide film was thermally annealed at 640 ° C. for 4 hours in an oxygen atmosphere or a dinitrogen monoxide atmosphere to stabilize the surface condition.

Next, an amorphous silicon film having a thickness of 100 to 1500 Å, for example, 500 Å, was formed by the plasma CVD method.
Then, a small amount of an element that promotes crystallization, such as nickel, iron, platinum, palladium, or cobalt, was added to the amorphous silicon film and annealed to obtain a crystalline silicon film 13. In this example, a nickel acetate solution was dropped onto the amorphous silicon film and spin-dried to form an extremely thin film of nickel acetate on the amorphous silicon film. After that, nickel was introduced into the amorphous silicon film and crystallized by performing thermal annealing at 550 ° C. for 4 hours in a nitrogen atmosphere. After the above steps, laser annealing may be further performed to improve the crystallinity of the obtained crystalline silicon film. (Fig. 2 (A))

Next, the crystalline silicon film 13 was etched to form an island-shaped silicon film 14. This island-shaped silicon film 1
Reference numeral 4 is an active layer of the TFT. Then, a gate insulating film 15 having a thickness of 200 is formed so as to cover the island-shaped silicon film 14.
A silicon oxide film having a thickness of ˜1500 Å, for example 1000 Å, was formed by the sputtering method. In this example, a silicon oxide film was formed by using a synthetic quartz target and performing sputtering in an oxygen atmosphere. Argon may be used as the sputtering gas. In this example, the pressure of the sputtering gas was 1 Pa and the input power was 35.
The temperature was 0 W and the substrate temperature was 200 ° C.

After forming the gate insulating film 15, the annealing treatment of the present invention was performed to improve the characteristics of the gate insulating film, particularly the interface between the gate insulating film and the active layer. In this example, the device shown in FIG. 1 was used. Further, dinitrogen monoxide was used as the gas used for the annealing. In this embodiment, the temperature of the first reaction chamber 1 is 500 to 650.
The temperature of the second reaction chamber 5 is preferably 500 ° C to 650 ° C. In this example, both were set to 550 ° C. The temperature of the pipe between them was also set to 550 ° C.

The pressure in each reaction chamber is preferably 0.5 to 1.1 atm, but a reduced pressure atmosphere may be used. In this embodiment, the pressure is 1 atm. The flow rate of nitrous oxide was 5 liters / minute in this example. Further, the thermal annealing time is 0.5 to 6 hours, for example, 1 hour in this embodiment. As the ultraviolet light source in the first reaction chamber 1, a low pressure mercury lamp having a central wavelength of 246 nm was used. As a result of this treatment, hydrogen in the silicon oxide film and at the interface with the silicon film was nitrided or oxidized to decrease, and conversely, the nitrogen concentration at the interface increased. (FIG. 2 (B))

Then, an aluminum (containing 1 wt% Si or 0.1 to 0.3 wt% Sc) film having a thickness of 3000 Å to 2 μm, for example 5000 Å, is formed by the sputtering method, and is patterned to form a gate. Electrode 1
6 was formed. Then, the substrate was immersed in a 1% to 3% ethylene glycol solution of tartaric acid adjusted to pH≈7 with ammonia, and anodization was performed using platinum as a cathode and this aluminum gate electrode 16 as an anode. The anodization was completed by first increasing the voltage to 140 V with a constant current and maintaining the state for 1 hour. Thus, an anodic oxide having a thickness of about 2000Å was formed. (Fig. 2 (C))

After that, phosphorus was injected as an impurity into the island-shaped silicon film 14 in a self-aligning manner by ion doping using the gate electrode 16 as a mask. At this time, the dose amount is 1
× 10 ¹⁴ to 8 × 10 ¹⁵ atoms / cm ² , accelerating voltage of 50 to
90kV was preferred. In this embodiment, the dose amount is 1
× 10 ¹⁵ atoms / cm ² , accelerating voltage was 80 kV. As a result, the N-type impurity region (source / drain region) 1
7 was formed. (FIG. 2D) Further, the doped impurity regions were activated by irradiation with laser light. As laser light,
KrF excimer laser (wavelength 248 nm, pulse width 2
0 nsec) and energy density is 200-40
It was set to 0 mJ / cm ² , for example, 250 mJ / cm ² .

After that, a silicon oxide film is formed as an interlayer insulating film 18 on the entire surface by plasma CVD to form 3000 Å.
The interlayer insulating film 18 and the gate insulating film 15 were etched to form contact holes in the source / drain regions 17. Further, an aluminum film is formed by a sputtering method.
A 000Å film was formed and this was etched to form the source / drain electrodes 19 and 20. N by the above process
A channel type TFT was manufactured. (Fig. 2 (E))

Since the TFT thus formed has excellent resistance of the gate insulating film, it is possible to obtain a TFT having little deterioration and excellent characteristics. For example, drain voltage +
Fixed to 14V, gate voltage from -17 to + 17V,
It was varied and the deterioration of the characteristics of the TFT was evaluated. The field-effect mobility μ ₀ obtained by the first measurement and the field-effect mobility μ ₁₀ obtained by the measurement after applying the above voltage are 1
Defining − (μ ₁₀ / μ ₀ ) as the deterioration rate, the deterioration rate of the TFT obtained in this example was 1.3%. For comparison, the thermal annealing process of the gate insulating film of the present invention is performed at 550 ° C./3 in a nitrogen atmosphere instead of a dinitrogen monoxide atmosphere.
In the case of performing the annealing treatment for a time, the deterioration rate was as high as 52.3% even under the same other manufacturing conditions.

[Embodiment 2] This embodiment is shown in FIG. In the present embodiment, a silicon oxide film deposited by a plasma CVD method using TEOS and oxygen as source gases is used as a gate insulating film, and thermal annealing according to the present invention is applied to the CMOS.
It is an example of forming a TFT of a mold. First, the substrate 21 (NH
A silicon oxide film was formed as a base oxide film 22 on a techno glass NA35, 100 mm × 100 mm) by a sputtering method to a thickness of 2000 Å.

Next, an amorphous silicon film having a thickness of 500 Å was formed by the plasma CVD method. Then, as in Example 1,
A nickel acetate film was formed on the amorphous silicon film by spin-drying the nickel acetate solution. Then, in a nitrogen atmosphere, thermal annealing is performed at 550 ° C. for 4 hours to introduce nickel into the amorphous silicon film and crystallize it. After that, in order to further improve the crystallinity, a KrF excimer laser (wavelength 248n
Laser annealing was performed using m). The appropriate energy density of the laser is 250 to 350 mJ / cm ² . In this embodiment, it is set to 300 mJ / cm ² . The crystalline silicon film 23 could be obtained as described above.
The crystalline silicon film thus obtained has relatively large (-10 μm □) crystal grains, and is several times to 10 times that size.
It had a monodomain structure showing the same crystal orientation in the range of several times. (Fig. 3 (A))

Next, the crystalline silicon film 23 was etched to form island-shaped silicon films 24 and 25. The island-shaped silicon films 24 and 25 are to be active layers of the TFT. In this embodiment, the active layer was formed randomly, but TF was formed in the active layer.
In many cases, the channel formation region of T had a monodomain structure. Then, a gate insulating film 26 having a thickness of 200 to 15 is formed so as to cover the island-shaped silicon films 24 and 25.
A silicon oxide film of 00Å, for example, 1000Å, was formed. In this example, a silicon oxide film was formed by a plasma CVD method using TEOS and oxygen as source gases.
At this time, as film forming conditions, the gas pressure was 4 Pa, the input power was 150 W, and the substrate temperature was 350 ° C.

After forming the gate insulating film, the annealing treatment of the present invention was performed to improve the characteristics of the gate insulating film, particularly the interface between the gate insulating film and the active layer. In this example, first, the substrate was placed in the thermal annealing apparatus shown in FIG. 1, hydrogen was first flown into the reaction chamber 2, and thermal annealing was performed at 350 ° C. for 2 hours. As a result, the unpaired bond existing in the silicon oxide film could be filled with hydrogen. Next, a mixed gas of dinitrogen monoxide and argon (dinitrogen monoxide: argon = 1:
1) was poured. The temperature of the second reaction chamber was 600 ° C.
The pressure in the reaction chamber is 1 atm, and the flow rate of the reaction gas is 8 liters /
Minutes, and the thermal annealing time was 1 hour.

Through the above steps, hydrogen in the silicon oxide film and at the interface with the silicon film was nitrided or oxidized and reduced. At this time, since TEOS was used as the source gas, the silicon oxide film before thermal annealing contained carbon.
This carbon was also oxidized and released as carbon dioxide gas and decreased. Thus, a silicon oxide film which is preferable as a gate insulating film could be obtained. (FIG. 3 (B)) After that, a polycrystalline silicon film having a thickness of 6000Å is depressurized by CV.
The gate electrodes 27 and 28 were formed by patterning by D method. A small amount of phosphorus was added to the polycrystalline silicon film in order to improve the conductivity. (Fig. 3
(C))

After that, impurities were implanted into the island-shaped silicon films 24 and 25 in a self-aligning manner by using the gate electrodes 27 and 28 as masks by the ion doping method. First, a photoresist mask 2 is formed in a region where a P-channel TFT is formed.
Then, phosphorus is injected to cover the N-type impurity region 30 (source / source
The drain region) was formed. At this time, the dose amount is 1 x 1
0 ¹⁴ to 8 × 10 ¹⁵ atoms / cm ² , acceleration voltage is 50 to 90
kV was preferred. In this embodiment, the dose amount is 5 × 1.
The acceleration voltage was set to 0 ¹⁴ atoms / cm ² , and the acceleration voltage was set to 80 kV. (Fig. 3
(D))

Then, a region for forming an N-channel type TFT is covered with a photoresist mask 31 and boron is implanted to form a P-type impurity region 32 (source / drain region). At this time, the dose amount was preferably 1 × 10 ¹⁴ to 8 × 10 ¹⁵ atoms / cm ² , and the acceleration voltage was preferably 40 to 80 kV. In this embodiment, the dose amount is 1 × 10 ¹⁵ atoms / c
m ² , and the acceleration voltage was 65 kV. (Fig. 3 (E))

Furthermore, the doped impurity regions 30 and 32 were activated by irradiation with laser light. A KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) is used as the laser light, and the energy density is 200 to 400 mJ / cm ² , for example, 25.
It was set to 0 mJ / cm ² . After that, the interlayer insulating film 33 is formed on the entire surface.
As a silicon oxide film by plasma CVD
Then, the interlayer insulating film 33 and the gate insulating film 26 were etched to form contact holes in the source / drain regions 30 and 32. Further, an aluminum film was formed into a 5000 Å film by a sputtering method, and etching was performed to form the source / drain electrodes 34, 35 and 36, and a CMOS type TFT was manufactured. (Fig. 3 (F))

[Embodiment 3] This embodiment is shown in FIG. In this example, a silicon oxide film formed by the ECR-CVD method is used, and thermal annealing according to the present invention is performed to form a P-channel type TFT as a switching transistor (pixel TFT) of an active matrix circuit. Is. First, on the substrate 41 (100 mm × 100 mm), a silicon oxide film of 3000 Å was formed as a base oxide film 42 by a low pressure CVD method.

Next, an amorphous silicon film having a thickness of 500 Å was formed by the plasma CVD method. Then, as in Example 1,
A nickel acetate film is formed on the amorphous silicon film by spin-drying a nickel acetate solution, and further subjected to thermal annealing at 550 ° C. for 4 hours in a nitrogen atmosphere for crystallization, A crystalline silicon film 43 was obtained. After that, laser annealing may be performed to improve the crystallinity. (Fig. 3 (A))

Next, the crystalline silicon film 43 was patterned to form an island-shaped silicon film 44. The island-shaped silicon film 44 becomes the active layer of the TFT. Then, as a gate insulating film, a thickness of 12 is formed so as to cover the island-shaped silicon film.
A 00Å silicon oxide film 45 was formed. In this example, a silicon oxide film was formed by the ECR-CVD method using monosilane (SiH ₄ ) as a source gas and dinitrogen monoxide as an oxidizing agent. At this time, oxygen (O ₂ ), nitric oxide (NO), nitrogen dioxide (NO ₂ ) or the like may be used as the oxidant other than nitrous oxide. In addition, as film forming conditions at this time, the substrate was not heated, and the input power of microwave (frequency: 2.45 MHz) was 400 W.

A silicon oxide film having the same characteristics can be obtained by the low pressure CVD method using the same source gas and oxidizing agent. At that time, the pressure may be 0.1 to 10 torr and the temperature may be 300 to 500 ° C. After forming the gate insulating film, the annealing treatment of the present invention was performed to improve the characteristics of the gate insulating film. In this embodiment, FIG.
Although the reactor having the structure of (A) was used, in the present embodiment,
The structure of the reaction chamber 1 was used as shown in FIG. 6 (A) (cross-sectional view) and FIG. 6 (B) (top view). In this device, fine piping as shown in FIG. 1 (B) is not provided,
An ultraviolet light source 9 is arranged in the reaction gas chamber 8.

In this example, as the thermal annealing atmosphere, dinitrogen monoxide was first used, and then the atmosphere was changed to ammonia. The temperature of the second reaction furnace was 550 ° C. in any atmosphere. First, nitrous oxide passed through the first reaction chamber was flowed at a flow rate of 2 l / min for 1 hour. After that, the atmosphere was switched to ammonia, again 2
The flow rate was 1 liter / minute for 1 hour. As a result, the silicon oxide film could be nitrided. (FIG. 4B) After that, an aluminum film having a thickness of 6000 Å was formed by a sputtering method, and this was patterned to form a gate electrode 46. A small amount (0.1 to 0.5% by weight) of scandium was added to the aluminum film in order to prevent hillocks. (Fig. 4 (C))

After that, boron was implanted as an impurity into the island-shaped silicon film 44 in a self-aligning manner by ion doping using the gate electrode 46 as a mask. At this time, the dose amount is 1 × 10 ¹⁴ to 8 × 10 ¹⁵ atoms / cm ² , and the acceleration voltage is 40.
-80 kV, for example, a dose of 1 × 10 ¹⁵ atoms / cm
^{2. The} acceleration voltage was 65 kV. As a result, P-type impurity regions 47 (source / drain regions) were formed. (FIG. 4D) Further, the doped impurity region 47 was activated by irradiation with laser light. A KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) is used as the laser light, and the energy density is 200 to
400mJ / cm ^2, for example, it was set to 250mJ / cm ^2.

After that, a silicon oxide film as an interlayer insulating film 48 is formed on the entire surface by plasma CVD to a thickness of 3000 Å,
The interlayer insulating film 48 and the gate insulating film 45 were etched to form a contact hole in the source region. further,
An aluminum film was formed into a film with a thickness of 5000 by sputtering and etching was performed to form the source electrode 49. (Fig. 4 (E))

After that, a silicon nitride film was formed as the passivation film 50 by 2000 Å by the plasma CVD method. Then, the passivation film 50 and the interlayer insulating film 4
8. The gate insulating film 45 was etched to form a contact hole in the drain region. Further, an ITO film was formed by the sputtering method, and this was etched to form the pixel electrode 51. A pixel TFT was manufactured through the above steps. (Fig. 4 (F))

[Embodiment 4] FIG. 8 shows a manufacturing process of this embodiment. The same reference numerals in FIG. 2 as those shown in FIG.
The manufacturing method and the manufacturing conditions thereof are the same as those described in [Example 1].

This embodiment is characterized in that after the active layer 14 is formed, it is exposed to dinitrogen monoxide (N ₂ 0) atmosphere.
Irradiating the surface of the active layer with a low-pressure mercury lamp to remove organic substances existing on the surface of the active layer.

First, the underlying silicon oxide film 12 was formed on the glass substrate 11, and then the crystalline silicon film 13 was formed.
(Figure 8 (A))

Then, the crystalline silicon film 13 was patterned to form the active layer 14 of the thin film transistor. Then, the surface of the active layer was irradiated with ultraviolet light from a low pressure mercury lamp in an atmosphere of dinitrogen monoxide using the apparatus shown in FIG. The heating temperature at this time was 550 ° C. (Fig. 8 (B))

Next, the gate insulating film 15 was formed, and further the gate electrode 16 and the anodic oxide around it were formed.

The gate insulating film is formed by first forming an oxide film by a thermal oxidation method at a temperature of 650 ° C. or lower (preferably a temperature not higher than the strain point of the glass substrate), and then oxidizing it by a CVD method or a sputtering method. It is more preferable to form the silicon film. The subsequent steps were the same as in the case of [Example 1] to complete the thin film transistor shown in (E).

[Embodiment 5] FIG. 9 shows FIG. 8 (C).
The results of measuring the MOS characteristics in the state shown in FIG. With this MOS characteristic, it is possible to evaluate the influence of the gate insulating film 15 on the characteristic of the thin film transistor.

In the graph shown in FIG. 9, V _fb is shown in FIG.
In the C-V characteristic shown in (1), it is defined as a voltage value at which the normalized C (capacitance) value becomes 0.8. This Vfb corresponds to a generally called flat band voltage.
The flat band voltage is defined as the voltage required to cancel the effects of the work function difference between the active layer (channel forming region) and the gate insulating film, and the fixed charges in the active layer (channel forming region) and the gate insulating film. To be done.

It can be said that V _fb also represents the effects of fixed charges, movable charges and interface states at the interface between the active layer and the gate insulating film.

This V _fb is obtained by measuring the C-V characteristic
It is preferable that no hysteresis occurs. That is, FIG.
It is desirable that ΔV _fb shown in (1) is as close to 0 as possible.
Further, it is desirable that V _fb be a value close to 0V.

When no processing is performed as shown in No. 5 of FIG. 9, the absolute value of Vfb is large. This indicates that the state of the interface between the active layer and the gate insulating film is bad. That is, it is shown that unnecessary charges are present at the interface between the active layer and the gate insulating film.

Further, as shown in No. 1, it can be seen that the interface condition is still poor by simply performing the treatment in the heated dinitrogen monoxide atmosphere. On the other hand, No
It can be seen that simultaneous irradiation with ultraviolet light in a heated dinitrogen monoxide atmosphere as shown in 2 can dramatically improve the state of the interface. Further, as is clear from the case of the conditions of No. 3 and No. 4, it can be seen that the same effect can be obtained even when nitrous oxide is changed to nitrogen or oxygen.

From the above, in one kind of heated atmosphere selected from nitrous oxide, nitrogen and oxygen,
It is concluded that the interface characteristics between the active layer and the gate insulating film can be remarkably improved by performing the treatment while irradiating with ultraviolet light on the surface of the active layer.

The following can be said by further extending this conclusion. That is, in the heated atmosphere of one or more selected from dinitrogen monoxide, nitrogen, oxygen, by performing the treatment while irradiating with ultraviolet light to the surface of the active layer,
It is possible to suppress the presence of fixed charges or movable charges existing on the surface of the active layer, and the presence of trap levels.

This effect can be obtained as an effect of improving the interface characteristics at the interface between the surface of the active layer and the gate insulating film when the gate insulating film is formed on the surface of the active layer.

[0089]

As described above, according to the present invention, the TFT
The characteristics of were greatly improved. That is, recombination centers can be reduced at the interface between the gate insulating film and the active layer, and as a result, the S value and field effect mobility are improved. Also, the breakdown voltage of the gate insulating film itself can be improved, and TDDB (Time Dependence Dieledtric breakdo
wn) was also improved. As a result of improving the characteristics of the interface with the gate insulating film as described above, in particular, there are few defects such as electrons trapped in the gate insulating film when hot electrons are injected. Degradation) was reduced and reliability was improved.

In the present invention, the maximum process temperature for the device can be set to 700 ° C. or lower, preferably 650 ° C. or lower, and the industrial benefit by that is particularly remarkable.
In the embodiments, the explanation has been centered on the TFT on the glass substrate, but it is clear that even if the present invention is applied to a multilayer integrated circuit (also called a three-dimensional integrated circuit or a three-dimensional integrated circuit), excellent effects can be obtained. is there. Thus, the present invention is an industrially useful invention.

[Brief description of drawings]

FIG. 1 shows a conceptual diagram of an apparatus for carrying out the present invention.

2A to 2C show a manufacturing process of a thin film transistor.

FIG. 3 shows a manufacturing process of a thin film transistor.

FIG. 4 shows a manufacturing process of a thin film transistor.

FIG. 5 shows a manufacturing process of a thin film transistor.

FIG. 6 shows a conceptual diagram of an apparatus for carrying out the present invention.

FIG. 7 shows the nitrogen concentration in a silicon oxide film that has been treated according to the present invention.

FIG. 8 shows a manufacturing process of a thin film transistor.

FIG. 9 shows MOS characteristics.

FIG. 10 shows CV characteristics.

[Explanation of symbols]

 1 ... 1st reaction chamber 2 ... 2nd reaction chamber 3 ... 2nd reaction chamber heater 4 ... Susceptor 5 ... Substrate 6 ... Piping 7 .... Ultraviolet light source (low-pressure mercury lamp)

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display H01L 21/324 Z

Claims (19)

[Claims] 1. A thermal oxide film formed to cover a crystalline island-shaped silicon region or a gate insulating film containing silicon oxide as a main component and deposited to cover the island-shaped silicon region by a CVD method or a PVD method. On the other hand, in an atmosphere containing nitrogen oxides excited or decomposed by ultraviolet light, 4
A method for manufacturing a semiconductor device, which comprises performing an annealing treatment at 00 to 700 ° C. 2. The island-shaped silicon region according to claim 1, wherein the island-shaped silicon region contains an element that promotes crystallization of amorphous silicon, and the concentration thereof is measured by secondary ion mass spectrometry. , The minimum concentration of silicon film is 1 × 10 ^{15 to} 3
A method for manufacturing a semiconductor device, characterized in that it is × 10 ¹⁹ atoms / cm ³ . 3. The method for manufacturing a semiconductor device according to claim 1, wherein the gate insulating film is deposited by a sputtering method. 4. The gate insulating film according to claim 1, wherein the gate insulating film is E
A method for manufacturing a semiconductor device, characterized by being deposited by a CR-CVD method. 5. The CV made of tetraethoxysilane (TEOS) as a raw material according to claim 1.
A method for manufacturing a semiconductor device, characterized in that the semiconductor device is deposited by the D method. 6. The manufacturing of a semiconductor device according to claim 1, wherein the gate insulating film is deposited by a low pressure CVD method or a plasma CVD method using monosilane and oxygen or monosilane and nitrogen oxide as main raw materials. Method. 7. The gate insulating film according to claim 1, wherein the gate insulating film is 5
A method for manufacturing a semiconductor device, which is a thermal oxide film obtained by thermal oxidation at a temperature of 00 to 700 ° C. 8. The substrate according to claim 1, wherein the strain point is 5
A method for manufacturing a semiconductor device, which uses a glass material containing silicon, oxygen, and boron at 50 to 680 ° C. 9. The semiconductor according to claim 1, wherein the island-shaped silicon region is used as an active layer of an insulating gate type semiconductor device in which a channel forming region is made of a silicon film having substantially one crystal orientation. Method for manufacturing device. 10. The method according to claim 1, wherein after the annealing treatment in a nitrogen oxide atmosphere, an atmosphere containing nitrogen oxides excited or decomposed by ultraviolet light is set to 400.
A method for manufacturing a semiconductor device, characterized by performing an annealing treatment at ˜700 ° C. 11. The method for manufacturing a semiconductor device according to claim 1, wherein the concentrations of water and carbon dioxide in the atmosphere containing nitrogen oxide are each 1 ppm or less. 12. The etching rate according to claim 1, wherein the gate insulating film contains silicon oxide as a main component, and is mixed with buffered hydrofluoric acid at 23 ° C. in a ratio of hydrofluoric acid 1, ammonium fluoride 50, and acetic acid 50. Is 1000 Å / min or less, a method for manufacturing a semiconductor device. 13. The gate insulating film according to claim 1, wherein silicon oxide is a main component and 1 × 10 ¹⁷ to 1 × 10 ²¹ atoms /
A method for manufacturing a semiconductor device, which contains cm ³ of nitrogen. 14. A first reaction chamber that excites or decomposes nitrogen oxide or hydrogen nitride by irradiating it with ultraviolet light, and is deposited on the island-shaped crystalline silicon film by a CVD method or a PVD method. And a second reaction chamber for heat-treating the gate insulating film, and nitrogen oxide or hydrogen nitride that has passed through the first reaction chamber is introduced into the second reaction chamber. The temperature of the second reaction chamber is 400 to 700 ° C., the semiconductor device manufacturing apparatus. 15. The center wavelength of the ultraviolet light source used in the first reaction chamber according to claim 14, which is 150 to 350 n.
m is a semiconductor device manufacturing apparatus. 16. The semiconductor device manufacturing apparatus according to claim 14, wherein the ultraviolet light source used in the first reaction chamber is a low-pressure mercury lamp. 17. The inner wall of the pipe connecting the first reaction chamber and the second reaction chamber according to claim 14, wherein the inner wall is 90 mol%.
An apparatus for manufacturing a semiconductor device, which is formed of the above-mentioned material made of silicon oxide. 18. With respect to the surface of the crystalline island-shaped silicon region,
A method for manufacturing a semiconductor device, which includes a step of performing an annealing treatment at 400 to 700 ° C. in an atmosphere having a nitrogen oxide excited or decomposed by ultraviolet light. 19. A surface of a crystalline island-shaped silicon region,
A step of performing an annealing treatment at 400 to 700 ° C. in an atmosphere having a nitrogen oxide excited or decomposed by ultraviolet light, and after the step, the process proceeds to the next step while maintaining a clean atmosphere, and in the step, And a step of forming a gate insulating film on the surface of the island-shaped silicon region.