JPH08123370A - Disconnection relief circuit and display device using the same - Google Patents

Abstract

(57) [Abstract] [Purpose] To suppress an increase in power consumption by providing a buffer dedicated to the auxiliary wiring while keeping the size of the buffer for driving the wiring to be repaired unchanged. [Constitution] A conversion element for converting an electric quantity into a physical quantity of another form is connected in the middle of a wiring formed on an insulating substrate, and an arbitrary quantity of electricity is supplied to one end side of the wiring by a main buffer. A disconnection relief circuit of a conversion panel, wherein when a disconnection occurs in the wiring, the disconnection relief circuit connects between one end side and the other end side of the wiring with an auxiliary wiring, An auxiliary buffer is provided separately from the main buffer, and the auxiliary buffer supplies an arbitrary amount of electricity to the auxiliary wiring.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a conversion element for converting an electric quantity into a physical quantity of another form, for example, a liquid crystal element, a plasma light emitting element, an electroluminescence element, an electrochromatic element, an electrophoretic material element, a light emitting element. The present invention relates to a disconnection relief circuit suitable for use in a conversion panel including a conversion element that converts an electric quantity into a light format, such as a diode element or an electroluminescent material element.

Recently, as information-related devices such as personal computers have become smaller and lighter, so-called flat panel displays such as liquid crystal displays and plasma displays have come to be used as display devices. However, the manufacturing yield is worse than that of the CRT display and the cost is high, and a technique useful for cost reduction is required.

[0003]

2. Description of the Related Art Generally, when a pixel defect occurs in a flat panel display, the pixel is electrically disconnected. After this treatment, the pixel is fixed to the black level (or white level), but if the number of defective pixels is small and not concentrated in one place, it is not noticeable and is a good product. Can be shipped as.

FIG. 11 is a block diagram of a conventional flat panel display, which is an example of a liquid crystal display. In FIG. 11, 1 is a liquid crystal panel (conversion panel),
2 and 3 are data driver boards, and 4 and 5 are scan driver boards. The liquid crystal panel 1 has two glass substrates (insulating substrates) 1a and 1b laminated, and a liquid crystal sandwiched between them, and a large number of liquid crystal cells (conversion elements) and a large number of wirings on the lower surface of the upper glass substrate 1a. Form. A common electrode common to all liquid crystal cells is formed on the upper surface of the lower glass substrate 1b, and the transmittance of liquid crystal between the pixel electrode and the common electrode changes according to the potential difference between the two electrodes. , Any gradation can be obtained.

Here, the wiring of the liquid crystal panel 1 is composed of a large number of vertical wirings (hereinafter referred to as "data bus lines") and a large number of horizontal wirings (hereinafter referred to as "scan bus lines"). A liquid crystal cell is connected to each intersection of these vertical and horizontal wirings. Symbols D and S in the figure represent one representative data bus line and scan bus line, and one liquid crystal cell C is located at the intersection thereof. That is, when a predetermined voltage is supplied to the scan bus line S, the liquid crystal cell C is selected and the data bus line D
The arbitrary voltage supplied to the liquid crystal cell C is applied to the liquid crystal cell C.

The data bus lines are drawn up and down in the drawing through the flexible printed boards 6 and 7, and data driver ICs are provided at the ends of the flexible printed boards 6 and 7.
8 and 9 are attached. The data driver IC 8 on the upper side of the drawing is for driving odd-numbered data bus lines, and the data driver IC 9 on the lower side of the drawing is for driving even-numbered data bus lines. Similarly, the scan bus lines are drawn out to the left and right in the drawing via the flexible printed boards 10 and 11, and the scan driver ICs 12 and 13 are attached to the ends of the flexible printed boards 10 and 11. The scan driver IC 12 on the left side of the drawing is for driving odd-numbered scan bus lines, and the scan driver IC 13 on the right side of the drawing is for driving even-numbered scan bus lines.

The wiring 14 drawn out from the left and right data driver boards 4 and 5 is a part of an auxiliary wiring which will be described later, and this auxiliary wiring is used for relieving the scan bus line including the disconnection portion. Also, although omitted in the figure,
A part of the auxiliary wiring used for relieving the data bus line including the defective portion is also drawn out from the upper and lower data driver boards 2 and 3.

[0008] FIG. 12 is a conceptual diagram of repairing disconnection by auxiliary wiring. It should be noted that in the following description, for the sake of convenience, disconnection relief of the scan bus line is taken as an example, but the same applies to the data bus line. The auxiliary wiring is the above-mentioned wiring 14 drawn from the scan driver boards 4 and 5, and the wirings 15 and 16 formed on the left and right scan driver boards 4 and 5.
And wirings 17 and 18 formed on the liquid crystal panel 1, and these are electrically connected to form substantially one wiring. Here, the wiring 17 formed on the liquid crystal panel 1,
Reference numeral 18 intersects the ends of the scan bus lines S _{1 to} S _n , and normally maintains insulation between all the scan bus lines S _{1 to} S _n , but a defective portion ( When a cross mark (see X) occurs, the insulation between the scan bus line (S _{n-1 in the} figure) is destroyed and the scan bus line is electrically connected. That is, the black circles (●) in the figure are connection points, and the right side from the defective portion (×) of the scan bus line S _n−1 is the wiring 18 → the wiring 16 → the wiring 1
Scan driver IC through 4 → wiring 15 → wiring 17
It is connected to 12 buffers B _n-1 .

Therefore, according to the disconnection relief circuit, since the entire scan bus line S _n-1 including the defective portion (x) can be driven by the buffer B _n-1 , the yield can be improved. The disconnection relief circuit is applied not only to the involuntary disconnection of the scan bus line and the data bus line but also to the disconnection intentionally performed, for example, the disconnection for electrically disconnecting the defective pixel.

[0010]

However, in such a conventional disconnection relief circuit, although both ends of the wiring including the disconnection portion are connected by the auxiliary wiring for the relief, the capacity of the auxiliary wiring is relieved. Since it is considerably larger than the capacity of the target wiring, there is a drawback that the potential change on the wiring (see FIG. 13) becomes slow. Therefore, in order to avoid this, it is necessary to drastically increase the driving capability of the buffer, which causes a problem that the power consumption of the buffer increases.

[0011]

[Object] Therefore, an object of the present invention is to suppress an increase in power consumption by providing a buffer for exclusive use in an auxiliary wiring while keeping the size of a buffer for driving a wiring to be relieved.

[0012]

According to the first aspect of the present invention,
In the middle of the wiring formed on the insulating substrate, a conversion element for converting an electric quantity into a physical quantity of another form is connected, and a main buffer supplies an arbitrary quantity of electricity to one end side of the wiring. In the disconnection relief circuit, in the case where a disconnection occurs in the wiring, the one end side and the other end side of the wiring are connected by an auxiliary wiring for relief, and the main buffer is provided. In addition to the auxiliary buffer,
It is characterized in that the auxiliary buffer supplies an arbitrary amount of electricity to the auxiliary wiring.

According to a second aspect of the present invention, in the first aspect of the present invention, the auxiliary wiring is divided into two at an arbitrary position, and one auxiliary wiring connected to one end side of the wiring and an input of the auxiliary buffer. Is connected, and the other auxiliary wiring connected to the other end side of the wiring is connected to the output of the auxiliary buffer. Claim 3
In the invention described in claim 1, the output of the auxiliary buffer is connected in the middle of the auxiliary wiring, and
An auxiliary signal synchronized with the input signal of the main buffer is supplied to the input of the auxiliary buffer.

According to a fourth aspect of the present invention, in the third aspect of the invention, the auxiliary signal is a signal whose state changes greatly at least when the output state of the main buffer changes. The invention according to claim 5 is a conversion panel in which conversion elements for converting an electric quantity into a physical quantity of another format are arranged in a matrix, a drive circuit for driving the conversion panel, and a conversion panel according to claim 1, 2, 3 or 4. The disconnection relief circuit described above is provided.

[0015]

According to the first aspect of the invention, an arbitrary amount of electricity is supplied to the auxiliary wiring from a dedicated buffer (auxiliary buffer). Therefore, the load on the main buffer is reduced, and the increase in size of all the main buffers is avoided, so that the increase in power consumption is suppressed. According to the second aspect of the invention, since it is only necessary to connect the auxiliary buffer to the auxiliary wiring in series,
It does not require major renovation and can be easily applied to existing ones.

According to the third aspect of the invention, for example, when there is an unused main buffer, the main buffer can be used as the auxiliary buffer, and the circuit elements can be effectively used. According to the fourth aspect of the invention, the output of the auxiliary buffer emphasizes the rising or falling of the potentials of the wiring and the auxiliary wiring. Therefore, the rise time and fall time of the same potential are shortened, and high speed and responsiveness are improved.

According to the invention described in claim 5, it is not necessary to increase the driving capability of the buffer, and the power consumption of the entire display device can be saved.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. In the following description, an example of application to a liquid crystal display is shown, but the present invention is not limited to this. As mentioned at the beginning, it can be applied to any conversion panel provided with a conversion element for converting an electric quantity into another form of physical quantity. Further, although the scan bus line will be described below for convenience of explanation, the present invention is not limited to this, and it goes without saying that the present invention can be applied to a data bus line.

1 to 3 are views showing a first embodiment of a disconnection relief circuit according to the present invention. FIG. 1 is a conceptual configuration diagram thereof. In this figure, 20 is a scan bus driver including _n main buffers (hereinafter referred to as “scan bus buffers”) 21 _{1 to} 21 _n , and 22 is m main buffers ( Hereinafter, referred to as "data bus buffer") 23 ₁ to 23 _m are data bus drivers.

The scan bus buffers 21 _{1 to} 21 _n are
N horizontal wirings (that is, scan bus lines) 25 _{1 to} 25 formed on the liquid crystal panel (conversion panel) 24
_The data bus buffers 23 ₁ to 2 2 are connected to the respective one ends of _n.
3 _m is connected to one end of each of m vertical wirings (that is, data bus lines; not shown) formed on the liquid crystal panel 24.

Reference numeral 26 is an auxiliary wiring, and the auxiliary wiring 26 is
The first wiring 26a includes a first wiring 26a that intersects one end of each of the _n scan bus lines 25 _{1 to} 25 _n and a second wiring 26b that intersects all other ends of the scan bus lines 25 _{1 to} 25 _n. And the second wiring 26b are connected via the auxiliary buffer 27. That is, the input 27a of the auxiliary buffer 27 is connected to the first wiring 26a, and the output 27b of the auxiliary buffer 27 is connected to the second wiring 26b. Therefore, this auxiliary buffer 27 is
The second wiring 26b is driven in response to the potential of the wiring 26a.

In such a configuration, it is now 2 from the top.
Second scan bus line 25₂ Disconnection (x) occurs in
If this was the case, this scan will be performed by the repair process.
Bus line 25₂ There is a certain distance between both ends of the
Connection (position indicated by black circle (●)). do this
And the scan bus buffer 21₂ The load on the scanbar
Sline 25 ₂ Left side from the defective portion (x) and the first wiring 26
On the other hand, the load of the auxiliary buffer 27 becomes
Bus line 25₂ From the defective part (x) to the right side and the second wiring 2
6b, so scan bus line 25₂ And auxiliary wiring
The combined capacity of 26 is the scan bus buffer (main buffer
A) 21₂ And shared by two buffers, auxiliary buffer 27
As in the past, only the main buffer is used to
The burden on the main buffer is reduced compared to the total capacity.
can do. As a result, the drive capacity of the main buffer
Power consumption without increasing
Two, scan bus line 25₂ The potential change of
2)).

FIG. 3 is a preferred modification of the first embodiment. In general, the data bus driver of the liquid crystal display is often arranged on both sides (upper and lower) of the liquid crystal panel. This is because the intervals between the data bus lines are extremely small, and it is convenient to take out the data bus lines every other line up and down without being restricted by layout. Similarly, the scan bus driver is also arranged on both sides (left and right) of the liquid crystal panel (however, at present, the one side arrangement is predominant due to the requirement to reduce the frame area of the panel). The example of FIG. 3 shows a type in which scan bus drivers are arranged on both sides of a liquid crystal panel.

The auxiliary buffer 30 is connected to the first wiring 26a and the second wiring 26b via two changeover switches 31a and 31b, and the changeover switches 31a and 31b are connected to each other.
By switching 31b, the input 30a and the output 30b can be connected to either the first wiring 26a or the second wiring 26b. Now, when the contacts of the two change-over switches 31a and 31b are in the positions shown in the figure, the input 30a of the auxiliary buffer 30 is connected to the first wiring 26a and the output 30b is connected to the second wiring 26b. Therefore, in this case, since the second wiring 26b is driven in response to the potential of the first wiring 26a, the break relief mode for the odd-numbered scan bus lines is set.
On the other hand, if the contacts of the two changeover switches 31a and 31b are reversed from the positions shown in the figure, the input 30 of the auxiliary buffer 30
The a is connected to the second wiring 26b, and the output 30b is connected to the first wiring 26a. Therefore, in this case, since the first wiring 26a is driven in response to the potential of the second wiring 26b, the break relief mode for even-numbered scan bus lines is set.

As described above, according to the embodiment shown in FIG. 3, either the odd-numbered scan line or the even-numbered scan bus line can be relieved only by switching the contacts of the two changeover switches 31a and 31b. It is possible to provide an effective disconnection relief circuit for use in the liquid crystal display. FIG. 4 is another example of the configuration of the disconnection relief circuit effective for use in the left and right alternate extraction type liquid crystal display.
In this example, the left and right scan driver boards 33a, 33
Auxiliary buffers 34a and 34b are mounted on each of b,
These two auxiliary buffers 34a and 34b are selectively used according to the scan bus line including the disconnection portion.

That is, in the illustrated example, the liquid crystal panel 36.
Since the scan bus line 35 drawn to the left of the liquid crystal panel 36 includes the disconnection portion (x), the input of the auxiliary buffer 34a of the scan driver substrate 33a on the left side is input to the liquid crystal panel 36.
The output of the auxiliary buffer 34a is connected to the upper wiring 37a, and the output of the auxiliary buffer 34a is connected to the auxiliary wiring 38 and the scan driver substrate 33 on the right side.
the wiring 37 on the liquid crystal panel 36 through the wiring 37b on
Connect to c. Alternatively, when the scan bus line including the disconnection portion is drawn out to the right, the input of the auxiliary buffer 34b of the scan driver substrate 33b on the right side is connected to the wiring 37c on the liquid crystal panel 36, and the output of the auxiliary buffer 34b is connected to the auxiliary wiring. 38 and scan driver board 33 on the left side
The wiring 37 on the liquid crystal panel 36 via the wiring 37d on a
Connect to a.

Even with such a configuration, by selectively using the two auxiliary buffers 34a and 34b,
Since either the odd-numbered scan line or the even-numbered scan bus line can be repaired, it is possible to provide an effective disconnection repair circuit for use in a left-right alternate extraction type liquid crystal display. 5 and 6 are diagrams showing a second embodiment of the disconnection relief circuit according to the present invention.

FIG. 5 is a conceptual configuration diagram thereof. The components common to those in FIG. 1 are designated by the same reference numerals, and
Duplication of the explanation shall be avoided. In FIG. 5, 4
0 is an auxiliary wiring, 41 is an auxiliary buffer, and the auxiliary wiring 4
0 is connected to both ends of the scan bus line 25 ₂ including the disconnection (x), for example. The output of the auxiliary buffer 41 is connected to an arbitrary position of the auxiliary wiring 40, and the input of this auxiliary buffer 41 is the input of the scan bus buffer (main buffer) 21 ₂ connected to one end of the scan bus line 25 _2. The same signal as the signal S _i or a synchronized signal (auxiliary signal) S _i ′ is given.

According to such a configuration, two buffers, that is, the scan bus buffer (main buffer) 25
₂ and the auxiliary buffer 41, the scan bus line 2
5 ₂ and the auxiliary wiring 40 are driven, the load on the main buffer can be reduced as compared with the case where only the main buffer is driven as in the conventional case, and in other words, the driving capability of the main buffer is not increased. For example, while suppressing power consumption
It is possible to quickly change the potential of the scan canvas line 25 ₂ (see FIG. 2).

FIG. 6 is a concrete configuration diagram of the second embodiment.
You. In this figure, 50 is a liquid crystal panel, and 51 and 52 are
The scan driver board, 53 is auxiliary wiring,
The line 53 is the wiring 5 on the scan driver boards 51 and 52.
Wiring 53c in the liquid crystal panel 50 through 3a and 53b,
It is connected to 53d. 54 and 55 are scan dry
Scan driver ICs 54, 5
5 are n number of stripes formed on the liquid crystal panel 50, respectively.
Canvas line 56₁ ~ 56_n 1 more than 1/2
I (n / 2) +1 buffer 57₁ ~ 57_{(n / 2) +1} ,
58₁ ~ 58_{(n / 2) +1} have. Top buffer
57₁ , 58₁ Acts as an auxiliary buffer and the remaining buffer
Chiffa 57₂ ~ 57_{(n / 2) +1} , 58 ₂ ~ 58_{(n / 2) +1} Is
Functions as the main buffer.

For example, if the scan bus line 56 _n-1 has a disconnection (x), the main buffer 57 _{(n / 2) +1} and the auxiliary buffer 57 ₁ that drive this scan bus line 56 _{n- 1.} with a common input signal, connected to the output of the auxiliary buffer 57 ₁ and the wiring 53c, and the scan bus line 56 _n-1 across the wiring 53c and 53d
And connect.

By doing so, the scan bus line 56 _n-1 including the disconnection portion and the auxiliary wiring 53 (and the wirings 53a to 53a-
53d) and two buffers (main buffer 57
_Since it is driven by _{(n / 2) +1} and the auxiliary buffer 57 ₁ ), it is possible to reduce the load on the main buffer as compared with the case where only the main buffer is driven as in the conventional case. Without increasing the power consumption, that is, while suppressing the power consumption, the potential change of the scan bus line 56 _{n + 1} can be made rapid (see FIG. 2).

Alternatively, if the even-numbered scan bus line (eg 56 ₂ ) is disconnected, the main buffer 58 ₂
And the input signal of the auxiliary buffer 58 ₁ are made common, and the output of the auxiliary buffer 58 ₁ and the wiring 53d may be connected. Therefore, either the odd-numbered scan line or the even-numbered scan bus line can be repaired, and the left and right alternate extraction type It is possible to provide an effective disconnection relief circuit for use in the liquid crystal display.

7 to 10 are views showing a third embodiment of the disconnection relief circuit according to the present invention. In FIG. 7, 60 is a liquid crystal panel, 61 and 62 are scan driver substrates, 63 is an auxiliary wiring, and the auxiliary wiring 63 is a wiring in the liquid crystal panel 60 via the wirings 63a and 63b on the scan driver substrates 61 and 62. It is connected to 63c and 63d.

Reference numeral 64 denotes an auxiliary buffer, and the auxiliary buffer 64 generates an inverted signal (hereinafter referred to as "M bar") of an alternating signal (auxiliary signal) M having a predetermined cycle.
a, a selection switch 64b for selecting one of the AC signals M or M bar, a differentiation circuit 64c for outputting a differentiation signal of the AC signal M or M bar selected by the selection switch 64b, and a differentiation signal A first switch 64d for supplying the high-potential-side power source Vdd to the auxiliary wiring 63 when it has a positive polarity, and a low-potential-side power source V when the differential signal has a negative polarity.
Second switch 64e for supplying ss to the auxiliary wiring 63
And have.

In such a configuration, since the differential signal repeats positive and negative peaks every half cycle of the signal M,
Vdd and Vss are alternately supplied to the auxiliary wiring 63 every half cycle of the signal M. Therefore,
If the phase of the alternating signal M and the phase of the drive waveform of the scan bus line including the disconnection portion (x) are matched,
As shown in, the Vdd supply timing coincides with the drive waveform rising timing, and the Vss supply timing coincides with the drive waveform falling timing. Therefore, the drive waveform can be made to rise and fall sharply and transition The time can be shortened.

When the selection switch 64b is switched, the phase of the input signal of the differentiating circuit 64c is shifted by 180 degrees,
The supply timings of Vdd and Vss can be exchanged. Therefore, even if a disconnection occurs in the even-numbered scan bus lines, it can be dealt with by a simple operation of switching the selection switch 64b. Although the auxiliary buffer 64 is externally attached in the example of FIG. 7, the present invention is not limited to this. For example, as shown in FIG. 9, it may be mounted on the scan driver boards 61 'and 62', or may be built in the scan driver ICs 65 and 66. In these cases, the inverter gate 64a and the selection switch 64b in the configuration of FIG. 7 are not necessary.
When relieving the odd-numbered scan bus lines, the left auxiliary buffer 64 ′ may be connected to the wiring 63 c, and when relieving the even-numbered scan bus lines, the right auxiliary buffer 64 ″ is wired. This is because it may be connected to 63d.

FIG. 10 shows an example in which auxiliary buffers 72 and 73 are built in the driver ICs 70 and 71. In this example, the auxiliary wiring 53 (and the wirings 53a to 53d) is Vd.
It differs from the embodiment of FIG. 9 in that the input signal of the main buffer is supplied instead of d or Vss. That is, the auxiliary buffers 72 and 73 respectively turn on in response to the differentiating circuit 74 which outputs the differential signal of the signal M and the differential signal, and the input signals of the nearest main buffers (for example, 70 ₁ and 71 ₁ ). And a switch 75 for supplying to the wiring 53c (or the wiring 53d).

According to this, since the auxiliary wiring 53 (and the wirings 53a to 53d) is driven by the input signal of the main buffer 71 ₁ closest to the auxiliary buffers 72 and 73, the input signals are simultaneously supplied to all the main buffers. A suitable technology can be provided by using a given driver IC, that is, a data driver IC.

[0040]

According to the first aspect of the invention, an arbitrary amount of electricity can be supplied to the auxiliary wiring from a dedicated buffer (auxiliary buffer). Therefore, it is possible to reduce the load on the main buffer and to avoid increasing the size of all the main buffers, so that the increase in power consumption can be suppressed.

According to the second aspect of the present invention, since it is only necessary to connect the auxiliary buffer to the auxiliary wiring in series, it is possible to easily apply the present invention to an existing one without requiring major modification.
According to the invention described in claim 3, for example, when there is an unused main buffer, the main buffer can be used as the auxiliary buffer, and the circuit elements can be effectively used.

According to the fourth aspect of the present invention, the output of the auxiliary buffer can enhance the rising or falling of the potential of the wiring and the auxiliary wiring. Therefore, the rise time and fall time of the same potential can be shortened, and high speed and responsiveness can be improved.

[Brief description of drawings]

FIG. 1 is a conceptual configuration diagram of a first embodiment.

FIG. 2 is a potential change diagram of the first embodiment.

FIG. 3 is a specific configuration diagram of the first embodiment.

FIG. 4 is another configuration diagram of the first embodiment.

FIG. 5 is a conceptual configuration diagram of a second embodiment.

FIG. 6 is a specific configuration diagram of the second embodiment.

FIG. 7 is a specific configuration diagram of the third embodiment.

FIG. 8 is a potential change diagram of the third embodiment.

FIG. 9 is another configuration diagram of the third embodiment.

FIG. 10 is still another configuration diagram of the third embodiment.

FIG. 11 is an overall configuration diagram of a conventional example.

FIG. 12 is a conceptual configuration diagram of a conventional example.

FIG. 13 is a potential change diagram of a conventional example.

[Explanation of symbols]

1a, 1b: glass substrate (insulating substrate) 21 _{1 to} 21 _n , 23 ₁ to 23 _m , 57 _{2 to} 57
_{(n / 2) +1, 58} 2 ~58 (n / 2) + 1, 70 1, 71 1: Main Buffer 24,36,50,60: a liquid crystal panel (conversion panel) 25 ₁ ~25 _n, 35, 56 ₁ ~ 56 _n: scan bus lines (lines) 26,26a, 26b, 38,40,53,63: auxiliary wiring _{27,30,34a, 34b, 41,57 1, 58} 1,
64, 64 ', 64 "72, 73: auxiliary buffer C: liquid crystal cell (converting element) M: alternating signal (auxiliary signal)

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Katsuhiko Kishida 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited

Claims (5)

[Claims] 1. A conversion element for converting a quantity of electricity into a physical quantity of another form is connected in the middle of a wiring formed on an insulating substrate, and a main buffer supplies an arbitrary quantity of electricity to one end side of the wiring. Which is a disconnection relief circuit for the conversion panel
In the case of a disconnection relief circuit in which one end side and the other end side of the interconnection are connected by an auxiliary interconnection to relieve when the interconnection is disconnected, an auxiliary buffer is provided separately from the main buffer. A disconnection relief circuit characterized in that the auxiliary buffer supplies an arbitrary amount of electricity to the auxiliary wiring. 2. The auxiliary wiring is divided into two at an arbitrary position, one auxiliary wiring connected to one end side of the wiring is connected to an input of the auxiliary buffer, and the other end side of the wiring is connected. The disconnection relief circuit according to claim 1, wherein the other auxiliary wiring connected to the output of the auxiliary buffer is connected. 3. The output of the auxiliary buffer is connected in the middle of the auxiliary wiring, and the auxiliary signal synchronized with the input signal of the main buffer is supplied to the input of the auxiliary buffer. 1. The disconnection relief circuit described in 1. 4. The disconnection relief circuit according to claim 3, wherein the auxiliary signal is a signal whose state changes greatly at least when the output state of the main buffer changes. 5. A disconnection panel according to claim 1, 2, 3 or 4, wherein a conversion panel in which conversion elements for converting an electric quantity into a physical quantity of another format are arranged in a matrix, a drive circuit for driving the conversion panel, and A display device comprising a relief circuit.