JPH08102664A - Pll frequency synthesizer circuit - Google Patents
Pll frequency synthesizer circuitInfo
- Publication number
- JPH08102664A JPH08102664A JP6237507A JP23750794A JPH08102664A JP H08102664 A JPH08102664 A JP H08102664A JP 6237507 A JP6237507 A JP 6237507A JP 23750794 A JP23750794 A JP 23750794A JP H08102664 A JPH08102664 A JP H08102664A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- voltage
- amplifier
- pll
- vco
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims abstract description 27
- 238000006243 chemical reaction Methods 0.000 claims abstract description 17
- 230000003321 amplification Effects 0.000 claims description 23
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 23
- 230000005855 radiation Effects 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 8
- 230000007423 decrease Effects 0.000 description 5
- 230000010485 coping Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、PLL周波数シンセサ
イザ回路に係わり、VCO回路に接続する増幅回路に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PLL frequency synthesizer circuit, and more particularly to an amplifier circuit connected to a VCO circuit.
【0002】[0002]
【従来の技術】PLL周波数シンセサイザ回路は、印加
電圧に比例した発振周波数信号を出力するVCO回路
と、VCO回路の出力を分周するプログラマブルデバイ
ダ,基準周波数信号を分周するリファレンスデバイダ,
両デバイダの出力位相を比較する位相比較器よりなるP
LL回路と、このPLL回路の出力を入力しVCO回路
に電圧を印加するローパスフィルタとから構成される。
そして、VCO回路とPLL回路の間には、PLL回路
への入力信号レベルを所定レベル以上に確保するため、
通常、VCO回路とPLL回路の間には、増幅回路が接
続されている。2. Description of the Related Art A PLL frequency synthesizer circuit includes a VCO circuit that outputs an oscillation frequency signal proportional to an applied voltage, a programmable divider that divides the output of the VCO circuit, a reference divider that divides a reference frequency signal,
P consisting of a phase comparator that compares the output phases of both dividers
It is composed of an LL circuit and a low-pass filter that inputs the output of the PLL circuit and applies a voltage to the VCO circuit.
Further, between the VCO circuit and the PLL circuit, in order to secure the input signal level to the PLL circuit at a predetermined level or higher,
Usually, an amplifier circuit is connected between the VCO circuit and the PLL circuit.
【0003】[0003]
【発明が解決しようとする課題】ところが、VCO回路
の後段に接続される増幅回路は、周波数が高くなると出
力段のトランジスタの電流増幅度が低下するため、結果
として出力される発振振幅レベルは周波数に反比例する
ようになる。例えば、FMラジオ受信機における増幅回
路の出力は、図5に示すように、その発振周波数が高く
なるとそれに伴って低下する傾向にある。However, in the amplifier circuit connected to the latter stage of the VCO circuit, the current amplification degree of the transistor in the output stage decreases as the frequency increases, so that the oscillation amplitude level output as a result is the frequency. Will be inversely proportional to. For example, as shown in FIG. 5, the output of the amplifier circuit in the FM radio receiver tends to decrease as the oscillation frequency increases.
【0004】そこで、従来は、周波数が高くなって発振
振幅レベルが低下しても、PLL回路の最低動作入力レ
ベルを満足するように、増幅回路の増幅度を全体的に大
きく設定していた。しかしながら、このような対処方法
では、周波数が低いときに発振振幅レベルが過大となっ
てしまい、このため、不要な高調波成分が発生して不要
輻射を増大させる原因となっていた。Therefore, conventionally, the amplification degree of the amplifier circuit is generally set to be large so as to satisfy the minimum operation input level of the PLL circuit even when the frequency increases and the oscillation amplitude level decreases. However, in such a coping method, the oscillation amplitude level becomes excessive when the frequency is low, so that an unnecessary harmonic component is generated, which causes an increase in unnecessary radiation.
【0005】近年、ラジオ受信機では不要輻射の低減が
特に求められており、VCO回路とPLL回路の配線を
極力短くする等の対策が行われているがそれにも限界が
あり、上記原因に基づき発生する不要輻射は大きな問題
となっていた。In recent years, there has been a particular demand for reduction of unnecessary radiation in radio receivers, and measures such as shortening the wiring of the VCO circuit and the PLL circuit have been taken as much as possible, but there is a limit to this, and based on the above cause. The generated unwanted radiation was a big problem.
【0006】[0006]
【課題を解決するための手段】本発明は、印加される電
圧に応じた発振周波数信号を出力するVCO回路と、該
VCO回路の出力信号が入力されるPLL回路と、該P
LL回路の出力が印加され出力電圧を前記VCO回路に
出力するローパスフィルタとを備えたPLLシンセサイ
ザ回路において、前記VCO回路とPLL回路との間
に、前記発振周波数に応じて増幅度が変化する増幅回路
を挿入して上記課題を解決するものである。According to the present invention, there is provided a VCO circuit which outputs an oscillation frequency signal according to an applied voltage, a PLL circuit to which an output signal of the VCO circuit is input, and the PCO circuit.
In a PLL synthesizer circuit including a low-pass filter to which an output of the LL circuit is applied and which outputs an output voltage to the VCO circuit, amplification in which an amplification degree changes between the VCO circuit and the PLL circuit according to the oscillation frequency. The above problem is solved by inserting a circuit.
【0007】また、前記PLL周波数シンセサイザ回路
は、更に、前記PLL回路中に含まれるプログラマブル
デバイダに分周数を設定するためのコントローラを有
し、該コントローラは設定する分周数に対応するデータ
を出力し、前記増幅回路は、前記データを電圧もしくは
電流に変換する変換回路と、該変換回路からの出力に応
じて増幅度が変化する増幅器とよりなることを特徴とす
る。Further, the PLL frequency synthesizer circuit further has a controller for setting a frequency division number in a programmable divider included in the PLL circuit, and the controller stores data corresponding to the frequency division number to be set. The amplification circuit is configured to include a conversion circuit that outputs the data and converts the data into a voltage or a current, and an amplifier whose amplification degree changes according to the output from the conversion circuit.
【0008】また、前記増幅回路は、前記VCO回路に
印加される電圧を入力し、該入力電圧に応じて増幅度が
変化する増幅回路であることを特徴とする。また、前記
増幅回路は、前記VCO回路に印加される電圧を比例し
た電流に変換する電圧電流変換回路と、該変換回路によ
って変換された電流を動作電流として入力する差動増幅
器とよりなることを特徴とする。Further, the amplifier circuit is characterized in that the voltage applied to the VCO circuit is input, and the amplification degree changes according to the input voltage. The amplifier circuit includes a voltage-current conversion circuit that converts a voltage applied to the VCO circuit into a proportional current, and a differential amplifier that inputs the current converted by the conversion circuit as an operating current. Characterize.
【0009】[0009]
【作用】VCO回路後段の増幅回路の増幅度が一定の場
合は、発振周波数が高くなるとその発振振幅レベルが低
下していくが、本発明では、周波数が高くなるとそれに
応じて増幅度が大きくなり発振振幅レベルを増大させる
ように働くため、結果として発振振幅レベルはフラット
な特性となり、レベル低下が防止される。よって、従来
の如く、発振振幅レベルを全体的に高く設定しておく必
要がなくなり、低周波数領域での過大な振幅レベルの発
生をなくし、不要輻射が低減される。When the amplification degree of the amplifier circuit after the VCO circuit is constant, the oscillation amplitude level decreases as the oscillation frequency increases, but in the present invention, the amplification degree increases accordingly as the frequency increases. Since it acts to increase the oscillation amplitude level, the oscillation amplitude level has a flat characteristic as a result, and the level reduction is prevented. Therefore, unlike the conventional case, it is not necessary to set the oscillation amplitude level as a whole high, the generation of an excessive amplitude level in the low frequency region is eliminated, and unnecessary radiation is reduced.
【0010】[0010]
【実施例】図1は、本発明の一実施例の概略構成を示す
ブロック図であり、1は印加電圧に比例した発振周波数
信号を出力するVCO回路、2は、VCO回路の出力f
0を分周するプログラマブルデバイダ3,基準周波数信
号frを分周するリファレンスデバイダ4,両デバイダ
の出力位相を比較する位相比較器5よりなるPLLLS
Iにて構成されたPLL回路、6はPLL回路2の出力
を入力しVCO回路1に電圧VTを印加するローパスフ
ィルタLPF、そして、7はVCO回路1とPLL回路
2の間に挿入され、VCO回路1の出力信号を増幅する
増幅回路である。1 is a block diagram showing a schematic configuration of an embodiment of the present invention, in which 1 is a VCO circuit which outputs an oscillation frequency signal proportional to an applied voltage, and 2 is an output f of the VCO circuit.
PLLLS including a programmable divider for dividing 0, a reference divider for dividing a reference frequency signal fr, and a phase comparator 5 for comparing output phases of both dividers.
I is a PLL circuit, 6 is a low-pass filter LPF that inputs the output of the PLL circuit 2 and applies the voltage VT to the VCO circuit 1, and 7 is inserted between the VCO circuit 1 and the PLL circuit 2, It is an amplifier circuit that amplifies the output signal of the circuit 1.
【0011】本実施例では、増幅回路7は、VCO回路
1への印加電圧VTを入力し、この電圧VTを電圧値に
比例した電流I2に変換する電圧電流変換回路8と、変
換された電流I2を動作電流として入力する増幅器9よ
り構成されている。電圧電流変換回路8及び増幅器9の
具体回路を、図3及び図4に各々示す。図3に示すよう
に、電圧電流変換回路8は、増幅器9の動作電流を制御
する回路であって、特性が同一なトランジスタQ1,Q
2、及び、抵抗,R2,R3からなるカレントミラー回
路にて実現される。そして、トランジスタQ1のコレク
タに抵抗R1を介してVCO回路1への印加電圧VTを
入力するようにしている。従って、トランジスタQ1に
流れる電流I1は、VT/R1に比例することとなり、
且つ、電流I1とI2とは等しくなるため、電流I2も
VT/R1に比例することとなる。即ち、電流I2は、
VCO回路1の発振周波数f0が高くなればそれに伴っ
て増加するようになる。In this embodiment, the amplifier circuit 7 inputs the voltage VT applied to the VCO circuit 1 and converts the voltage VT into a current I2 proportional to the voltage value, and a converted current. It is composed of an amplifier 9 for inputting I2 as an operating current. Specific circuits of the voltage-current conversion circuit 8 and the amplifier 9 are shown in FIGS. 3 and 4, respectively. As shown in FIG. 3, the voltage-current conversion circuit 8 is a circuit that controls the operating current of the amplifier 9, and has transistors Q1 and Q1 having the same characteristics.
2 and a current mirror circuit composed of resistors, R2 and R3. Then, the applied voltage VT to the VCO circuit 1 is input to the collector of the transistor Q1 via the resistor R1. Therefore, the current I1 flowing through the transistor Q1 is proportional to VT / R1,
Moreover, since the currents I1 and I2 are equal to each other, the current I2 is also proportional to VT / R1. That is, the current I2 is
If the oscillation frequency f0 of the VCO circuit 1 becomes higher, it will increase accordingly.
【0012】増幅器9は、図4に示す差動増幅器構成で
あって、電圧電流変換回路8で得られた電流I2が差動
増幅器を構成するトランジスタQ3及びQ4の両エミッ
タに、動作電流として供給される。一方のトランジスタ
Q3のベースには、VCO回路1からの発振信号が入力
され、他方のトランジスタQ4のベースには抵抗R4,
R5よりなる分割抵抗からの基準電圧が入力されている
ため、動作電流I2が増加するとこの差動増幅器の増幅
度が大きくなる。従って、発振周波数f0が高くなると
差動増幅器9の増幅度は高くなる。The amplifier 9 has the differential amplifier configuration shown in FIG. 4, and the current I2 obtained by the voltage-current conversion circuit 8 is supplied as an operating current to both emitters of the transistors Q3 and Q4 constituting the differential amplifier. To be done. The oscillation signal from the VCO circuit 1 is input to the base of one transistor Q3, and the resistor R4 is connected to the base of the other transistor Q4.
Since the reference voltage from the dividing resistor of R5 is input, the amplification degree of this differential amplifier increases as the operating current I2 increases. Therefore, the higher the oscillation frequency f0, the higher the amplification degree of the differential amplifier 9.
【0013】元々、動作電流が一定の場合は、差動増幅
器9から出力される振幅レベルは、図5に示すように、
周波数が高くなるとそれに伴って低くなる特性がある
が、この実施例における増幅器では、図6に示すよう
に、逆に、発振周波数が高くなればそれに伴って増幅度
が大きくなるよう制御されるので、図5に示す発振レベ
ルの低下は増幅度の増大によって相殺されることとな
り、結果として、増幅回路7の出力段では、図7に示す
ように、総合的な特性として発振振幅レベルは発振周波
数に対してフラットな特性となる。よって、このフラッ
トな一定値がPLL回路の最低動作レベルを満足するよ
うに設定しさえすればよく、低周波数領域でも過大な振
幅レベルになる恐れはなくなり、それに基づく不要輻射
の発生が抑制される。Originally, when the operating current is constant, the amplitude level output from the differential amplifier 9 is as shown in FIG.
Although there is a characteristic that the higher the frequency is, the lower it is. However, in the amplifier of this embodiment, as shown in FIG. 6, conversely, the higher the oscillation frequency is, the higher the amplification is controlled. The decrease in the oscillation level shown in FIG. 5 is canceled by the increase in the amplification degree, and as a result, the oscillation amplitude level becomes the oscillation frequency as the overall characteristic as shown in FIG. 7 at the output stage of the amplifier circuit 7. It has a flat characteristic. Therefore, it suffices to set this flat constant value so as to satisfy the minimum operation level of the PLL circuit, and there is no fear of an excessive amplitude level even in the low frequency region, and generation of unnecessary radiation based on it is suppressed. .
【0014】次に、図2を参照しながら、本発明の他の
実施例について説明する。先の実施例と異なる点は、電
圧電流変換回路8の入力電圧として、VCO回路1へ印
加する電圧VTを用いる代わりに、コントローラ10か
ら出力されるデータに基づく電圧を用いる点である。P
LL回路2中のプルグラマブルデバイダ3へは、通常、
マイクロコンピュータにて構成されるコントローラ10
から分周数Nが設定され、VCO回路1はこの分周数N
に対応した周波数で発振動作を行う。従って、設定する
分周数Nに対応するデータDNを出力し、これをDA変
換器11でDA変換した電圧を電圧電流変換回路8に印
加すれば、VCO回路1の発振周波数に応じて増幅度を
変化させることができる。Next, another embodiment of the present invention will be described with reference to FIG. The difference from the previous embodiment is that instead of using the voltage VT applied to the VCO circuit 1 as an input voltage of the voltage-current conversion circuit 8, a voltage based on the data output from the controller 10 is used. P
Normally, the pullable programmable divider 3 in the LL circuit 2 is
Controller 10 composed of microcomputer
The frequency division number N is set by the VCO circuit 1 and the frequency division number N is set.
It oscillates at the frequency corresponding to. Therefore, if the data DN corresponding to the frequency division number N to be set is output and the voltage DA-converted by the DA converter 11 is applied to the voltage-current conversion circuit 8, the amplification factor is set according to the oscillation frequency of the VCO circuit 1. Can be changed.
【0015】尚、このようなデジタルデータを用いて制
御するときは、第1実施例のときのように周波数に応じ
て連続的に増幅度を変化させてもよいが、その制御を簡
略化するため離散的なデータを用いて、発振周波数に応
じて段階的に増幅度を変化させるようにしてもよい。ま
た、上述の説明においては、発振周波数に比例して増幅
度を上げる例を示したが、仮に、増幅回路の元来の特性
が周波数に比例して振幅レベルが増大するような場合
は、増幅回路の増幅度を周波数に反比例して下げるよう
にすればよい。When controlling using such digital data, the amplification degree may be continuously changed according to the frequency as in the first embodiment, but the control is simplified. Therefore, the degree of amplification may be changed stepwise according to the oscillation frequency by using discrete data. Further, in the above description, an example is shown in which the amplification degree is increased in proportion to the oscillation frequency. However, if the original characteristic of the amplifier circuit is such that the amplitude level increases in proportion to the frequency, amplification is performed. The amplification factor of the circuit may be lowered in inverse proportion to the frequency.
【0016】[0016]
【発明の効果】本発明によれば、VCO回路の後段に接
続する増幅回路から、VCO回路の発振周波数によらず
一定の振幅レベルの信号を得られるようになり、このた
め、低周波数領域において過大な振幅レベルの信号が発
生しなくなり、不要輻射を低減できるようになる。According to the present invention, a signal having a constant amplitude level can be obtained from the amplifier circuit connected to the subsequent stage of the VCO circuit regardless of the oscillation frequency of the VCO circuit. Therefore, in the low frequency region. A signal having an excessive amplitude level is not generated, and unnecessary radiation can be reduced.
【図1】本発明の一実施例の構成を示すブロック図であ
る。FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.
【図2】本発明の他の実施例の構成を示すブロック図で
ある。FIG. 2 is a block diagram showing the configuration of another embodiment of the present invention.
【図3】実施例における電圧電流変換回路の具体回路図
である。FIG. 3 is a specific circuit diagram of the voltage-current conversion circuit in the embodiment.
【図4】実施例における増幅器の具体回路図である。FIG. 4 is a specific circuit diagram of an amplifier according to an embodiment.
【図5】従来の増幅回路の出力周波数特性図である。FIG. 5 is an output frequency characteristic diagram of a conventional amplifier circuit.
【図6】実施例における増幅器の増幅度の周波数特性図
である。FIG. 6 is a frequency characteristic diagram of the amplification degree of the amplifier in the example.
【図7】実施例における増幅回路の出力総合周波数特性
図である。FIG. 7 is an output total frequency characteristic diagram of the amplifier circuit in the example.
1 VCO回路 2 PLL回路 3 プログラマブルデバイダ 6 LPF 7 増幅回路 8 電圧電流変換回路 9 増幅器 10 コントローラ 11 DA変換回路 1 VCO circuit 2 PLL circuit 3 Programmable divider 6 LPF 7 Amplifying circuit 8 Voltage-current conversion circuit 9 Amplifier 10 Controller 11 DA conversion circuit
Claims (4)
を出力するVCO回路と、該VCO回路の出力信号が入
力されるPLL回路と、該PLL回路の出力が印加され
出力電圧を前記VCO回路に出力するローパスフィルタ
とを備えたPLL周波数シンセサイザ回路において、前
記VCO回路とPLL回路との間に、前記発振周波数に
応じて増幅度が変化する増幅回路を挿入したことを特徴
とするPLL周波数シンセサイザ回路。1. A VCO circuit that outputs an oscillation frequency signal according to an applied voltage, a PLL circuit to which an output signal of the VCO circuit is input, and an output voltage to which the output of the PLL circuit is applied to output the VCO circuit. In a PLL frequency synthesizer circuit having a low-pass filter for outputting to a PLL, an amplifier circuit whose amplification degree changes according to the oscillation frequency is inserted between the VCO circuit and the PLL circuit. circuit.
更に、前記PLL回路中に含まれるプログラマブルデバ
イダに分周数を設定するためのコントローラを有し、該
コントローラは設定する分周数に対応するデータを出力
し、前記増幅回路は、前記データを電圧もしくは電流に
変換する変換回路と、該変換回路からの出力に応じて増
幅度が変化する増幅器とよりなることを特徴とする請求
項1記載のPLL周波数シンセサイザ回路。2. The PLL frequency synthesizer circuit comprises:
Further, the programmable divider included in the PLL circuit has a controller for setting a frequency division number, the controller outputs data corresponding to the frequency division number to be set, and the amplifier circuit outputs the data as a voltage. Alternatively, the PLL frequency synthesizer circuit according to claim 1, comprising a conversion circuit for converting into a current and an amplifier whose amplification degree changes in accordance with an output from the conversion circuit.
される電圧を入力し、該入力電圧に応じて増幅度が変化
する増幅回路であることを特徴とする請求項1記載のP
LL周波数シンセサイザ回路。3. The amplifier circuit according to claim 1, wherein the amplifier circuit is an amplifier circuit which inputs a voltage applied to the VCO circuit and whose amplification degree changes according to the input voltage.
LL frequency synthesizer circuit.
される電圧を比例した電流に変換する電圧電流変換回路
と、該変換回路によって変換された電流を動作電流とし
て入力する差動増幅器とよりなることを特徴とする請求
項3記載のPLL周波数シンセサイザ回路。4. The amplifier circuit comprises a voltage-current conversion circuit that converts a voltage applied to the VCO circuit into a proportional current, and a differential amplifier that inputs the current converted by the conversion circuit as an operating current. The PLL frequency synthesizer circuit according to claim 3, wherein
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23750794A JP3326286B2 (en) | 1994-09-30 | 1994-09-30 | PLL frequency synthesizer circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23750794A JP3326286B2 (en) | 1994-09-30 | 1994-09-30 | PLL frequency synthesizer circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH08102664A true JPH08102664A (en) | 1996-04-16 |
JP3326286B2 JP3326286B2 (en) | 2002-09-17 |
Family
ID=17016350
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23750794A Expired - Fee Related JP3326286B2 (en) | 1994-09-30 | 1994-09-30 | PLL frequency synthesizer circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3326286B2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5821473A (en) * | 1996-07-01 | 1998-10-13 | Kioritz Corporation | Silencer and a method for forming and attaching a silencer to a blower pipe |
US5979013A (en) * | 1998-03-10 | 1999-11-09 | The Toro Company | Portable blower with noise reduction |
US6158082A (en) * | 1998-03-10 | 2000-12-12 | The Toro Company | Portable blower with blower tube noise reduction |
US7062229B2 (en) | 2002-03-06 | 2006-06-13 | Qualcomm Incorporated | Discrete amplitude calibration of oscillators in frequency synthesizers |
-
1994
- 1994-09-30 JP JP23750794A patent/JP3326286B2/en not_active Expired - Fee Related
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5821473A (en) * | 1996-07-01 | 1998-10-13 | Kioritz Corporation | Silencer and a method for forming and attaching a silencer to a blower pipe |
US5979013A (en) * | 1998-03-10 | 1999-11-09 | The Toro Company | Portable blower with noise reduction |
US6158082A (en) * | 1998-03-10 | 2000-12-12 | The Toro Company | Portable blower with blower tube noise reduction |
US6324720B1 (en) | 1998-03-10 | 2001-12-04 | The Toro Company | Portable blower tube noise reduction |
US7062229B2 (en) | 2002-03-06 | 2006-06-13 | Qualcomm Incorporated | Discrete amplitude calibration of oscillators in frequency synthesizers |
US7570925B2 (en) | 2002-03-06 | 2009-08-04 | Qualcomm Incorporated | Discrete amplitude calibration of oscillators in frequency synthesizers |
Also Published As
Publication number | Publication date |
---|---|
JP3326286B2 (en) | 2002-09-17 |
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