JPH08101904A - Integrated circuit device for picture processing - Google Patents

Abstract

PURPOSE: To provide an integrated circuit device for a picture processing for accelerating the processing speed of picture data, drastically reducing faults, lowering a manufacture cost, saving space and reducing a weight. CONSTITUTION: For this integrated circuit device for the picture processing, a base/picture density detection processing circuit 102 for detecting two densities for inputted source picture data, a density reallocation processing circuit 103 for optimizing the density of the picture data passed through a low-pass filter 101 based on the detected result of the base/picture density detection processing circuit 102, a filtering processing circuit 104 for respective areas for discriminating the areas of the picture data, a weighting addition processing circuit 106 for performing the weighting addition of an area discriminated result by the filtering processing circuit 104 and the picture data whose density is optimized by the density reallocation processing circuit 103, a reduction processing circuit 107 for reducing the picture data by a prescribed reduction ratio and a magnification processing circuit 108 for magnifying the picture data by a prescribed magnification ratio are assembled in the wafer of one chip.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing integrated circuit device used in, for example, an electronic copying machine.

[0002]

2. Description of the Related Art With the spread of computers, fax machines, and digital electronic copying machines in recent years, there is an increasing demand for further improvement in the processing speed of digital image data. The processing of digital image data is too slow to be handled by software, so it must be implemented in hardware.

[0003]

However, conventionally, by mounting a general-purpose IC on a PC board at a high density and connecting a plurality of PC boards with a harness or a mother board, the processing speed of digital image data can be improved. I was trying to improve.

The use of a plurality of such PC boards leads to an increase in the size of the entire apparatus for accommodating the PC boards, and the use of a general-purpose IC significantly increases the number of parts and causes failures and defects. There is a problem that becomes.

Therefore, it is an object of the present invention to provide an integrated circuit device for image processing which has a high image data processing speed, drastically reduced breakdowns, low manufacturing cost, space saving, and weight saving. To do.

[0006]

According to another aspect of the present invention, there is provided an image processing integrated circuit device comprising a plurality of processing circuits for performing density correction processing, area filtering processing, and enlargement / reduction processing for input source image data in one chip. Of the integrated circuit substrate.

According to a second aspect of the present invention, there is provided an image processing integrated circuit device, which comprises a density correction process for optimizing the density of input source image data, a region-specific filtering process according to the type of image pattern, a density correction process, and A plurality of processing circuits for performing enlargement processing and reduction processing on the image data subjected to the filtering processing are incorporated in a one-chip integrated circuit substrate.

According to another aspect of the present invention, there is provided an image processing integrated circuit device including a background / image density detection processing circuit for detecting two densities of background data and image data of input source image data, and the background. / Density re-allocation processing circuit that optimizes the density of image data that has passed through a low-pass filter based on the detection result of the image density detection processing circuit, and area-based filtering that determines areas such as characters, photographs, and halftone dots in image data A processing circuit, a weighting addition processing circuit for performing weighted addition of the image data of which the density is optimized by the density reassignment processing circuit and the area discrimination result by the area-specific filtering processing circuit, and the image data is reduced at a predetermined reduction ratio. And a reduction processing circuit that enlarges image data at a predetermined enlargement ratio are incorporated in a one-chip wafer.

[0009]

The function of the present invention will be described below.

According to the image processing integrated circuit device of the present invention, a plurality of processing circuits for performing density correction processing, area filtering processing, and enlargement / reduction processing for input source image data are integrated into a single-chip integrated circuit substrate. The image data processing speed is high, failures are drastically reduced, manufacturing cost is low, and space saving and weight saving can be achieved.

According to the image processing integrated circuit device of the present invention, the density correction processing for optimizing the density of the input source image data, the filtering processing for each area according to the type of the image pattern, and the density correction. Since a plurality of processing circuits for performing enlargement processing and reduction processing for image data subjected to processing and area-specific filtering processing are incorporated in a one-chip integrated circuit substrate, density correction processing, area-specific filtering processing, and enlargement processing. The reduction process can be executed at high speed, the number of failures is drastically reduced, the manufacturing cost is low, and the space saving and the weight saving can be achieved.

According to the image processing integrated circuit device of the present invention, the background / image density detection processing circuit detects the two densities of the background data and the image data for the input source image data, and the density reallocation. Base by processing circuit /
Processing for optimizing the density of image data that has passed through a low-pass filter based on the detection result of the image density detection processing circuit, processing for discriminating areas such as characters, photographs, halftone dots, etc. in image data by the filtering processing circuit for each area, weighting Weighting processing of the image data whose density is optimized by the density re-allocation processing circuit by the addition processing circuit and the area discrimination result by the area-specific filtering processing circuit, and reduction processing for reducing the image data by the reduction processing circuit at a predetermined reduction ratio. The enlargement processing that enlarges the image data by the enlargement processing circuit can be executed at high speed with the configuration consisting of a 1-chip wafer, the failure is drastically reduced, the manufacturing cost is low, and the space saving and weight saving are achieved. Can also be achieved.

[0013]

EXAMPLES Examples of the present invention will be described in detail below.

FIG. 1 shows an image processing system including an image processing integrated circuit device (hereinafter referred to as "image processing LSI") 1 of the present embodiment, and an image forming device 2 to be described later.
Source image data from the CCD sensor 38 constituting the image reading unit 4 is converted into digital image data (for example, 8-bit 256 gradation bit image data) by the A / D conversion unit 90, and then the image processing LSI 1 performs density conversion. The correction processing unit 92, the region-based filtering processing unit 93, and the enlarging / reducing processing unit 94 process the signals and send them to the laser driver 91 that controls the semiconductor laser oscillator 42 described later.

Here, regarding the image processing LSI 1,
This will be described with reference to FIG.

The image processing LSI 1 includes a CCD sensor 3
8 is a low-pass filter 101 that removes noise from the source image data input from 8 and a density correction processing unit 92 that detects two densities of background data and image data of the source image data input from the CCD sensor 38. And a density correction processing unit 92 for optimizing the density of the image data passed through the low-pass filter 101 based on the detection result of the background / image density detection processing circuit 102. Concentration reallocation processing circuit 103
And the low band of the output data of the density re-allocation processing circuit 103 and the area-based filtering processing circuit 104 that configures the area-based filtering processing unit 93 that determines the area of characters, photographs, halftone dots, etc. in the source image data. The high-pass filter 105, a weighting addition processing circuit 106 for performing weighted addition of the image data of which the density is optimized by the density re-allocation processing circuit 103 and the area discrimination result by the area-specific filtering processing circuit 104, and the image data are set to a predetermined value. A reduction processing circuit 107 that constitutes the enlargement / reduction processing unit 94 that reduces at a reduction ratio, and an enlargement processing circuit 108 that configures the enlargement / reduction processing unit 94 that enlarges image data at a predetermined enlargement ratio.
And are incorporated in a wafer which is a one-chip integrated circuit substrate.

The background / image density detection processing circuit 102
For example, since the background density is greatly different between a newspaper and an image-formed paper, and the image density is greatly different between a pencil writing and a ball-point pen, two background densities of these background data and image data are detected. There is.

Since the low-pass filter 101 removes noise by averaging a 2 * 2 matrix,
An external line memory 111 for one line is provided.

The region-specific filtering processing circuit 104
It is well known that, for example, it is desirable to apply different image processing to the character portion, the photograph portion, and the halftone dot portion, so that these three are distinguished.

For the character portion, it is necessary to select a signal whose contour is emphasized through the high pass filter 105. Since the photographic part requires a smooth density change, it is necessary to select a signal that has been low-pass filtered. It is necessary to prevent interference fringes by adding weights to the low-pass filter 101 and the high-pass filter 105 and adding the weighted value to the halftone dot portion.

Therefore, a weighted addition processing circuit 106 is provided for selecting different image processing depending on the identification signal obtained by the region-specific filtering processing circuit 104.

Further, the high-pass filter 105 corresponds to two lines in order to further emphasize the density change of adjacent (neighboring) image data of the image data in which the outline of the character is blurred by passing through the low-pass filter 101. Line memory 112.

The reduction processing of the image data by the reduction processing circuit 107 is realized by controlling the writing in the external line memory 113. Further, the reduction processing circuit 107 is adapted to thin out the writing operation of the image data sent at regular timing in accordance with the reduction rate, or to overwrite the image data at the same address. The reduction operation during the enlargement operation described later is not performed.

The enlargement processing by the enlargement processing circuit 108 is realized by controlling the reading of the external line memory 112. The enlargement processing circuit 108 delays the read timing or repeatedly reads the same address to interpolate the image data increased by the enlargement. However, the interpolation operation is not performed during the above-described reduction processing.

According to the image processing LSI 1, the background / image density detection processing circuit 102 detects the two densities of the background data and the image data for the input source image data, and the density reallocation processing circuit 103 performs the processing. Processing for optimizing the density of image data that has passed through the low-pass filter 101 based on the detection result of the background / image density detection processing circuit 102, and area discrimination of characters, photographs, halftone dots, etc. in the image data by the area-specific filtering processing circuit 104 Is performed, the weighting addition processing circuit 106 performs weighting processing on the image data whose density is optimized by the density reassignment processing circuit 103 and the area determination result by the area-specific filtering processing circuit 104, and the image data by the reduction processing circuit 107. An image generated by the reduction / enlargement processing circuit 108 for reducing at a predetermined reduction ratio. Enlargement processing for enlarging data at a predetermined enlargement rate can be executed at high speed with a configuration consisting of a 1-chip wafer, failures are drastically reduced, manufacturing costs are low, and space saving and weight saving can be achieved. .

FIG. 3 schematically shows an image forming apparatus 2 which constitutes a digital electronic copying machine using the image processing LSI 1.

The image forming apparatus 2 has a configuration in which an image reading section 4 and an image forming section 6 are mounted in a box-shaped apparatus body 3.

The image reading unit 4 is provided with a document table 10 on which a document D having a document image is placed, and a size plate which is arranged at one end of the document table 10 and indicates a position where the document D should be placed. 10a, and a document pressing lid 12 that is formed to be openable and closable with respect to the document table 10 and that allows the document D placed on the document table 10 to come into close contact with the document table 10.

Inside the document table 10 (below), an illumination lamp 22 for illuminating a document D placed on the document table 10,
A reflector 24 that collects the illumination light emitted from the illumination lamp 22 on the original D, and a first mirror 26 that reflects the reflected light from the original D toward a second carriage 30 described later.
The first carriage 20 including is arranged.

The first carriage 20 is arranged so as to be movable in parallel with the document table 10, and is driven by a pulse motor (not shown) via a toothed belt (not shown) or the like.
It is designed to be driven in parallel along 0.

The second carriage arranged on the side of the first carriage 20
The carriage 30 is provided with a second mirror 32 and a third mirror 34 that sequentially bend the reflected light from the document D that is bent via the first mirror 26 of the first carriage 20, with their anti-slope surfaces facing each other. There is. The second carriage 30 is
The first carriage 20 is driven by a toothed belt or the like (not shown) that drives the first carriage 20, and is driven parallel to the first carriage 20 along the document table 10 at a speed of 1/2. It is supposed to be done.

Below the first carriage 20,
A region including the optical axis of the reflected light that has returned through the second carriage 30 is configured to be movable via a drive mechanism (not shown), and provides the reflected light from the second carriage 30 with focusing and reflection. An image forming lens 36 for forming an image of light at a desired magnification, and photoelectric conversion of the reflected light focused through the image forming lens 36, and an electric signal corresponding to an original image of an original D to an image memory (not shown). And a CCD sensor 38 for outputting

The image forming section 6 includes a light source, that is, a semiconductor laser oscillator 42, and the semiconductor laser oscillator 42 corresponds to the image information of the document D read by the image reading section 4.
It has an exposure device 40 that changes the intensity of the laser beam LB from the device and performs exposure scanning with respect to a photosensitive drum 50 as an image carrier described later.

The exposure apparatus 40 provides a laser beam LB generated from a semiconductor laser oscillator 42 controlled by the laser driver 91 with a focusing property and converts the laser beam LB into a laser beam LB having a substantially circular sectional shape (not shown). One lens and a polygon motor 44A as a light deflecting means for deflecting the light converted into the laser beam LB having a circular sectional shape through the first lens along the axial direction of the photosensitive drum 50 described later are driven. In order to sequentially scan the polygon mirror 44 serving as the source and the deflected laser beam LB to a desired position on the photoconductor drum 50, a beam is formed from the deflection angle of the laser beam LB and the optical axis on the photoconductor drum 50. A second lens 46 that matches the distance to the position to be imaged, and a laser beam LB that has passed through the second lens 46 And a mirror 48 for reflecting toward the ram 50.

Further, a photosensitive drum 50 as an image carrier having a conductive support, a photoconductive layer and an insulating layer as a basic structure is arranged at substantially the center of the image forming section 6.

Around the photosensitive drum 50, a pre-exposure device 51 as a residual charge removing means for irradiating the photosensitive drum 50 with light along the rotation direction (arrow direction) to remove residual charges, A charging device 52 as a charging means for uniformly charging the surface of the photosensitive drum 50, and the exposure device 40.
A developing device including a developing roller 54a as a developing unit that develops the electrostatic latent image formed on the surface of the photoconductor drum 50 by irradiating the laser beam LB with a two-component developer including toner and carrier. 54, a corona discharge device as a transfer means for transferring the toner image formed on the photosensitive drum 50 onto a sheet (plain paper, OHP sheet, etc.) P as an image forming medium fed from the sheet cassette 55. Transfer charger 56, a peeling charger 57 using a corona discharge device as a peeling means for peeling the sheet P on which the toner image is transferred from the photosensitive drum 50, and a cleaning means for scraping off the toner remaining on the photosensitive drum 50. Cleaners 58 are arranged in order.

On the inlet side of the transfer charger 56,
A transfer guide 75 as a guide member is provided.

A paper cassette 5 is provided in the main body 3 of the apparatus.
The paper P fed from the paper 5 through the paper feed roller 59 or the paper P fed by the manual paper feed tray 60 through the paper feed roller 61 is fed to the photosensitive drum 50 and the transfer charger 56. A sheet conveying path 64 that leads to a sheet discharge tray 63 mounted on the left side surface of the apparatus main body 3 via an image transfer point 62 as a transfer section shown in FIG.

The image transfer point 6 on the paper transport path 64
On the upstream side of 2, the sheet P is aligned and the sheet P is aligned with the image forming timing of the photoconductor drum 50.
A registration roller pair 65 for feeding the sheet to the image transfer point 62 and a registration roller pre-switch 66 provided near the upstream position of the registration roller pair 65 for detecting the fed paper P are provided.

Further, on the downstream side of the image transfer point 62 of the paper transport path 64, a transport device 67 for transporting the paper P separated from the photoconductor drum 50 by the separation charger 57, and electrostatic transferred to the paper P. The toner image in a state where the toner image is adhered is melted by heating and fixed to the paper P, and the fixing device 68 of the present embodiment, and the paper P on which the toner image is fixed are discharged onto the paper discharge tray 63. A pair of discharge rollers 69 is arranged.

The registration roller pair 65, the transfer guide 75, the peeling supporter 76, the conveying device 67, etc. constitute a conveying means for conveying the paper P so as to pass the image transfer point 62 as a transfer portion.

The image processing LSI 1 of this embodiment has the above-described excellent effects of the image forming apparatus 2 for image data processing.

[0043]

According to the first aspect of the present invention, the image processing integrated device has a high image data processing speed, the number of failures is drastically reduced, the manufacturing cost is low, and the space saving and weight saving can be achieved. A circuit device can be provided.

According to the second aspect of the present invention, density correction processing, area filtering processing, enlargement processing, and reduction processing can be executed at high speed, failures are drastically reduced, manufacturing cost is low, and space is saved and lightweight. It is possible to provide an image processing integrated circuit device which can also be realized.

According to the third aspect of the present invention, the process of detecting the two densities of the background data and the image data, the process of optimizing the density of the image data, the process of discriminating areas such as characters, photographs and halftone dots. For image processing, weighting processing, reduction processing, and enlargement processing can be executed at high speed with a structure consisting of a one-chip wafer, failures are drastically reduced, manufacturing costs are low, and space saving and weight saving can be achieved. An integrated circuit device can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of an image processing LSI of this embodiment.

FIG. 2 is a block diagram showing a detailed configuration of an image processing LSI of this embodiment.

FIG. 3 is a schematic sectional view of an image forming apparatus to which the image processing LSI of this embodiment is applied.

[Explanation of symbols]

 1 Image Processing LSI 2 Image Forming Device 38 CCD Sensor 91 Laser Driver 102 Background / Image Density Detection Processing Circuit 103 Density Reassignment Processing Circuit 104 Region-Specific Filtering Processing Circuit 106 Weighting Addition Processing Circuit 107 Reduction Processing Circuit 108 Enlargement Processing Circuit

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Claims (3)

[Claims] 1. An integrated circuit for image processing, wherein a plurality of processing circuits for performing density correction processing, area filtering processing, and enlargement / reduction processing on input source image data are incorporated in a one-chip integrated circuit substrate. apparatus. 2. A density correction process for optimizing the density of input source image data, a region-specific filtering process according to the type of image pattern, a density correction process, and an enlargement process for the image data subjected to the filtering process. An image processing integrated circuit device comprising a plurality of processing circuits for performing reduction processing incorporated in a one-chip integrated circuit substrate. 3. A background image for detecting two densities of background data and image data for input source image data.
An image density detection processing circuit, a density reassignment processing circuit that optimizes the density of image data that has passed through a low-pass filter based on the detection result of this background / image density detection processing circuit, and characters, photographs, and halftone dots in the image data. Area-specific filtering processing circuit for performing area determination such as, and a weighting addition processing circuit for performing weighted addition of the image data whose density is optimized by the density re-allocation processing circuit and the area determination result by the area-specific filtering processing circuit, An integrated circuit device for image processing, characterized in that a reduction processing circuit for reducing image data at a predetermined reduction ratio and an enlargement processing circuit for expanding image data at a predetermined reduction ratio are incorporated in a one-chip wafer.