JPH0795843B2

JPH0795843B2 - Video signal recording / reproducing device

Info

Publication number: JPH0795843B2
Application number: JP61171393A
Authority: JP
Inventors: 泰俊松尾
Original assignee: Victor Company of Japan Ltd
Current assignee: Victor Company of Japan Ltd
Priority date: 1986-07-21
Filing date: 1986-07-21
Publication date: 1995-10-11
Anticipated expiration: 2010-10-11
Also published as: JPS6327178A

Description

【発明の詳細な説明】産業上の利用分野本発明は映像信号の記録再生装置に係り、例えばVTR等
の記録系及び再生系においてノイズ成分を低減し得る装
置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal recording / reproducing apparatus, and more particularly to an apparatus capable of reducing noise components in a recording system and a reproducing system such as a VTR.

従来の技術第12図は従来装置の再生系のディエンファシス回路の一
例の回路図を示す。端子１に入来した映像信号は高域フ
ィルタ２を介してリミッタ３に供給され、ここで振幅制
限されて第13図（Ａ）に示す信号とされ、係数回路４を
介して減算器５に供給され、ここで元の映像信号から減
算されて第13図（Ｂ）に示す信号（ノイズの残る時間t₁
が比較的長い）とされて出力端子６より取出される。こ
の回路全体の大レベル時及び小レベル時の伝達特性は第
14図に示す如くである。Prior Art FIG. 12 shows a circuit diagram of an example of a de-emphasis circuit of a reproducing system of a conventional device. The video signal input to the terminal 1 is supplied to the limiter 3 through the high-pass filter 2, and the amplitude thereof is limited to the signal shown in FIG. 13 (A), which is supplied to the subtracter 5 via the coefficient circuit 4. It is supplied, wherein Figure 13 is subtracted from the original video signal (B) to indicate the signal (remaining time noise t ₁
Is relatively long) and is taken out from the output terminal 6. The transfer characteristics of the entire circuit at high level and low level are
As shown in Figure 14.

第15図は従来回路の他の例（帰還形）の回路図を示す。
端子１に入来した映像信号は高域フィルタ７を介してリ
ミッタ３に供給され、ここで振幅制限されて第16図
（Ａ）に示す信号とされ、係数回路４を介して減算器５
に供給され、ここで元の映像信号から減算されて第16図
（Ｂ）に示す信号（ノイズの残る時間t₂が比較的短か
い）とされて出力端子６より取出される。この回路全体
の大レベル時及び小レベル時の伝達特性は第17図に示す
如くとなる。FIG. 15 shows a circuit diagram of another example (feedback type) of the conventional circuit.
The video signal input to the terminal 1 is supplied to the limiter 3 via the high-pass filter 7, where the amplitude is limited to the signal shown in FIG.
, And is subtracted from the original video signal to obtain a signal shown in FIG. 16B (the noise remaining time t ₂ is relatively short) and taken out from the output terminal 6. The transfer characteristics of the entire circuit at the high level and the low level are as shown in FIG.

発明が解決しようとする問題点第12図に示す従来回路は、インパルスノイズ（第18図
（Ａ））が入来するとリミッタ３の出力は第18図（Ｂ）
に示す如くとされ、出力端子６より取出される信号は第
18図（Ｃ）に示す如くとなる。一方、第15図に示す従来
回路は、インパルスノイズ（19図（Ａ））が入来すると
リミッタ３の出力は第19図（Ｂ）に示す如くとされ、出
力端子６より取出される信号は第19図（Ｃ）に示す如く
となる。Problems to be Solved by the Invention In the conventional circuit shown in FIG. 12, when impulse noise (FIG. 18 (A)) comes in, the output of the limiter 3 is shown in FIG. 18 (B).
The signal output from the output terminal 6 is
It becomes as shown in FIG. 18 (C). On the other hand, in the conventional circuit shown in FIG. 15, when impulse noise (FIG. 19 (A)) comes in, the output of the limiter 3 is as shown in FIG. 19 (B), and the signal taken out from the output terminal 6 is As shown in FIG. 19 (C).

一般のランダムノイズに対しては第13図（Ｂ）及び第16
図（Ｂ）に示すように第15図示の従来回路の方がユニッ
トステップのエッジ後の残留ノイズ期間（t₂）が少なく
て第12図示の従来回路より良好であるが、インパルスノ
イズに対しては第18図（Ｃ）及び第19図（Ｃ）に示すよ
うに第12図示の従来回路の方が第15図示の回路のような
いわゆる横引きノイズを発生しないので第15図示の従来
回路より良好である。For general random noise, see Fig. 13 (B) and 16
As shown in FIG. 15B, the conventional circuit shown in FIG. 15 has a smaller residual noise period (t ₂ ) after the edge of the unit step and is better than the conventional circuit shown in FIG. As shown in FIGS. 18 (C) and 19 (C), the conventional circuit shown in FIG. 12 does not generate so-called horizontal noise like the circuit shown in FIG. 15, so that the conventional circuit shown in FIG. It is good.

このように、ランダムノイズ、インパルスノイズ共に良
好に対処できる回路は従来なく、この現像はエンファシ
ス量（ノイズ改善量）を大にすればする程顕著に現われ
る問題点があった。As described above, there has been no circuit that can cope with both random noise and impulse noise, and this development has the problem that the more significant the emphasis amount (noise improvement amount) is, the more noticeable it is.

本発明は、エンファシス量を大にしてもランダムノイズ
及びインパルスノイズの両方に有効に対処し得る映像信
号の記録再生装置を提供することを目的とする。It is an object of the present invention to provide a video signal recording / reproducing apparatus which can effectively deal with both random noise and impulse noise even if the amount of emphasis is large.

問題点を解決するための手段エンファシス回路及びディエンファシス回路の時定数回
路の時定数をTs、小振幅時における入力信号の低域周波
数成分に対する高域周波数成分の強調量をＸ＋1,エンフ
ァシス効果が始まる低域側のカットオフ周波数に対応し
た時定数をＴとすると、Ｔ＞Ts＞T/（Ｘ＋１）に設定してなる。Means for solving the problem Time constant of the emphasis circuit and de-emphasis circuit The time constant of the circuit is Ts, the emphasis amount of the high frequency component to the low frequency component of the input signal at the time of small amplitude is X + 1, and the emphasis effect starts. Assuming that the time constant corresponding to the cutoff frequency on the low frequency side is T, T>Ts> T / (X + 1).

作用時定数回路の時定数Tsを、Ｔ＞Ts＞T/（Ｘ＋１）に設定
することにより、特に、インパルスノイズが入来した時
のリミッタ出力の立下り後の波形を従来の帰還形のノイ
ズ低減回路に対して改善でき、これにより、いわゆる横
引きノイズを生じることはなく、又、帰還形であるため
にランダムに対してもノイズ残留時間が短かい。By setting the time constant Ts of the action time constant circuit to T>Ts> T / (X + 1), the waveform after the falling edge of the limiter output, especially when impulse noise enters, can be used as a conventional feedback noise. This can be improved with respect to the reduction circuit, so that so-called horizontal pulling noise is not generated, and the noise residual time is short even for random because it is a feedback type.

実施例第１図（Ａ），（Ｂ）は夫々本発明装置の第１実施例の
記録系及び再生系のエンファシス回路の回路図を示す。
第１図（Ａ）に示す回路における高域フィルタ８におけ
る時定数をTs、係数回路21の係数をＸ、エンファシス効
果（ノイズ低減効果）が始まる周波数に対応した時定数
をＴとすると、Ｔ＞Ts＞T/（Ｘ＋１）（１）のように設定する。これにより、回路全体の大レベル時
及び小レベル時の伝達特性は第４図（Ａ）に示す如くと
される。First Embodiment FIGS. 1A and 1B are circuit diagrams of an emphasis circuit of a recording system and a reproducing system of a first embodiment of the device of the present invention, respectively.
Assuming that the time constant in the high-pass filter 8 in the circuit shown in FIG. 1A is Ts, the coefficient of the coefficient circuit 21 is X, and the time constant corresponding to the frequency at which the emphasis effect (noise reduction effect) starts is T, T>Ts> T / (X + 1) Set as (1). As a result, the transfer characteristics of the entire circuit at high level and low level are as shown in FIG. 4 (A).

第１図（Ａ）において、端子１に入来した映像信号a
₁（第２図（Ａ））は高域フィルタ８にて信号c₁（同図
（Ｃ））とされ、リミッタ23にて振幅制限されて信号d₁
（同図（Ｄ））とされる。信号d₁は係数Ｋを設定されて
いる時定数を設定するための係数回路29を介して加算器
30に供給されて信号b₁（同図（Ｂ））とされる一方、係
数Ｘを設定されているエンファシス量を設定するための
係数回路31を介して加算器32に供給されて信号e₁（同図
（Ｅ））とされて出力端子６より取出される。第２図
（Ｃ）に示す如く、波形の立下り直後の時定数はＴ≒Ts
であり、その後の時定数はＴ＝（1/1＋Ｋ）Tsである。In FIG. 1 (A), the video signal a input to the terminal 1
₁ (FIG. 2 (A)) is made into the signal c ₁ (FIG. 2 (C)) by the high-pass filter 8, and the amplitude is limited by the limiter 23 to obtain the signal d ₁
((D) in the figure). The signal d ₁ is added to the adder via the coefficient circuit 29 for setting the time constant for which the coefficient K is set.
The signal e ₁ is supplied to the adder 32 through the coefficient circuit 31 for setting the coefficient X and the set emphasis amount while being supplied to the signal 30 as the signal b ₁ ((B) in the figure). ((E) in the figure) and is taken out from the output terminal 6. As shown in FIG. 2 (C), the time constant immediately after the fall of the waveform is T≈Ts
And the subsequent time constant is T = (1/1 + K) Ts.

次に、端子１にインパルス信号a₂（第３図（Ａ））が入
来すると、高域フィルタ８にて信号c₂（同図（Ｃ））と
され、リミッタ23にて振幅制限されて信号d₂（同図
（Ｄ））とされる。信号d₂は係数回路29を介して加算器
30に供給されて信号b₂（同図（Ｂ））とされる一方、係
数回路31を介して加算器32に供給されて信号e₂（同図
（Ｅ））とされて出力端子６より取出される。Next, when the impulse signal a ₂ (FIG. 3 (A)) is input to the terminal 1, it is converted into the signal c ₂ (FIG. 3 (C)) by the high-pass filter 8 and the amplitude is limited by the limiter 23. The signal is d ₂ ((D) in the figure). The signal d ₂ is added via the coefficient circuit 29 to the adder.
The signal b ₂ (shown in FIG. 7B) is supplied to 30 and the signal e ₂ (shown in FIG. 7E) is supplied to the adder 32 via the coefficient circuit 31 and is output from the output terminal 6. Taken out.

第１図（Ｂ）に示す高域フィルタ８における時定数をT
s、係数回路11の係数をＸ、ノイズ低減効果が始まる周
波数に対応した時定数をＴとすると、Ｔ＞Ts＞T/（Ｘ＋１）（１）のように設定する。これにより、回路全体の大レベル時
及び小レベル時の伝達特性は第４図（Ｂ）に示す如くと
される。The time constant of the high-pass filter 8 shown in FIG.
s, the coefficient of the coefficient circuit 11 is X, and the time constant corresponding to the frequency at which the noise reduction effect starts is T. T>Ts> T / (X + 1) (1) As a result, the transfer characteristics of the entire circuit at high level and low level are as shown in FIG. 4 (B).

ここで、第１図（Ａ），（Ｂ）において、時定数TsをTs
＝｛（Ｋ＋１）／（Ｘ＋１）｝Ｔにした場合、前記
（１）式を満足させるには係数回路29の係数ｋの範囲を
０＜Ｋ＜Ｘに設定する。第１図（Ｂ）の回路の伝達関数
は、であり、第１図（Ａ）の回路の伝達回関数は上式の逆数
である。Here, in FIGS. 1A and 1B, the time constant Ts is Ts.
= {(K + 1) / (X + 1)} T, the range of the coefficient k of the coefficient circuit 29 is set to 0 <K <X in order to satisfy the expression (1). The transfer function of the circuit of FIG. 1 (B) is And the transfer function of the circuit of FIG. 1 (A) is the reciprocal of the above equation.

第１図（Ｂ）において、端子１に入来した映像信号a
₃（第５図（Ａ））は高域フィルタ８にて信号c₃（同図
（Ｃ））とされ、リミッタ３にて振幅制限されて信号d₃
（同図（Ｄ））とされる。信号d₃は係数Ｋを設定されて
いる時定数を設定するための係数回路29を介して加算器
10に供給されて信号e₃（同図（Ｅ））とされる一方、係
数Ｘを設定されているノイズ低減量（ディエンファシス
量）を設定するための係数回路11を介して減算器12に供
給されて信号b₃（同図（Ｂ））とされて出力端子６より
取出される。第５図（Ｃ）に示す如く、波形の立下り直
後の時定数はＴ≒Tsであり、その後の時定数はＴ＝
｛（１＋Ｘ）／（１＋Ｋ）｝Tsである。In FIG. 1 (B), the video signal a input to the terminal 1
₃ (FIG. 5 (A)) is converted into the signal c ₃ (FIG. 5 (C)) by the high-pass filter 8, and the amplitude is limited by the limiter 3 to obtain the signal d ₃
((D) in the figure). The signal d ₃ is added to the adder via the coefficient circuit 29 for setting the time constant for which the coefficient K is set.
10 is supplied to the signal e ₃ ((E) in the figure), and the coefficient X is set to the subtracter 12 via the coefficient circuit 11 for setting the set noise reduction amount (de-emphasis amount). The signal is supplied and made a signal b ₃ (FIG. 7B) and taken out from the output terminal 6. As shown in FIG. 5 (C), the time constant immediately after the fall of the waveform is T≈Ts, and the time constant thereafter is T =
{(1 + X) / (1 + K)} Ts.

このように本発明では帰還形を用いているのでランダム
ノイズに関しては第12図の従来回路のようにノイズの残
る時間は少ない。As described above, since the feedback type is used in the present invention, the remaining time of random noise is small as in the conventional circuit of FIG.

次に、端子１にインパルスノイズa₄（第６図（Ａ））が
入来すると、高域フィルタ８にて信号c₄（同図（Ｃ））
とされ、リミッタ３にて振幅制限されて信号d₄（同図
（Ｄ））とされる。信号d₄は係数回路29を介して加算器
10に供給されて信号e₄（同図（Ｅ））にされる一方、係
数回路11を介して減算器12に供給されて信号b₄（同図
（Ｂ））とされて出力端子６より取出される。この場
合、高域フィルタ８の時定数Tsを、Ｔ＞Ts＞T/（Ｘ＋
１）のように設定しているため、リミッタ３の出力d
₄（第６図（Ｄ））の立下り後の波形を第15図示の従来
回路に対して改善でき、これにより、第６図（Ｂ）に示
す如く第19図（Ｃ）に示すようないわゆる横引きノイズ
を殆ど生じることはない。Next, when impulse noise a ₄ (Fig. 6 (A)) enters terminal 1, signal c ₄ (Fig. 6 (C)) is passed through high-pass filter 8.
And the amplitude is limited by the limiter 3 to obtain a signal d ₄ ((D) in the figure). The signal d ₄ is added via the coefficient circuit 29 to the adder.
10 is supplied to the signal e ₄ ((E) in the figure) and is supplied to the subtractor 12 via the coefficient circuit 11 to be a signal b ₄ ((B) in the figure) from the output terminal 6. Taken out. In this case, the time constant Ts of the high-pass filter 8 is T>Ts> T / (X +
Since the setting is as shown in 1), the output d of the limiter 3
₄ (FIG. 6 (D)) after falling can be improved as compared with the conventional circuit shown in FIG. 15, and as a result, as shown in FIG. 6 (B), as shown in FIG. 19 (C). So-called horizontal noise is hardly generated.

なお、VTRの再生側だけで行なうノイズキャンセラの場
合には係数Ｘは∽近くに設定する場合が多く、このとき
のTsは、Ｔ＞Ts＞T/3のように設定するのが実用的であ
る。In the case of a noise canceller that is used only on the playback side of a VTR, the coefficient X is often set near ∽, and it is practical to set Ts such that T>Ts> T / 3. .

第７図（Ａ）は本発明装置の第２実施例の記録系の回路
図を示す。このものも第１実施例と同様に高域フィルタ
８に時定数Tsを前記（１）式のように設定し、回路全体
の伝達特性を第４図（Ａ）に示す如くとする。FIG. 7A shows a circuit diagram of a recording system of the second embodiment of the device of the present invention. Similarly to the first embodiment, the time constant Ts is set in the high-pass filter 8 as in the equation (1), and the transfer characteristic of the entire circuit is as shown in FIG. 4 (A).

端子１に入来した映像信号は高域フィルタ８を介してリ
ミッタ３に供給されてここで振幅制限され、係数ｋを設
定されている時定数を設定するための係数回路９を介し
て減算器14に供給される。リミッタ３の出力は係数X/
（Ｘ＋１）を設定されているエンファシス量を設定する
ための係数回路15、加算器35を介して出力端子６より取
出される。The video signal input to the terminal 1 is supplied to the limiter 3 via the high-pass filter 8 where the amplitude is limited, and the subtractor is supplied via the coefficient circuit 9 for setting the time constant for which the coefficient k is set. Supplied to 14. The output of the limiter 3 is the coefficient X /
(X + 1) is taken out from the output terminal 6 through the coefficient circuit 15 and the adder 35 for setting the set emphasis amount.

第７図（Ｂ）は本発明装置の第２実施例の再生系の回路
図を示す。このものも第１実施例と同様に高域フィルタ
８に時定数Tsを前記（１）式のように設定し、回路全体
の伝達特性を第４図（Ｂ）に示す如くとする。FIG. 7B shows a circuit diagram of the reproducing system of the second embodiment of the device of the present invention. As in the case of the first embodiment, the time constant Ts is set in the high-pass filter 8 as shown in the equation (1), and the transfer characteristic of the entire circuit is as shown in FIG. 4 (B).

端子１に入来した映像信号は高域フィルタ８を介してリ
ミッタ３に供給されてここで振幅制限され、係数ｋを設
定されている時定数を設定するための係数回路９を介し
て減算器14に供給される。リミッタ３の出力は係数X/
（Ｘ＋１）を設定されているノイズ低減量（ディエンフ
ァシス量）を設定するための係数回路15、減算器16を介
して出力端子６より取出される。The video signal input to the terminal 1 is supplied to the limiter 3 via the high-pass filter 8 where the amplitude is limited, and the subtractor is supplied via the coefficient circuit 9 for setting the time constant for which the coefficient k is set. Supplied to 14. The output of the limiter 3 is the coefficient X /
It is taken out from the output terminal 6 via the coefficient circuit 15 and the subtracter 16 for setting the set noise reduction amount (de-emphasis amount) to (X + 1).

ここで、第７図（Ａ），（Ｂ）において、時定数TsをTs
＝（１−ｋ）Ｔにした場合、前記（１）式を満足させる
には係数回路９の係数ｋの範囲をに設定する。第７図（Ｂ）の回路の伝達関数は、であり、第７図（Ａ）の回路の伝達関数は上式の逆数で
ある。Here, in FIGS. 7A and 7B, the time constant Ts is Ts.
= (1-k) T, the range of the coefficient k of the coefficient circuit 9 is set to satisfy the above expression (1). Set to. The transfer function of the circuit of FIG. 7 (B) is And the transfer function of the circuit of FIG. 7 (A) is the reciprocal of the above equation.

第８図（Ａ），（Ｂ）は夫々本発明回路の第３実施例の
記録系及び再生系の回路図を示す。同図（Ａ），（Ｂ）
は第７図（Ａ）の高域フィルタ８を高域フィルタ17と
し、第７図（Ａ），（Ｂ）の係数回路15を係数（１＋
Ｋ）X/（Ｘ＋１）の係数回路18としたものである。第８
図（Ａ），（Ｂ）において、高域フィルタ17の時定数Ts
をTs＝｛1/（１＋Ｋ）｝Ｔにした場合、前記（１）式を
満足させるには係数回路29の係数Ｋの範囲をＯ＜Ｋ＜Ｘ
に設定する。第８図（Ｂ）の回路の伝達関数は、であり、第８図（Ａ）の伝達関数は上式の逆数である。FIGS. 8A and 8B are circuit diagrams of the recording system and the reproducing system of the third embodiment of the circuit of the present invention, respectively. The same figure (A), (B)
Is the high-pass filter 17 of FIG. 7 (A), and the coefficient circuit 15 of FIGS. 7 (A) and (B) is the coefficient (1+
K) X / (X + 1) coefficient circuit 18. 8th
In FIGS. (A) and (B), the time constant Ts of the high-pass filter 17
Is set to Ts = {1 / (1 + K)} T, the range of the coefficient K of the coefficient circuit 29 is O <K <X in order to satisfy the expression (1).
Set to. The transfer function of the circuit of FIG. 8 (B) is And the transfer function of FIG. 8 (A) is the reciprocal of the above equation.

第９図（Ａ），（Ｂ）は本発明回路の第４実施例の記録
系及び再生系の回路図を示す。同図（Ａ）は第７図
（Ｂ）の高域フィルタ８を高域フィルタ17とし、第７図
（Ｂ）の係数回路15を係数（１−ｋ）Ｋの係数回路19と
し、第７図（Ｂ）の減算器（14,16を加算器35,36とした
ものであり、第９図（Ｂ）は第７図（Ａ）の高域フィル
タ８を高域フィルタ17とし、第７図（Ａ）の係数回路15
を係数（１−ｋ）Ｘの係数回路19とし、第７図（Ａ）の
加算器35、減算器14を夫々減算器14、加算器35としたも
のである。FIGS. 9A and 9B are circuit diagrams of the recording system and the reproducing system of the fourth embodiment of the circuit of the present invention. In FIG. 7A, the high-pass filter 8 of FIG. 7B is used as the high-pass filter 17, the coefficient circuit 15 of FIG. 7B is used as the coefficient circuit 19 of the coefficient (1-k) K, and The subtractor (14, 16) of FIG. 9B is an adder 35, 36. In FIG. 9B, the high-pass filter 8 of FIG. Coefficient circuit 15 in FIG.
Is a coefficient circuit 19 of coefficient (1-k) X, and the adder 35 and the subtractor 14 in FIG. 7A are a subtractor 14 and an adder 35, respectively.

第９図（Ａ），（Ｂ）において、高域フィルタ17の時定
数TsをTs＝［1/｛（１−Ｋ）（Ｘ＋１）｝］Ｔにした場
合、前記（１）式を満足させるには係数Ｋを設定されて
いる係数回路９の係数Ｋの範囲をに設定する。第９図（Ｂ）の回路の小振幅時の伝達関数
は、であり、第９図（Ａ）の伝達関数は上式の逆数である。In FIGS. 9A and 9B, when the time constant Ts of the high-pass filter 17 is Ts = [1 / {(1-K) (X + 1)}] T, the equation (1) is satisfied. Is the range of the coefficient K of the coefficient circuit 9 in which the coefficient K is set. Set to. The transfer function of the circuit of FIG. 9 (B) at a small amplitude is And the transfer function of FIG. 9 (A) is the reciprocal of the above equation.

なお、第10図に示す如く、記録系回路は第２乃至第３実
施例に示す再生系回路40を演算増幅器41の帰還路に設け
るようにしてもよい。As shown in FIG. 10, as the recording system circuit, the reproducing system circuit 40 shown in the second to third embodiments may be provided in the feedback path of the operational amplifier 41.

また、第20図に示す如く、第1,第４実施例に示す記録系
回路40′演算増幅器41の帰還路に設けるようにしてもよ
い。Further, as shown in FIG. 20, it may be provided in the feedback path of the recording system circuit 40 'operational amplifier 41 shown in the first and fourth embodiments.

又、第11図に示すように記録系，再生系を１つの回路で
兼用してもよい。記録時、スイッチ42をオフにして出力
端子6_Rより記録出力を取出す一方、再生時、スイッチ42
をオンにして出力端子6_pより再生出力を取出す。Also, as shown in FIG. 11, the recording system and the reproducing system may be combined into one circuit. During recording, switch 42 is turned off and the recording output is taken out from output terminal 6 _R, while during playback, switch 42
Turn on and extract the playback output from the output terminal 6 _p .

発明の効果本発明装置によれば、特に、再生系において、帰還形を
用いているので、ランダムノイズに対してはエッジ後の
残留ノイズ期間を少なくし得、又、時定数回路の時定数
TsをＴ＞Ts＞T/（Ｘ＋１）のように設定しているので、
インパルスノイズに対してはリミッタ出力の立下り後の
波形を従来の帰還形のノイズ低減回路に対して改善で
き、これにより、いわゆる横引きノイズを生じることは
なく、総合的にみて、エンファシス量を大にしてもラン
ダムノイズ及びインパルスノイズの両方に有効に対処し
得、SN比を高くとり得又、記録系においても再生系と相
補的なエンファシスを得ることで、波形欠損を生じるこ
となく総合的にランダムノイズ及びインパルスノイズの
両方に有効にS/N比を高く得られるエンファシス特性を
得ることができる等の特長を有する。EFFECTS OF THE INVENTION According to the device of the present invention, since the feedback type is used particularly in the reproducing system, the residual noise period after the edge can be reduced with respect to random noise, and the time constant of the time constant circuit is reduced.
Since Ts is set as T>Ts> T / (X + 1),
For impulse noise, the waveform after the fall of the limiter output can be improved compared with the conventional feedback type noise reduction circuit, so that so-called horizontal pulling noise does not occur, and the emphasis amount as a whole is seen. Even if it is large, both random noise and impulse noise can be effectively dealt with, the S / N ratio can be made high, and even in the recording system, the complementary emphasis with the reproducing system can be obtained, so that a comprehensive waveform can be obtained without causing waveform loss. In addition, it has the advantage of being able to obtain an emphasis characteristic that can effectively obtain a high S / N ratio for both random noise and impulse noise.

[Brief description of drawings]

第１図は本発明装置の第１実施例の回路図、第２図及び
第３図は本発明装置の記録系の動作説明用信号波形図、
第４図は本発明装置の伝達特性図、第５図及び第６図は
本発明装置の再生系の動作説明用信号波形図、第７図乃
至第９図は本発明装置の第２乃至第４実施例の回路図、
第10図は再生系回路を演算増幅器の帰還路に設けた回路
図、第11図は記録系及び再生系を１つの回路で兼用した
回路図、第12図は従来回路の一例の回路図、第13図及び
第14図は夫々第12図示の回路の信号波形図及び伝達特性
図、第15図は従来回路の他の例の回路図、第16図及び第
17図は夫々第15図示の回路の信号波形図及び伝達特性
図、第18図及び第19図は夫々第８図示の回路及び第11図
示の回路の信号出波形図、第20図は記録系回路を演算増
幅器の帰還路に設けた回路図である。１……入力端子、3,3₁,3₂……リミッタ、6,6_P,6_R……出
力端子、8,17……高域フィルタ、9,11,15,18,19,29,31
……係数回路、10,30,32,35,36……加算器、12,14,16…
…減算器、40……再生系回路、40′……記録系回路。41
……演算増幅器、42……スイッチ。FIG. 1 is a circuit diagram of a first embodiment of the device of the present invention, FIGS. 2 and 3 are signal waveform diagrams for explaining the operation of the recording system of the device of the present invention,
FIG. 4 is a transfer characteristic diagram of the device of the present invention, FIGS. 5 and 6 are signal waveform diagrams for explaining the operation of the reproducing system of the device of the present invention, and FIGS. 7 to 9 are second to second of the device of the present invention. 4 is a circuit diagram of the embodiment,
FIG. 10 is a circuit diagram in which a reproducing system circuit is provided in a feedback path of an operational amplifier, FIG. 11 is a circuit diagram in which one circuit is used as a recording system and a reproducing system, and FIG. 12 is a circuit diagram of an example of a conventional circuit, 13 and 14 are signal waveform diagrams and transfer characteristic diagrams of the circuit shown in FIG. 12, respectively, and FIG. 15 is a circuit diagram of another example of the conventional circuit, FIG. 16 and FIG.
17 is a signal waveform diagram and a transfer characteristic diagram of the circuit shown in FIG. 15, respectively. FIGS. 18 and 19 are signal output waveform diagrams of the circuit shown in FIG. 8 and the circuit shown in FIG. 11, respectively. FIG. 20 is a recording system. It is a circuit diagram which provided the circuit in the return path of an operational amplifier. 1 …… Input terminal, 3,3 ₁ , 3 ₂ …… Limiter, 6,6 _P , 6 _R …… Output terminal, 8,17 …… High-pass filter, 9,11,15,18,19,29, 31
…… Coefficient circuit, 10,30,32,35,36 …… Adder, 12,14,16…
… Subtractor, 40… Reproduction system circuit, 40 ′… Recording system circuit. 41
…… Operational amplifier, 42 …… Switch.

Claims

[Claims]

1. A low-frequency side cut is performed by extracting an input video signal through a time constant circuit, limiting the amplitude, and feeding this back to the input side through a coefficient circuit to calculate the input video signal. In a video signal recording apparatus having an emphasis circuit configured to emphasize an amplitude of an input video signal from an off frequency and stop the emphasis from a cutoff frequency on a high frequency side to obtain an output signal, a time constant circuit of the emphasis circuit. Let Ts be the time constant of X, the enhancement amount of the high frequency component to the low frequency component of the input signal at small amplitude is X + 1, and the time constant corresponding to the cutoff frequency on the low frequency side where the emphasis effect starts is T >Ts> T / (X + 1).

2. A low-frequency side cut is performed by extracting an input video signal through a time constant circuit, limiting the amplitude, and feeding back this to the input side through a coefficient circuit to calculate the input video signal. An emphasis circuit having a configuration for emphasizing the amplitude of the input video signal from the off frequency and stopping the enhancement from the cutoff frequency on the high frequency side to obtain an output signal, and a de-emphasis circuit having a configuration complementary to the emphasis circuit. In the video signal recording / reproducing apparatus having the above, the time constant of the emphasis circuit is Ts, the emphasis amount of the high frequency component with respect to the low frequency component of the input signal at the time of a small amplitude is X + 1, and the emphasis effect is cut at the low frequency side A video signal recording / reproducing apparatus, wherein T>Ts> T / (X + 1), where T is a time constant corresponding to the off-frequency.

3. The emphasis circuit extracts the input video signal via a time constant circuit, limits the amplitude of the input video signal, and feeds it back to the input side via a first coefficient circuit for setting the time constant. The input video signal is added and supplied to the time constant circuit,
A configuration in which the input video signal is added and extracted via a second coefficient circuit for setting the enhancement amount of the high frequency component with respect to the low frequency component of the amplitude-limited output. A video signal recording device according to claim 1 or a video signal recording and reproducing device according to claim 2.

4. The emphasis circuit extracts the input video signal via a time constant circuit and then limits the amplitude of the input video signal to set an emphasis amount of a high frequency component to a low frequency component of the input video signal. The signal is fed back to the input side via the coefficient circuit 2 and added to the input video signal to be taken out, and is fed back to the input side via the first coefficient circuit for setting the amplitude-limited output and added. The video signal recording apparatus according to claim 1 or the video signal recording / reproducing apparatus according to claim 2, characterized in that the output is subtracted and the result is supplied to the time constant circuit. .

5. The de-emphasis circuit takes out an input video signal through a time constant circuit, limits the amplitude, and feeds back this to the input side through a first coefficient circuit for setting a time constant. The input video signal is subtracted from the input video signal and supplied to the time constant circuit, and the output whose amplitude is limited is input through a second coefficient circuit for setting a suppression amount (noise reduction amount) of high frequency components. The video signal recording / reproducing apparatus according to claim 2, wherein the video signal is subtracted from the video signal to be taken out.

6. The de-emphasis circuit extracts an input video signal via a time constant circuit and then limits the amplitude of the input video signal, and sets a second high frequency component suppression amount (noise reduction amount). It is fed back to the input side through a coefficient circuit and subtracted from the input video signal to be taken out, and the amplitude-limited output is fed back to the input side through a first coefficient circuit for setting a time constant and the subtraction is performed. The video signal recording / reproducing apparatus according to claim 2, wherein the time constant circuit is added to the output and added.

7. The emphasis circuit and a de-emphasis circuit having a configuration complementary to the emphasis circuit take out an input video signal through a time constant circuit at the time of recording, limit the amplitude of the input video signal, and then set a time constant. 1 is fed back to the input side via the coefficient circuit, added to the input video signal and supplied to the time constant circuit, and the output of the time constant circuit is amplitude-limited, and then the high frequency component of the low frequency component is It is used as an emphasis circuit configured to add and extract the input video signal through a second coefficient circuit for setting the amount of emphasis, and during reproduction, the output of the second coefficient circuit is fed back to the input side. 3. The video signal recording / reproducing apparatus according to claim 2, wherein the video signal recording / reproducing apparatus is also used as a de-emphasis circuit for subtracting and extracting the input video signal.