JPH0786520B2 - Output level measuring device for receiving antenna - Google Patents

Description

The present invention relates to an output level measuring device for measuring an output level from a receiving antenna.

[Prior Art] Conventionally, a device of this type selects a communication signal of a predetermined channel specified by a user from a received signal output from a receiving antenna, detects the selected communication signal, The detected voltage is converted into an absolute level and displayed.

However, in this type of device, the detection voltage fluctuates due to variations in the characteristics of the signal system from the input terminal of the reception signal to the detection circuit that detects the selected communication signal, which causes an error in the absolute level display value. There was a problem. Therefore, conventionally, each device is provided with a calibration table indicating the error of the measurement result.

[Problems to be Solved by the Invention] However, in such a measure, the user must correct the absolute level displayed on the device using this calibration table every time the level is measured, and the measurement work is Becomes complicated. Also, the absolute level may be erroneously measured due to misreading of the calibration table or calculation error.

The present invention has been made in view of these problems, and an object thereof is to provide an output level measuring device for a receiving antenna capable of always displaying an accurate absolute level even if the characteristics of a signal system vary. It was

[Means for Solving the Problems] That is, the present invention made to achieve the above object is
As illustrated in the figure, a tuning circuit that tunes a communication signal of a predetermined channel from the received signals output from the receiving antenna, a detection circuit that detects the selected communication signal, and an output from the detection circuit. Based on the conversion data stored in the storage means, the conversion data for converting the absolute level of the communication signal from the detected voltage is stored in advance, and the absolute level of the communication signal is calculated from the detection voltage based on the conversion data stored in the storage means. In the output level measuring device of the receiving antenna equipped with an absolute level calculating means for calculating and displaying on the display device, from outside, a calibration command for the channel selection channel of the channel selection circuit, the absolute level of the communication signal, and the conversion data. And input terminals for inputting, respectively, and when the calibration command is input from the input terminals, the channel selection channel of the channel selection circuit is set to the input terminals. And a tuning control unit for controlling the tuning channel input from, and when the tuning control unit controls the tuning channel of the tuning circuit, the detection voltage output from the detection circuit is read and By storing in the storage means in association with the absolute level input from the input terminal,
A gist is an output level measuring device for a receiving antenna, comprising: a conversion data updating means for updating the conversion data.

[Operation] In the reception state detection device of the present invention configured as described above, when the calibration command is not input to the input terminal, the absolute level calculation means detects the detection circuit based on the conversion data stored in the storage means. Calculate the absolute level of the detection voltage of the communication signal selected by the tuning circuit output from
Display on the display device. On the other hand, when a calibration command is input to the input terminal, the tuning control means controls the tuning channel of the tuning circuit to the tuning channel input from the input terminal, and the conversion data updating means outputs from the detection circuit. The converted data is updated by associating the detected voltage and the absolute level input from the input terminal with each other and storing them in the storage means.

EXAMPLES Examples of the present invention will be described below with reference to the drawings.

First, Fig. 2 shows the reception of radio waves sent from communication satellites.
Schematic showing the overall configuration of an output level measuring device for measuring the output level of a reception signal from a communication satellite radio wave reception parabolic antenna (reception antenna) which converts and outputs a predetermined (1 GHz band in this embodiment) intermediate frequency signal It is a block diagram.

As shown in the figure, the output level measuring apparatus 10 of the present embodiment includes an amplifier circuit 14 for amplifying a received signal (950 to 1880 MHz) from the receiving antenna input to the received signal input terminal 12, and the amplified received signal. A variable attenuator 16 that attenuates the level,
Variable oscillation circuit 18 whose oscillation frequency can be changed between 1350 and 2280 MHz, output signal from variable oscillation circuit 18 and variable attenuator
By mixing with the received signal from 16, the communication signal of the specific channel in the received signal is 400MHz band (center frequency is 402.78MHz)
The mixer 20 for converting into a signal of, the amplifier circuit 22 for amplifying the output signal from the mixer 20, and the communication signal of the specific channel in the 400 MHz band (center frequency 402.78 MHz, band A well-known channel selection circuit 26 including a bandpass filter (hereinafter simply referred to as BPF) 24 that passes only a width of ± 5 MHz) is provided.

Further, in the output level measuring device 10, other than the above tuning circuit 26,
A detection circuit 28 that detects the output signal from the channel selection circuit 26, an A / D converter (hereinafter simply referred to as ADC) 30 that converts the detection voltage VD output from the detection circuit 28 into a digital signal, the channel that is selected when measuring the level. And a display unit 34 including a liquid crystal display panel, a display circuit 36 for driving the display unit 34, the device.
A calibration command to change 10 from the level measurement mode to the calibration mode, the calibration tuning channel required for calibration, the control signal input terminal 38 for inputting the calibration input level, and the control signal input terminal 38 and A control circuit 40 including a CPU 40a, a ROM 40b, a non-volatile RAM 40c, and a well-known microcomputer that executes various processes such as a level measurement routine and a calibration routine described later according to an input signal from the operation unit 32. It is equipped.

The output level measuring apparatus 10 of the present embodiment configured as described above
Then, as shown in FIG. 3 (a), the output terminal 52 of the reception antenna 50 and the reception signal input terminal 12 are connected by the coaxial cable 54, and the operation section 32 provided on the front surface of the device is operated to select a channel. When a channel is designated, the control circuit 40 executes a tuning routine (not shown), adjusts the oscillation frequency of the variable oscillation circuit 18 according to the tuning channel, and communicates with the tuning channel designated by the tuning circuit 26. Select a signal. After that, when the operation section 32 is operated to input the level measurement start command, the control circuit 40 executes the level measurement routine shown in FIG. 4 and displays the input level (absolute value) of the selected channel on the display section 34. To do.

The level measuring routine will be described below.

As shown in FIG. 4, when the level measurement routine is started, first in step 100, the detection voltage VD output from the detection circuit 28 via the ADC 30 is read, and in step 110
Then, it is determined whether or not the read detection voltage VD exceeds the upper limit value VD max stored in the RAM 40c in advance. Here, the upper limit value VD max is the variable attenuator 16 so that the input level of the communication signal to the detection circuit 28 becomes the optimum level.
It is a reference value for increasing the attenuation amount ATT of 10 [dB] step, which is preset in the calibration routine described later, and is stored in the RAM 40c for each selected channel as shown in FIG. 5 (a). , Is stored as an upper limit map with the attenuation amount ATT as a parameter. Therefore, in step 110, RAM40c
Extract the upper limit map corresponding to the current channel selected from, read the upper limit VD max for the attenuation ATT,
The value VD max and the detected voltage VD are compared in magnitude.

Then, in step 110, the detection voltage VD is the upper limit value VD ma
If it is determined that x has been exceeded, the process moves to the next step 120,
It is determined whether the current attenuation amount ATT of the variable attenuator 16 is the maximum attenuation amount ATT max, and the attenuation amount ATT is the maximum attenuation amount ATT.
If it is max, the attenuation amount ATT of the variable attenuator 16 cannot be increased any more, and the level of the currently selected communication signal cannot be measured.
Then, the display unit 34 displays that effect (overflow), and the process ends.

On the other hand, in step 120, the attenuation amount ATT is the maximum attenuation amount ATT max.
If it is determined that the value is not satisfied, the process proceeds to step 140. Then, in step 140, the attenuation amount ATT of the variable attenuator 16
The variable attenuator 16 to increase the current value by 10 [dB].
The control voltage of is changed, and the process proceeds to step 100 again. Note that this control voltage is a value preset in a calibration routine to be described later, like the upper limit value VD max, and as shown in FIG. 5 (b), the amount of attenuation for each selected channel is stored in the RAM 40c. ATT
It is stored as a control voltage map using as a parameter. Therefore, in step 140, the control voltage map corresponding to the current channel selection is extracted from the RAM 40c, the control voltage for the attenuation amount ATT that is 10 [dB] larger than the current attenuation amount ATT is read, and the read control voltage is changed. Attenuator 16
Apply to.

Next, when it is determined in step 110 that the detection voltage VD is equal to or lower than the upper limit value VD max, the process proceeds to step 150, and this time, it is determined whether or not the detection voltage VD is lower than the lower limit value VD min. When it is determined that the detection voltage VD is lower than the lower limit value VD min, the process proceeds to step 160, and it is determined whether the current attenuation amount ATT of the variable attenuator 16 is the minimum attenuation amount ATT min. However, if the attenuation amount ATT is the minimum attenuation amount ATT min, the attenuation amount ATT of the variable attenuator 16 cannot be further reduced, and the level measurement of the currently selected communication signal is not possible. Since it is possible, the process proceeds to step 170 to display that effect (underflow), and then the process ends. On the contrary, when the attenuation amount ATT is not the minimum attenuation amount ATT min, the process proceeds to step 180, and contrary to step 140, the attenuation amount ATT of the variable attenuator 16 is changed from the current value to 10 [ dB], the control voltage of the variable attenuator 16 is changed, and the process proceeds to step 100 again. The detection voltage V
A fixed value (0.5 in this embodiment) is set in advance as the lower limit value VD min of D.
[V]) is set.

Next, when it is determined in step 150 that the detection voltage VD is equal to or higher than the lower limit value VD min, that is, the detection voltage VD is the upper and lower limit value VD.
If it is determined that the value is within the predetermined range determined by max and VD min, the process proceeds to step 190 and it is determined whether or not the calibration routine is currently being executed. Then, if the calibration routine is currently being executed, the processing is terminated as it is, and if the calibration routine is not being executed, that is, if the device is in the level measurement mode, the process proceeds to step 200 and step 100 RAM40c based on the detection voltage VD read by
The input level (absolute value) is calculated by performing a well-known interpolation calculation using the level conversion map as shown in FIG. 5 (c) stored in FIG. Is displayed on the display unit 34, and then the process ends. Note that this level conversion map corresponds to the conversion data described above, and is set in advance in the calibration routine described later, like the upper limit value map and the control voltage map described above.
As shown in FIG. 5 (c), the detection voltage VD and the input level are stored in association with each other for each channel selected and for each attenuation amount. Therefore, in step 200, a level conversion map corresponding to the current channel selection and attenuation ATT is extracted from the RAM 40c, two input levels closest to the detection voltage VD are read from this map, and well-known interpolation calculation is performed. By means, the input level of the selected channel is calculated.

As described above, in the level measurement routine, the detection voltage output from the detection circuit 28 is level-converted using the level conversion map and displayed on the display unit 34.
Even if there is a certain variation in the signal system from
If the data of each of the above maps including the level conversion map stored in AM40c is accurate, the receiving antenna 50
It is possible to always accurately measure the absolute level of the reception signal output from each channel. In this embodiment, this level measuring routine corresponds to the absolute level calculating means.

Therefore, a calibration routine for setting the above map data will be described next.

First, in executing this calibration routine, the signal generator 60 is connected to the reception signal input terminal 12 as shown in FIG.
The signal output terminal 62 of the output level measuring device 10 is connected to the control signal input terminal 38 while the signal output terminal 62 is connected via the coaxial cable 64.
Connect a calibration device 66 for calibrating.

Note that the calibration device 66 is composed of a microcomputer like the control circuit 40. When connected as described above, a calibration command signal is first input to the control signal input terminal 38 of the output level measurement device, and then in advance. According to the stored control program, the output level measuring device 10 sequentially performs the following operations for all the selected channels for all the selectable channels.

That is, the calibration device 66 causes the signal generator 60 to generate a signal of a frequency corresponding to the selected channel for each selected channel, and the signal level (absolute value) from 43 [dBμ] to 105 [dBμ]. Increase in 2 [dB] steps,
The channel selection channel and signal level at that time are input to the control signal input terminal 38 of the output level measuring device 10 as the channel selection channel for calibration and the input level for calibration, respectively. Further, the signal level from the signal generator 60 is not only increased in 2 [dB] steps, but the signal level increased in 2 [dB] steps is 55, 65, 75, 85, 95 [dBμ]. When it happens, reduce the signal level by 2 [dB] once (that is, 53,63,73,83,93 [dBμ]), and then repeat 2 again.
Increase the signal level from 43 [dBμ] to 105 [dBμ] by the procedure of increasing in [dB] steps.

When the signal generator 60 and the calibration device 66 are connected in this way,
On the output level measuring device 10 side, the calibration routine is started by the calibration command signal from the calibration device 66, and the calibration routine is executed according to the flowchart of FIG.

When the calibration routine is started as shown in FIG. 6, first, at step 300, the calibration tuning channel input from the calibration device 66 is read, and at step 310, it is changed according to the tuning channel. The oscillating frequency of the oscillating circuit 18 is adjusted, and the tuning circuit 26 tunes the output signal from the signal generator 60. Next, in step 320, an initial value 0 [dB] is set to the calculated attenuation amount ATTO used in the subsequent processing, and the process proceeds to step 330.

In step 330, a predetermined maximum value (for example, 5) is set as the upper limit value VD max of the detection voltage VD with respect to the current calculated attenuation amount ATTO.
[V]) and set a fixed value (0.5 [V] in the present embodiment as described above) as the lower limit value VD min, the process proceeds to the following step 340, and is input from the calibration device 66. Read the input level for calibration, which is the minimum signal level input from the signal generator 60 (ie, 43 [dB
.mu.]) or a signal level (53, 63, 73, 83, 93 [dB.mu.] [dB.mu.]) that temporarily decreases while the signal level is increasing, and the process proceeds to the following step 350. This step 340
The calibration input level is 43,53,63,73,83,93 [dB
If it cannot be confirmed that it is any of [μ], there is some abnormality and an error is displayed on the display unit 34, and the process is temporarily terminated.

In step 350, the control voltage VATT set in advance for controlling the attenuation amount ATT of the variable attenuator 16 to the calculated attenuation amount ATTO.
Is output to the variable attenuator 16, and in the subsequent step 360, the ADC30
Read the detection voltage VD via. And the following Step 37
At 0, it is determined whether or not the read detection voltage VD exceeds the lower limit value VD min. If the detection voltage VD exceeds the lower limit value VD min, the process proceeds to step 380 and the variable attenuator is set. The control voltage VATT is decreased in order to increase the attenuation amount of 16, and the process proceeds to step 360 again.

Since the variable attenuator 16 of the present embodiment is configured to use a PIN diode so that the attenuation amount decreases as the control voltage increases, in this step 380, the control voltage VA
Although TT is decreased, when the variable attenuator 16 is configured to increase the attenuation amount as the control voltage increases, in this step 380, the control voltage VATT is reduced.
Will be increased.

On the other hand, if it is determined in step 370 that the detection voltage VD does not exceed the lower limit value VD min, then the process proceeds to step 390 to determine whether the detection voltage VD is below the lower limit value VD min. . If the detected voltage VD is below the lower limit value VD min, the process proceeds to step 400 and the variable attenuator 1
After increasing the control voltage VATT to decrease the attenuation amount of 6, the process proceeds to step 360 again, otherwise, that is, the detection voltage VD and the lower limit value VD min (0.5 [V]) match. If so, in step 410, the calculated attenuation amount ATTO and the control voltage VATT are stored in the RAM 40c in association with each other, thereby creating one data of the control voltage map shown in FIG. 5B. . For example, if the calculated attenuation amount ATTO is 0 [dB], the control voltage VATT is stored in the control voltage map as the control voltage for the attenuation amount 0 [dB].

Next, in step 420, the calibration input level input next from the calibration device 66 is read, and in the following step 430,
It is determined whether or not the read calibration input level is lower than the previously read calibration input level.
If the calibration input level has not dropped, the routine proceeds to step 440 and the above level measurement routine is executed. At the time when this step 440 is executed, the calibration input level is higher than when the control voltage of the attenuation amount with respect to the lower limit value VD min is set, so the detection voltage VD is always higher than the lower limit value VD min, and Since the maximum value is initially set to the value VD max in step 330, the detection voltage VD does not exceed the upper limit value VD max. Therefore, in the level measurement routine executed at step 440, only the detected voltage VD is read at step 100.

When step 440 is executed in this manner, this time the process proceeds to step 450 and the calibration input level read in step 420 and the detection voltage VD read in step 440 are stored in the RAM 40c in association with each other. Therefore, Fig. 5 (c)
Create one data of the level conversion map shown in.
For example, if the current calibration input level is 45 [dBμ],
The detection voltage VD read this time is stored in the level conversion map as the detection voltage for the input level 45 [dBμ].

Note that the calibration input level is the minimum signal level (that is, 43 [d
Bμ]) or the signal level when it once decreases during the increase (53, 63, 73, 83, 93 [dBμ]),
By adjusting the attenuation amount of the variable attenuator 16 in the processing of steps 340 to 400 described above, the detection voltage VD is set to the lower limit value VD min, so the minimum input level in each level conversion map (43, 53, 63, 73, 83, 93 [dBμ]), the lower limit value VD min (0.5 [V]) of the detection voltage VD is set.

Then, in the following step 460, it is judged whether or not the calibration input level read in step 420 is the maximum level input from the calibration device 66, that is, 105 [dBμ], and the calibration input level must be the maximum level. For example, the process proceeds to step 420 again.

On the other hand, when it is determined in step 430 that the calibration input level input from the calibration device 66 has decreased, the process proceeds to step 470, and the detection voltage VD read before the calibration input level decreases , One data of the upper limit map shown in FIG. 5A is created by storing it in the RAM 40c as the upper limit VD max of the detection voltage with respect to the current calculated attenuation amount ATTO. For example, the current calculated attenuation amount ATTO is 0 [dB]
In this case, the detection voltage VD read before the calibration input level drops is the upper limit value of the detection voltage VD at the attenuation 0 [dB].
Store as VD max in the upper limit map. Then, in the following step 480, the calculated attenuation amount ATTO is increased by 10 [dB], and the process proceeds to step 330 again.

Next, in step 460, when it is determined that the calibration input level is the maximum level, the process proceeds to step 490, and the detection voltage VD read this time is set to the current calculated attenuation amount AT.
Upper limit value of detection voltage VD m for TO (50 [dB] in this case)
By storing as ax in the RAM 40c, an upper limit value map for the maximum attenuation amount 50 [dB] shown in FIG. 5 (a) is created. Then, in the following step 500, it is determined whether or not the current calibration tuning channel is the maximum channel among the tuning channels that can be selected by the device, and if the tuning channel is not the maximum channel, Go to step 510, read the next calibration channel input from the calibration device 66, go to step 310 again, conversely, if the channel selection is the maximum channel, calibration for all channels is completed As a result, the calibration mode is canceled in step 520, and the process ends. In the above calibration routine, the processes of steps 300, 310, 500 and 510 correspond to the tuning control means, the processes of steps 410, 450, 470 and 490 correspond to the storage means, and the other steps correspond to the conversion data updating means.

As described above, in the present embodiment, in the calibration routine, when the calibration input level is 43,53,63,73,83,93 [dBμ], the attenuation amount of the variable attenuator 16 is adjusted. Then, the detection voltage VD is controlled to the lower limit value VD min, and each time the calibration input level increases in 2 [dB] steps, the detection voltage value for that level is stored. As shown in the figure, each attenuation amount ATT is accurately set according to the characteristics of the output level measuring device 10, and the input level can be accurately obtained from the detection voltage VD.

Also, the upper limit value VD max at each attenuation amount ATT is set to the lower limit value VD min
12 for input levels 43, 53, 63, 73, 83, 93 [dBμ] of
[DB] The detection voltage VD is set at high input levels 55, 65, 75, 85, 95, 105 [dBμ], and the change in attenuation ATT is 10 [dB].
Since a hysteresis of 2 [dB] is provided, the level measurement can be performed without frequently switching the attenuation amount of the variable attenuator 16.

Here, in the above-described embodiment, the level conversion map for calculating the input level from the detected voltage VD is as shown in FIG.
Created by associating and storing VD and input level.When calculating the input level, calculate the input level using the level conversion map corresponding to the current channel selection and attenuation ATT based on the detected voltage VD. I tried to do it,
The level conversion map does not necessarily have to be created for each attenuation amount. For example, for each channel, only the data of the region where the attenuation amount ATT in FIG. 5 (c) is 0 (= ATT min) is used as the level conversion map. Remember, when calculating the input level, calculate the input level corresponding to the detection voltage VD using the level conversion map corresponding to the selected channel,
The current attenuation ATT (0,10,20,30,40 or 5
The input level may be determined by adding 0).

[Effects of the Invention] As described in detail above, in the output level measuring apparatus of the present invention, when a calibration command is input to the input terminal, the channel selection control means inputs the channel selected by the channel selection circuit from the input terminal. The absolute level is calculated from the detected voltage by controlling to the selected channel, and the conversion data updating means stores the detected voltage output from the detection circuit and the absolute level input from the input terminal in the storage means in association with each other. Since the conversion data for updating is updated, the equipment can be easily calibrated by inputting the signal corresponding to the channel and the absolute level input to the input terminal to the channel selection circuit. This makes it possible to always perform accurate level measurement without using a calibration table at the time of level measurement as in the conventional case.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating the configuration of the present invention, FIG. 2 is a schematic configuration diagram showing the overall configuration of the output level measuring device of the embodiment, and FIG. 3 (a) is an output level measuring device at the time of level measurement. FIG. 3 (b) is an explanatory diagram showing a connection state with a receiving antenna, FIG. 3 (b) is an explanatory diagram showing a connection state between an output level measuring device at the time of calibration and another device, and FIG. 4 is a level measurement executed by a control circuit. FIG. 5 is a flowchart showing a routine, FIG. 5 is an explanatory view showing various maps used when the level measurement routine is executed, FIG. 6 is a flowchart showing a calibration routine executed by the control circuit, and FIG. 7 is obtained by this calibration routine. It is a diagram showing data. 10 …… Output level measurement device, 18 …… Variable oscillation circuit 26 …… Channel selection circuit, 28 …… Detection circuit 30 …… A / D converter, 32 …… Operating section 34 …… Display section, 36 …… Display circuit 38: control signal input terminal, 40: control circuit

Claims (1)

[Claims] 1. A tuning circuit for selecting a communication signal of a predetermined channel from a reception signal output from a receiving antenna, a detection circuit for detecting the selected communication signal, and an output from the detection circuit. The conversion means for converting the absolute level of the communication signal from the detected voltage is stored in advance, and the absolute level of the communication signal is calculated from the detected voltage based on the conversion data stored in the storage means. Then, in the output level measuring device of the receiving antenna equipped with the absolute level calculating means for displaying on the display device, from the outside, the tuning channel of the above tuning circuit, the absolute level of the communication signal, and the calibration command of the converted data, Input terminals for inputting the respective channels, and when the calibration command is input from the input terminals, input the channel selection channel of the channel selection circuit from the input terminals. Tuning control means for controlling the selected tuning channel, and when the tuning control means controls the tuning channel of the tuning circuit, the detection voltage output from the detection circuit is read, and the detection voltage and the input voltage are input. By storing in the storage means in association with the absolute level input from the terminal,
An output level measuring device for a receiving antenna, comprising: a conversion data updating means for updating the conversion data.