JPH0779242B2 - A / D converter - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an A / D converter, and more particularly to a high resolution A / D converter.

2. Description of the Related Art With the spread of digital devices in recent years, the performance of A / D converters, which are interfaces between analog signals and digital signals, is important and has a great influence. A conventional A / D converter is shown in FIG. 5 and will be described. The A / D conversion device shown in FIG. 5 is called a successive approximation type and operates as follows.

(1) Set the MSB (most significant bit) of the successive approximation register 102 to “1” and the other to “0”, and set this to the D / A converter (hereinafter DAC).
Output) to 103.

(2) The input and the output of the DAC 103 are compared by the comparator 100, and if {input} ≧ {DAC output}, the lower bit is set to “1”, and if {input} ≦ {DAC output}, the current Set the bit in question to "0" and set the lower one bit to "1".

(3) Repeat steps 1 to 2 from MSB to LSB (least significant bit).

(4) Data is taken out from the successive approximation register 102 and is output digitally.

However, in the configuration as described above, when the number of bits is increased to increase the resolution, the conversion time is increased, and therefore the comparator 100 and the DAC 103 are very fast in order to maintain the operating frequency. Something that works is required. Moreover, LSB
There has been a problem that the closer it is to, the more susceptible it is to ambient noise.

In view of the above problems, the present invention provides an A / D conversion device that is not easily affected by ambient noise and that does not require the speedup of elements to be used due to the increase in bits.

Means for Solving the Problems In order to solve the above problems, an A / D conversion device according to the present invention includes a plurality of A / D conversion devices for converting an analog signal into a digital signal.
A / D converter, level conversion means for amplifying or attenuating an analog input signal at a predetermined ratio and inputting to each of the plurality of A / D converters, and inputting the plurality of A / D converter outputs A ratio detecting means for detecting the ratio of the AC component of the input, adjusting means for adjusting and outputting the amplitude level of the input according to the ratio, and offset levels of a plurality of outputs obtained by the adjusting means. An offset detector for detecting A, a correction means for aligning the offset levels of the plurality of outputs obtained from the amplitude level adjuster with any one of the offset levels based on the offset detector output, and the plurality of A And means for selectively extracting the output from the correction means based on the output of the / D converter.

Action As described above, the A / D converter is provided for each of the high input level and low input level, and when the input level is low, the output of the low level A / D converter, and when the input level is high, the high level Select the output that amplified the signal at the same ratio as when the levels were matched using the A / D converter for
D conversion output. The AC component of the input signal of the A / D converter, that is, the level ratio of the change, or the difference between the minimum value and the maximum value is detected based on the output level of each A / D converter. The level is adjusted without being affected by the offset level of the A / D converter. Also, since the offset level of each A / D converter is adjusted after the level adjustment,
A / D conversion of DC signals can also be performed, and high resolution A / D
The converter can be realized by using a low resolution A / D converter.

EXAMPLES The present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of an A / D conversion device according to the present invention. In the figure, 1 is an amplifier, and the low-pass filter 13 amplifies the analog input signal that has passed. Here, a gain of about 24 dB is used. Reference numerals 2 and 3 are A / D converters that convert analog signals with almost the same characteristics into digital signals, and here, those with 16-bit resolution are used. Reference numeral 4 denotes a level adjuster, which is composed of a multiplier 7 and a ratio detector 9 described later, and adjusts the level of the output signal of the A / D converter 3. Reference numeral 5 is an offset removing device for removing the DC offset component of the two A / D converters 2 and 3, and here it is composed of an adder 11 and an offset detector 12, and removes the offset of the input signal of the level adjuster 4. Do. 8 is a level detector, A / D converter 2
When exceeds a certain level (in this case, overflows), "1" is output. Reference numeral 10 denotes a selector, which selects the signal applied to the terminal A when the control signal input to the terminal S is "0" and the signal applied to the terminal B when the control signal is "1" and outputs the selected signal from the terminal Y.

Next, the operation of this embodiment will be described. When the analog input is given, the given analog input is inputted as it is to the A / D converter 3 through the low pass filter 13, and the A / D converter 2 is given the analog input amplified by 24 dB by the amplifier 1. To be Each of the A / D converters 2 and 3 converts the given analog signal into a disk signal and outputs it. Since the characteristics of the A / D converters 2 and 3 are almost the same, the A / B converter 2
This means that it outputs about 16 times the value of the D converter 3. However, conversely, if a high amplitude analog input is given,
The A / D converter 2 overflows, and only the A / D converter 3 operates normally. When the A / D converter 2 overflows, the level detector 8 outputs "1".
In the level adjuster 4, the A / D converter when the A / D converter 2 is operating normally, that is, when the output of the level detector 8 is “0”
The ratio detector 9 accurately obtains the ratio of the outputs of 2, 3 and the multiplier 7 multiplies the ratio of the output level of the A / D converter 3 by this ratio to obtain an A / D conversion signal in which substantially no overflow occurs. Is output. Then, in the offset removing device 5, the offset detector 12 detects the difference in the DC offset level between the outputs of the A / D converter 2 and the level adjuster 4 when the output of the level detector 8 is "0". Then, the adder 11 adds the output of the level adjuster 4 to the obtained offset level, corrects the offset level, and outputs it. Further, when the output of the level converter 8 is "1", such offset adjustment is not performed. Then, the selector 10 determines the A / D converter 2 based on the output of the level detector 8.
Does not overflow, that is, when the output of the level detector 8 is "0", the output of the A / D converter 2 is output, and when the A / D converter 2 overflows, that is, the level detector 8
When the output of 1 is "1", the output of the offset removing device 5 is output.

Next, the configuration and operation of the ratio detector 9 will be described with reference to FIGS. 2 and 3. In FIG. 2, reference numeral 20 denotes a difference detector, which detects the difference between the input data Ai and Bi and the immediately preceding data Ai _-1 and Bi _-1 , that is, the change in the data, and outputs it from Y1 and Y2. To do. 21 is a comparator, terminals A and B
The ratio of the data given to is calculated according to the magnitude relation: A = B → C1 = 1, C2 = 0 | A |> | B | → C1 = 0, C2 = 0 | A | <| B | → An output that gives C1 = 0 and C2 = 1 is given to the counter 22. When the output of the level detector 8 is "1", C1 = 1 and C2 = 0. Reference numeral 22 is an up / down counter (hereinafter referred to as U / D counter), which counts an arbitrary clock, stops the counting operation when "1" is given to the inhibit input terminal I, and outputs "1" to the terminal U. When "is given, it counts up, and when it is" 0 ", it counts down.

Next, the operation of this ratio detector will be described. The difference detector 20 detects each difference of the input data.
That is, when the data as shown in FIG. 3 is input, the difference detector 20 calculates A _n −A _n−1 in the time series data given from the multiplier 7 and outputs it from the output terminal Y1. . Similarly, the time series data B _n −B given by the A / D converter 2
_n-1 is calculated and output through the output terminal Y. Therefore, at this time, the offset components included in the A / D converters 2 and 3 are removed, and the values obtained from the terminals Y1 and Y2 are only the differences due to the amplification factor of the amplifier 1. Therefore, the output value of the U / D counter 22 and the output value of the A / D converter 3 are multiplied by the multiplier 7, and the multiplication result and the output of the A / D converter 2 are passed through the difference detector 20. The magnitude comparison is given to the comparator 21.
In the comparator 21, if | multiplication result | <A / D converter 2 output |, then | A | <| B |, so C2 = 1, C1 = 0, and the U / D counter 22 counts up and U / D The output value of the counter 12 becomes large. Then, the output value of the multiplier 7 also increases, and A = B in the meantime. Since C1 = 1 and C2 = 0 with A = B,
Since the U / D counter 22 stops counting, the state of {multiplication result} = {output of A / D converter 2} is held.

On the other hand, if │multiplication result│> | A / D converter 2 output ｜, then | A |> | B |, so C2 = 0, C1 = 0, and the U / D counter 22 outputs gradually as a countdown. The value becomes smaller, and in the same way, A = B. When A = B, the U / D counter 22 stops counting as described above, and the state of {multiplication result} = {output of A / D converter 2} is held.

In this way, the amplification factor of the amplifier 1 is accurately obtained, and the output of the multiplier 7 is the same value as when the LPF 13 output is input to the A / D converter 3 via the amplifier having the same characteristics as the amplifier 1. Becomes Therefore, when the input level is low and the A / D converter 2 does not overflow, the output of the A / D converter 2 can be directly used as a digital output.
If the output of the A / D converter overflows, the output of the A / D converter 3 is multiplied by the multiplier 7, and the output whose offset has been adjusted is selected by the selector 10 and output. High-precision A / D conversion can be performed using the D converter.

FIG. 4 is a block diagram showing another embodiment of the ratio detector 9. In this figure, those having the same functions as those in FIG. 2 are designated by the same reference numerals, and detailed description thereof will be omitted.
Reference numeral 25 is an extreme value detector, which detects and outputs the difference between the maximum value and the minimum value of each input input from terminals A and B. That is, when a waveform as shown in FIG. 3 is input, A ₄ , A ₇ , A ₁₆ , A ₂₃ ,
... maximum value and _{A 6, A 13, A 18} , detects and ... minimum value of the difference, _{i.e., A 4 -A 6, A 6} -A 7, A 7 -A 13, calculates ... It is what is output. In this way, since the difference between the extreme values is taken out, the offset component contained in the A / D converters 2 and 3 is removed at this stage, and the values obtained from the terminals Y1 and Y2 are amplified by the amplifier 1. It is only the difference due to. Moreover, as compared with the case of FIG. 2, the normal _{A 4 -A 6, A 6 -A} 7, A 7 -A 13, ...
Since the value of is larger than A ₄ −A ₅ , A ₅ −A ₆ , A ₆ −A ₇ , ..., A more accurate size comparison can be performed. Below, the second
The same operation as in the figure is performed, and the output of the multiplier 7 is LP
It has the same value as when the F13 output is input to the A / D converter 3 through an amplifier having exactly the same characteristics as the amplifier 1.

Next, input / output of the offset removing device 5 will be described.
The offset detector 12 takes the difference between the signals applied to the terminals A and B and outputs the difference from the terminal Y.

That is, Y = A−B (1) First, if the input of the offset removing device 5 is A /
If the D converters 2 and 3 have no offset, almost the same data should be input. However, since the A / D converters 2 and 3 actually have an offset, signals having substantially the same amplitude with different DC levels are input to the terminals A and B of the offset detector 12. Therefore, a difference in DC level appears at the terminal Y of the offset detector 12.
Since this value is added to the output of the level adjuster 4 by the adder 11, the offset levels of the output of the A / D converter 2 and the output of the level adjuster 4 are aligned.

Since the selector 10 outputs the output of the offset removing device 5 and the output of the A / D converter 2 based on the output of the level detector 8, the A / D having a plurality of offsets
Even if a D converter is used, stable high-resolution A / D conversion can be performed, and since the offset level is adjusted to one side, even if a direct current is given as an analog input, the digital value will be correct. It outputs a DC value.

In the above embodiments, the analog input is amplified and input to the A / D converter 2, but the analog input is directly input to the A / D converter 2 and the A / D converter 3 is input. Alternatively, a signal attenuated by using an attenuator may be input. Further, the A / D converter is not limited to the one having 16 bits, and although two A / D converters are used in the above-mentioned embodiment, three or more A / D converters are used, and different ones are used. A level analog input may be added. Further, although the offset correction is performed on the output of the level adjuster 4, of course, it may be performed on the output of the A / D converter 2. Further, with respect to the extreme value detector 25, the difference between the maximum value and the minimum value is obtained and is output as it is, but the average value of the difference between the maximum value and the minimum value may be obtained and output. Needless to say.

Effects of the Invention As described above, the present invention uses a plurality of A / D converters to adjust the levels so that the outputs of the A / D converters are matched at the low level, and the output of the A / D converter having a high input level is adjusted. The level-adjusted output of the A / D converter with a low input level is selected as the A / D conversion output if the level becomes low when selected. The level can be adjusted without being affected by the offset level of each A / D converter, and the offset level of each A / D converter is adjusted after the level adjustment. Also, it has an excellent effect that it can perform A / D conversion of a DC signal and can be realized by using a low resolution A / D converter of a high resolution A / D converter.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an A / D converter according to the present invention, FIG. 2 is a block diagram showing a concrete example of a ratio detector 9, and FIG. 3 is outputs of A / D converters 2 and 3. FIG. 4 is a waveform diagram, FIG. 4 is a block diagram showing another specific example of the ratio detector 9, and FIG. 5 is a block diagram showing an A / D converter conventionally used. 1 ... Amplifier, 2,3 ... A / D converter, 4 ... Level adjuster, 5 ... Offset remover, 7 ... Multiplier, 8 ...
Level detector, 9 …… Ratio detector, 10 …… Selector, 11
…… Adder, 12 …… Offset detector, 20 …… Difference detector, 21 …… Comparator, 22 …… Up-down counter, 25…
… Extreme value detector.

Claims (1)

[Claims] 1. A plurality of A / D converters for converting an analog signal into a digital signal, and a level for amplifying or attenuating an analog input signal at a predetermined ratio and inputting to each of the plurality of A / D converters. A conversion unit, a ratio detection unit that receives the outputs of the plurality of A / D converters, and detects a ratio of an AC component of the input, and an adjustment that adjusts and outputs an amplitude level of the input according to the ratio. Means, an offset detector for detecting an offset level of a plurality of outputs obtained by the adjusting means, and an offset level of a plurality of outputs obtained by the amplitude level adjuster based on the output of the offset detector. An A / D conversion device comprising: a correction unit that aligns with one offset level; and a unit that selectively extracts an output from the correction unit based on outputs of the plurality of A / D converters.