JPH077851B2 - MIM switching element - Google Patents
MIM switching elementInfo
- Publication number
- JPH077851B2 JPH077851B2 JP61025591A JP2559186A JPH077851B2 JP H077851 B2 JPH077851 B2 JP H077851B2 JP 61025591 A JP61025591 A JP 61025591A JP 2559186 A JP2559186 A JP 2559186A JP H077851 B2 JPH077851 B2 JP H077851B2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- film
- switching element
- mim
- conductor thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000010409 thin film Substances 0.000 claims description 75
- 239000010408 film Substances 0.000 claims description 58
- 239000004020 conductor Substances 0.000 claims description 41
- WEVYAHXRMPXWCK-UHFFFAOYSA-N Acetonitrile Chemical compound CC#N WEVYAHXRMPXWCK-UHFFFAOYSA-N 0.000 claims description 39
- 239000012212 insulator Substances 0.000 claims description 29
- 239000000758 substrate Substances 0.000 claims description 16
- 239000004973 liquid crystal related substance Substances 0.000 description 21
- 238000000034 method Methods 0.000 description 13
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 8
- 229910001936 tantalum oxide Inorganic materials 0.000 description 8
- 238000006116 polymerization reaction Methods 0.000 description 7
- 229910052715 tantalum Inorganic materials 0.000 description 7
- 238000001259 photo etching Methods 0.000 description 6
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 6
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 5
- 230000001681 protective effect Effects 0.000 description 5
- 229910052804 chromium Inorganic materials 0.000 description 4
- 239000011651 chromium Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 238000007743 anodising Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 239000004962 Polyamide-imide Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 235000006408 oxalic acid Nutrition 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920002312 polyamide-imide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 150000003481 tantalum Chemical class 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は液晶表示素子やエレクトロクロミック表示素子
などに代表される各種表示素子をマトリクス駆動すると
きに用いるアクティブ素子に関し、とくに下部導体薄膜
と絶縁体薄膜と上部導体薄膜とを順次積層する三層構造
からなるMIMスイッチング素子の絶縁体薄膜に関するも
のである。Description: TECHNICAL FIELD The present invention relates to an active element used when matrix-driving various display elements typified by liquid crystal display elements and electrochromic display elements, and in particular insulated from a lower conductor thin film. The present invention relates to an insulator thin film of a MIM switching element having a three-layer structure in which a body thin film and an upper conductor thin film are sequentially laminated.
〔発明の背景〕 これまでの液晶表示素子は情報機器端末の表示部として
利用されているが、その表示容量が比較的小さいため応
用範囲が限定されている。近年、この表示容量を増大さ
せるための手段として非線形素子を用いることが検討さ
れており、その非線形素子の１つとして下部導体薄膜と
絶縁体薄膜と上部導体薄膜との三層構造からなるMIMス
イッチング素子が注目されている。またエレクトロクロ
ミック表示素子においても液晶表示素子と同様に、非線
形素子を用いるマトリクス駆動による表示容量の増大が
検討されている。BACKGROUND OF THE INVENTION Liquid crystal display devices have been used as display units of information equipment terminals up to now, but their display capacity is relatively small, so their application range is limited. In recent years, it has been studied to use a non-linear element as a means for increasing the display capacity. As one of the non-linear elements, MIM switching composed of a three-layer structure of a lower conductor thin film, an insulator thin film and an upper conductor thin film is used. The element is receiving attention. Also in the electrochromic display element, as in the liquid crystal display element, an increase in display capacity by matrix driving using a non-linear element is being studied.
MIMスイッチング素子としては、下部導体薄膜としてタ
ンタル膜、絶縁体薄膜としてタンタル酸化膜、上部導体
薄膜としてタンタル膜やクロム膜などの金属膜を用いる
ことが一般的であり、以下にその代表例を第２図を用い
て説明する。As a MIM switching element, it is common to use a tantalum film as the lower conductor thin film, a tantalum oxide film as the insulator thin film, and a metal film such as a tantalum film or a chromium film as the upper conductor thin film. This will be described with reference to FIG.
第２図（ａ）は従来例におけるMIM素子を示す平面図で
あり、第２図（ｂ）は従来例におけるMIM素子を示す断
面図であり、いずれも１画素に相当する領域を示す。以
下、第２図を用いて従来例におけるMIMスイッチング素
子を説明する。2 (a) is a plan view showing a MIM element in the conventional example, and FIG. 2 (b) is a cross-sectional view showing the MIM element in the conventional example, each showing a region corresponding to one pixel. The MIM switching element in the conventional example will be described below with reference to FIG.
ガラスからなる基板20上に、保護膜21材料としてタンタ
ル膜を真空蒸着法やスパッタリング法により膜厚0.1μ
ｍで全面に設ける。その後、温度500℃の炉中で熱酸化
処理を行いタンタル膜をタンタル酸化膜に変換し、保護
膜21とする。このタンタル酸化膜からなる保護膜21は、
後工程における下部導体薄膜221のパターニング工程に
おいて、下部導体薄膜221のエッチャントによって基板2
0がエッチングされることを防止する役割をもつ。すな
わち、保護膜21の形成を省略して下部導体薄膜221のパ
ターニングを行うと、基板20がエッチングされ、その基
板20の表面あらさ大きくなり、ファインパターンが得ら
れない。On the substrate 20 made of glass, a tantalum film as a material for the protective film 21 is formed to a thickness of 0.1 μm by a vacuum deposition method or a sputtering method.
m over the entire surface. After that, thermal oxidation treatment is performed in a furnace at a temperature of 500 ° C. to convert the tantalum film into a tantalum oxide film, which is used as the protective film 21. The protective film 21 made of this tantalum oxide film is
In the patterning process of the lower conductor thin film 221, the substrate 2 is formed by the etchant of the lower conductor thin film 221 in the subsequent process.
It has a role of preventing 0 from being etched. That is, if the lower conductor thin film 221 is patterned without forming the protective film 21, the substrate 20 is etched and the surface roughness of the substrate 20 becomes large, so that a fine pattern cannot be obtained.
その後、タンタル膜からなる導体薄膜22を0.3μｍの膜
厚で全面に形成する。その後、フォトエッチング処理に
より導体薄膜22をパターニングして、線幅寸法が20μｍ
の導体薄膜22を形成する。このタンタル膜からなる導体
薄膜22のエッチングは、フッ酸：硝酸：水＝1:10:10の
エッチング液を用いて行う。なお、第２図（ａ）の平面
図に示すように、導体薄膜22は、線幅寸法が４μｍの下
部導体薄膜221に相当する突起形状をもち、この突起形
状領域にMIMスイッチング素子を形成する。After that, a conductor thin film 22 made of a tantalum film is formed on the entire surface with a film thickness of 0.3 μm. After that, the conductor thin film 22 is patterned by photo-etching, and the line width dimension is 20 μm.
The conductor thin film 22 is formed. The conductor thin film 22 made of this tantalum film is etched using an etching solution of hydrofluoric acid: nitric acid: water = 1: 10: 10. As shown in the plan view of FIG. 2A, the conductor thin film 22 has a protrusion shape corresponding to the lower conductor thin film 221 having a line width dimension of 4 μm, and the MIM switching element is formed in this protrusion-shaped region. .
その後、基板20の最外周部の電極取り出し領域以外の導
体薄膜22と下部導体薄膜221の表面に、タンタル酸化膜
からなる絶縁体薄膜23を膜厚0.05μｍで形成する。この
タンタル酸化膜からなる絶縁体薄膜23の形成は、シュウ
酸水溶液を陽極酸化液として用いる陽極酸化処理により
形成する。この下部導体薄膜221の表面の絶縁体薄膜23
が、MIMスイッチング素子の絶縁体膜として機能する。After that, an insulator thin film 23 made of a tantalum oxide film is formed with a thickness of 0.05 μm on the surfaces of the conductor thin film 22 and the lower conductor thin film 221 other than the electrode extraction region at the outermost periphery of the substrate 20. The insulator thin film 23 made of this tantalum oxide film is formed by anodizing treatment using an oxalic acid aqueous solution as an anodizing solution. The insulator thin film 23 on the surface of the lower conductor thin film 221
Function as an insulator film for the MIM switching element.
その後、クロム膜からなる上部導体薄膜24を全面に形成
し、フォトエッチング処理により線幅寸法が４μｍでパ
ターニングする。さらに全面に透明導電膜を形成し、フ
ォトエッチング処理により上部導体薄膜24と接続する画
素電極25を形成する。ここで上部導体薄膜24としては金
属膜だけでなく、画素電極25と同じ透明導電膜をを用い
てもよい。After that, an upper conductor thin film 24 made of a chromium film is formed on the entire surface and patterned by photoetching to have a line width dimension of 4 μm. Further, a transparent conductive film is formed on the entire surface, and a pixel electrode 25 connected to the upper conductor thin film 24 is formed by photoetching. Here, as the upper conductor thin film 24, not only a metal film but also the same transparent conductive film as the pixel electrode 25 may be used.
このように構成するMIMスイッチング素子は、外部から
の電圧印加に対して非線形な電圧−電流特性を示し、こ
のMIMスイッチング素子を用いてスイッチング動作を行
わせることができる。The MIM switching element thus configured exhibits a non-linear voltage-current characteristic with respect to the voltage application from the outside, and the switching operation can be performed using this MIM switching element.
ここで表示素子として液晶表示素子を例にして以下説明
する。液晶を点灯させる電圧V NOを、MIMスイッチング
素子を形成する基板20と、この基板20に対向する対向電
極を形成する対向基板（図示せず）とに印加すると、MI
Mスイッチング素子側の実効抵抗が低く、液晶側の抵抗
が高いので、印加する電圧V ONの大部分は画素電極25と
対向電極との間に印加され、液晶がオン状態になる。Here, a liquid crystal display element will be described as an example of the display element in the following description. When the voltage V NO for lighting the liquid crystal is applied to the substrate 20 forming the MIM switching element and the counter substrate (not shown) forming the counter electrode facing the substrate 20, MI
Since the effective resistance on the M switching element side is low and the resistance on the liquid crystal side is high, most of the applied voltage V ON is applied between the pixel electrode 25 and the counter electrode, and the liquid crystal is turned on.
一方、液晶を点灯させない電圧V OFFを印加するとき
は、MIMスイッチング素子側の実効抵抗は、液晶側の抵
抗値より高くなるため、画素電極25と対向電極間にはほ
とんど電圧V OFFは印加されず、オフ状態を保つ。On the other hand, when the voltage V OFF that does not turn on the liquid crystal is applied, the effective resistance on the MIM switching element side becomes higher than the resistance value on the liquid crystal side, so almost no voltage V OFF is applied between the pixel electrode 25 and the counter electrode. No, keep it off.
このように外部からの印加電圧を制御することにより、
液晶のオンオフを任意に制御することができ、従来に比
較して表示容量を大幅に増大させることができる。By controlling the voltage applied from the outside in this way,
The on / off of the liquid crystal can be arbitrarily controlled, and the display capacity can be significantly increased as compared with the conventional case.
絶縁体薄膜23としてタンタル酸化膜を用いる従来構造の
MIMスイッチング素子により液晶表示素子を駆動すると
きを想定すると、良好な表示特性と高デューティー比を
得るためには、MIMスイッチング素子の静電容量C MIMは
液晶の静電容量C LCより充分に小さくなければならな
い。The conventional structure using a tantalum oxide film as the insulator thin film 23
Assuming that the liquid crystal display element is driven by the MIM switching element, the capacitance C MIM of the MIM switching element is sufficiently smaller than the capacitance C LC of the liquid crystal in order to obtain good display characteristics and high duty ratio. There must be.
MIMスイッチング素子の静電容量C MIMは次式で与えられ
る。The capacitance C MIM of the MIM switching element is given by the following equation.
C MIM＝εｏ・εｒ・s/d ここでεo:真空誘電率、εr:絶縁体薄膜の比誘電率、s:
MIMスイッチング素子の面積、d:絶縁体薄膜の膜厚であ
る。C MIM = εo · εr · s / d where εo: vacuum permittivity, εr: relative permittivity of the insulator thin film, s:
Area of MIM switching element, d: thickness of insulator thin film.
上式において絶縁体薄膜の比誘電率εｒは、絶縁体薄膜
固有の値をもち、絶縁体薄膜としてタンタル酸化膜を用
いるときは、23から25の値となる。In the above equation, the relative permittivity εr of the insulator thin film has a value peculiar to the insulator thin film, and is a value of 23 to 25 when a tantalum oxide film is used as the insulator thin film.
上式の可変パラメータとしては、MIMスイッチング素子
の面積ｓと、絶縁体薄膜の膜厚ｄとがある。しかしなが
ら、絶縁体薄膜の膜厚ｄはむやみに大きくすることはで
きず、MIMスイッチング素子の静電容量C MIMを小さくす
る方向への膜厚ｄの寄与は小さい。その結果、MIMスイ
ッチング素子の面積ｓを極力小さくすることで、静電容
量C MIMを小さくしている。Variable parameters in the above equation are the area s of the MIM switching element and the film thickness d of the insulator thin film. However, the film thickness d of the insulator thin film cannot be excessively increased, and the contribution of the film thickness d in the direction of decreasing the capacitance C MIM of the MIM switching element is small. As a result, the electrostatic capacitance C MIM is reduced by minimizing the area s of the MIM switching element.
素子の面積ｓを小さくしても充分な表示特性を得るため
には、MIMスイッチング素子の面積ｓは、画素電極25の
面積の１万分の１以下に設定する必要がある。このこと
は、液晶表示素子の１ドットの大きさを400μｍ角とす
るときには、MIMスイッチング素子寸法は、４μｍ角以
下にする必要があることを示している。したがって、た
とえば10cm角の大きさの基板の全面に素子を形成するこ
とは、アライメント精度やエッチング精度を考慮すると
非常に困難なことであり、できれば特性を維持したまま
MIMスイッチング素子寸法を大きくできることが望まし
い。In order to obtain sufficient display characteristics even if the area s of the element is reduced, the area s of the MIM switching element needs to be set to 1 / 10,000 or less of the area of the pixel electrode 25. This indicates that when the size of one dot of the liquid crystal display element is 400 μm square, the size of the MIM switching element needs to be 4 μm square or less. Therefore, it is extremely difficult to form an element on the entire surface of a 10 cm square substrate, for example, considering alignment accuracy and etching accuracy, and if possible, while maintaining the characteristics.
It is desirable to be able to increase the size of MIM switching elements.
そこで絶縁体薄膜材料を変更して、絶縁体薄膜の比誘電
率εｒを小さくすることが、たとえば特開昭60-241021
号公報にて提案されている。この公報にはスクリーン印
刷法や回転塗布法やマスク蒸着法により形成するポリマ
ーやポリイミドやポリアミドイミドを、絶縁体薄膜23と
して用いることが提案されている。Therefore, changing the material of the insulator thin film to reduce the relative permittivity εr of the insulator thin film is disclosed in, for example, JP-A-60-241021.
It is proposed in Japanese Patent Publication No. This publication proposes to use a polymer, polyimide or polyamide-imide formed by a screen printing method, a spin coating method or a mask vapor deposition method as the insulator thin film 23.
しかしながら、上記記載の公報の絶縁体薄膜23を0.05μ
ｍ程度の膜厚でピンホールが発生することなく、しかも
広い面積に再現性よく形成することは難しく、下部導体
薄膜221と上部導体薄膜24とが導通してしまう。However, the insulating thin film 23 of the above-mentioned publication has a thickness of 0.05 μm.
It is difficult to form a pinhole with a film thickness of about m and to form a large area with good reproducibility, and the lower conductor thin film 221 and the upper conductor thin film 24 are electrically connected.
本発明の目的は、上記の問題点を解決し、薄い膜厚で広
い面積においてピンホールのない絶縁体薄膜を有するMI
Mスイッチング素子を提供することである。An object of the present invention is to solve the above problems and to provide an MI thin film having a thin film thickness and a large area with no pinhole.
It is to provide an M switching element.
上記目的を達成するため、本発明のMIMスイッチング素
子の絶縁体薄膜は、プラズマ重合アセトニトリル膜を用
いることを特徴とする。In order to achieve the above object, the insulator thin film of the MIM switching element of the present invention is characterized by using a plasma-polymerized acetonitrile film.
本発明の絶縁体薄膜としては、比誘電率εｒの小さいな
プラズマ重合法により形成されるプラズマ重合アセトニ
トリル膜を用いる。このため、液晶表示素子の駆動条件
を満足しつつ、しかも素子寸法の大きなMIMスイッチン
グ素子が得られる。さらにプラズマ重合アセトニトリル
膜の形成手段として、プラズマ重合法を用いるため、ピ
ンホールが広い面積で発生せず、しかも再現性よく、絶
縁体薄膜を得ることができる。As the insulator thin film of the present invention, a plasma polymerized acetonitrile film formed by a plasma polymerization method having a small relative dielectric constant εr is used. Therefore, it is possible to obtain the MIM switching element having a large element size while satisfying the driving condition of the liquid crystal display element. Furthermore, since the plasma polymerization method is used as a means for forming the plasma-polymerized acetonitrile film, pinholes do not occur in a large area, and the insulator thin film can be obtained with good reproducibility.
以下図面を用いて本発明の実施例におけるMIMスイッチ
ング素子の構成を説明する。第１図は本発明の実施例に
おけるMIMスイッチング素子を示す断面図である。The configuration of the MIM switching element according to the embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing an MIM switching element according to an embodiment of the present invention.
第１図に示すように、ガラスからなる基板10の上に下部
導体薄膜111を設け、さらに全面に絶縁体薄膜12を設け
る。この絶縁体薄膜12としては、プラズマ重合法により
形成されるプラズマ重合アセトニトリル膜を用いる。さ
らにクロム膜からなる上部導体薄膜13と、透明導電膜か
らなる画素電極14とを設ける。As shown in FIG. 1, a lower conductor thin film 111 is provided on a substrate 10 made of glass, and an insulator thin film 12 is further provided on the entire surface. As the insulator thin film 12, a plasma polymerized acetonitrile film formed by a plasma polymerization method is used. Further, an upper conductor thin film 13 made of a chrome film and a pixel electrode 14 made of a transparent conductive film are provided.
つぎに第１図に示すMIMスイッチング素子の構成を得る
ための製造方法を説明する。Next, a manufacturing method for obtaining the configuration of the MIM switching element shown in FIG. 1 will be described.
まずガラスからなる基板10上の全面に、導体薄膜11材料
として銅膜を形成する。その後、フォトエッチング処理
によって、銅膜からなる導体薄膜11をパターニングし
て、幅寸法が４μｍの下部導体薄膜111を形成する。First, a copper film is formed as a material for the conductor thin film 11 on the entire surface of the substrate 10 made of glass. After that, the conductor thin film 11 made of a copper film is patterned by photoetching to form a lower conductor thin film 111 having a width of 4 μm.
その後、電極取り出し領域を除く基板10上の全面に、プ
ラズマ重合法によって形成するプラズマ重合アセトニト
リル膜からなる絶縁体薄膜12を形成する。このプラズマ
重合アセトニトリル膜の絶縁体薄膜12の形成は、アセト
ニトリル流量:80cm3／分、基板温度:100℃、装置内圧
力:0.5Torr、高周波（RF）電力:100W、処理時間:10分の
条件で、膜厚0.05μｍのプラズマ重合アセトニトリル膜
を形成することができた。このプラズマ重合法により形
成されるプラズマ重合アセトニトリル膜の比誘電率εｒ
は、測定の結果、３から５の値であり、しかも良好な整
流性を示し、ピンホールの発生もなかった。After that, an insulator thin film 12 made of a plasma-polymerized acetonitrile film formed by a plasma polymerization method is formed on the entire surface of the substrate 10 excluding the electrode extraction region. The formation of the insulator thin film 12 of this plasma-polymerized acetonitrile film is performed under the conditions of acetonitrile flow rate: 80 cm 3 / min, substrate temperature: 100 ° C, internal pressure: 0.5 Torr, radio frequency (RF) power: 100 W, processing time: 10 minutes Thus, a plasma polymerized acetonitrile film having a film thickness of 0.05 μm could be formed. The relative permittivity εr of the plasma-polymerized acetonitrile film formed by this plasma-polymerization method
Was a value of 3 to 5 as a result of measurement, and showed good rectifying property, and no pinhole was generated.
その後、上部導体薄膜13としてクロム膜を全面に形成
し、フォトエッチング処理によりパターニングして、幅
寸法が４μｍの上部導体薄膜13を形成する。Then, a chromium film is formed on the entire surface as the upper conductor thin film 13 and patterned by photoetching to form the upper conductor thin film 13 having a width of 4 μm.
その後、画素電極14材料として透明導電膜を全面に形成
し、フォトエッチング処理によりパターニングして、画
素電極14を形成する。After that, a transparent conductive film is formed on the entire surface as a material for the pixel electrode 14, and is patterned by photoetching to form the pixel electrode 14.
この結果、素子面積が16μm2のMIMスイッチング素子を
形成し、さらに通常の液晶表示素子組み立て工程を行
い、絶縁体薄膜12としてプラズマ重合法によって形成さ
れるプラズマ重合アセトニトリル膜を備える液晶表示パ
ネルを得た。As a result, a MIM switching element having an element area of 16 μm 2 was formed, and a normal liquid crystal display element assembling process was performed to obtain a liquid crystal display panel having a plasma-polymerized acetonitrile film formed by plasma polymerization as the insulator thin film 12. It was
このプラズマ重合アセトニトリル膜を備える液晶表示パ
ネルは、応答が早く、良好な表示特性を示した。これは
MIMスイッチング素子の静電容量C MIMが従来のタンタル
酸化膜の1/5から1/8に低減したことによる液晶充電時間
の短縮が起因していると考える。The liquid crystal display panel provided with this plasma-polymerized acetonitrile film had a quick response and showed good display characteristics. this is
It is considered that this is because the capacitance C MIM of the MIM switching element is reduced from 1/5 that of the conventional tantalum oxide film to 1/8, which shortens the liquid crystal charging time.
以上説明した実施例では、下部導体薄膜111として銅
膜、上部導体薄膜13としてクロム膜をそれぞれ用いた例
で説明したが、他の金属膜を用いてもよい。そして基板
10をエッチングしないエッチャントを選択することによ
り、従来必要であった保護膜の形成を省略することがで
きる。In the embodiments described above, the copper film is used as the lower conductor thin film 111 and the chromium film is used as the upper conductor thin film 13, but other metal films may be used. And the substrate
By selecting an etchant that does not etch 10, it is possible to omit the formation of a protective film, which has been conventionally required.
さらに下部導体薄膜111と上部導体薄膜13とは、いずれ
も透明導電膜を用いてもよい。この透明導電膜で構成し
た液晶表示パネルにおいては、従来と同程度かもしくは
それ以上の特性を示した。これは透明導電膜の比抵抗が
２×10-4オーム・センチメートルと、タンタル膜からな
る従来の下部導体薄膜の約1/2に低下したためであり、
大型の液晶表示パネル化に有効な手段といえる。さらに
MIMスイッチング素子の構成要素がすべて透明体で構成
されているため、素子寸法が大きくなっても、外観的に
はほとんど識別されず、表示特性上、非常に好ましい構
造といえる。Furthermore, both the lower conductor thin film 111 and the upper conductor thin film 13 may use transparent conductive films. The liquid crystal display panel composed of this transparent conductive film showed characteristics equal to or better than the conventional one. This is because the specific resistance of the transparent conductive film is 2 × 10 −4 ohm · cm, which is about half that of the conventional lower conductor thin film made of tantalum film.
It can be said that this is an effective means for making a large liquid crystal display panel. further
Since all the constituent elements of the MIM switching element are made of a transparent body, even if the element size increases, they are hardly discernible in appearance, and it can be said that this is a very preferable structure in terms of display characteristics.
以上説明したように、本発明によるプラズマ重合により
形成されたプラズマ重合アセトニトリル膜を絶縁性薄膜
として用いることにより、0.05μｍ程度と薄膜化した膜
厚で、広い面積でピンホールの発生がなく、しかも比誘
電率が低い被膜が比較的容易に得られる。このためMIM
スイッチング素子特性の向上や、大型液晶表示パネルの
作成や、工程簡略化や、信頼性の向上などに多大の効果
がある。さらに下部導体薄膜と上部導体薄膜とを透明導
電膜で構成することによって、表示品質を改善すること
ができる。As described above, by using the plasma-polymerized acetonitrile film formed by plasma polymerization according to the present invention as the insulating thin film, the thin film thickness is about 0.05 μm, and pinholes are not generated in a wide area. A coating having a low relative dielectric constant can be obtained relatively easily. For this reason MIM
It is very effective in improving the characteristics of switching elements, creating a large-sized liquid crystal display panel, simplifying the process, and improving reliability. Furthermore, the display quality can be improved by forming the lower conductor thin film and the upper conductor thin film with transparent conductive films.
第１図は本発明の実施例におけるMIMスイッチング素子
を示す断面図、第２図は従来例におけるMIMスイッチン
グ素子を示し、第２図（ａ）は平面図、第２図（ｂ）は
断面図である。 10……基板、12……絶縁体薄膜、13……上部導体薄膜、
14……画素電極、111……下部導体薄膜。FIG. 1 is a sectional view showing an MIM switching element according to an embodiment of the present invention, FIG. 2 is a MIM switching element according to a conventional example, FIG. 2 (a) is a plan view, and FIG. 2 (b) is a sectional view. Is. 10 …… Substrate, 12 …… Insulator thin film, 13 …… Upper conductor thin film,
14 …… Pixel electrode, 111 …… Lower conductor thin film.
Claims (1)
部導体薄膜とを順次積層する三層構造からなるMIMスイ
ッチング素子において、 絶縁体薄膜はプラズマ重合アセトニトリル膜を用いるこ
とを特徴とするMIMスイッチング素子。1. A MIM switching element having a three-layer structure in which a lower conductor thin film, an insulator thin film, and an upper conductor thin film are sequentially laminated on a substrate surface, wherein the insulator thin film is a plasma-polymerized acetonitrile film. Switching element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61025591A JPH077851B2 (en) | 1986-02-07 | 1986-02-07 | MIM switching element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61025591A JPH077851B2 (en) | 1986-02-07 | 1986-02-07 | MIM switching element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62183579A JPS62183579A (en) | 1987-08-11 |
| JPH077851B2 true JPH077851B2 (en) | 1995-01-30 |
Family
ID=12170151
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61025591A Expired - Fee Related JPH077851B2 (en) | 1986-02-07 | 1986-02-07 | MIM switching element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH077851B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7626198B2 (en) | 2005-03-22 | 2009-12-01 | Semiconductor Energy Laboratory Co., Ltd. | Nonlinear element, element substrate including the nonlinear element, and display device |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2605382B2 (en) * | 1987-12-18 | 1997-04-30 | セイコーエプソン株式会社 | Active matrix substrate manufacturing method |
-
1986
- 1986-02-07 JP JP61025591A patent/JPH077851B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7626198B2 (en) | 2005-03-22 | 2009-12-01 | Semiconductor Energy Laboratory Co., Ltd. | Nonlinear element, element substrate including the nonlinear element, and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62183579A (en) | 1987-08-11 |
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