[go: up one dir, main page]

JPH0773107B2 - Method for manufacturing optical element substrate - Google Patents

Method for manufacturing optical element substrate

Info

Publication number
JPH0773107B2
JPH0773107B2 JP4311843A JP31184392A JPH0773107B2 JP H0773107 B2 JPH0773107 B2 JP H0773107B2 JP 4311843 A JP4311843 A JP 4311843A JP 31184392 A JP31184392 A JP 31184392A JP H0773107 B2 JPH0773107 B2 JP H0773107B2
Authority
JP
Japan
Prior art keywords
optical element
ausn
micro
substrate
foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP4311843A
Other languages
Japanese (ja)
Other versions
JPH06163554A (en
Inventor
宏 本望
正隆 伊藤
純一 佐々木
義信 金山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4311843A priority Critical patent/JPH0773107B2/en
Publication of JPH06163554A publication Critical patent/JPH06163554A/en
Publication of JPH0773107B2 publication Critical patent/JPH0773107B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Punching Or Piercing (AREA)
  • Mounting, Exchange, And Manufacturing Of Dies (AREA)
  • Led Device Packages (AREA)
  • Semiconductor Lasers (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、光通信用光モジュール
などに用いられる光素子を固定する基板の製造方法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a substrate for fixing an optical element used in an optical module for optical communication.

【0002】[0002]

【従来の技術】光通信は、半導体レーザ(LD)、発光
ダイオード(LED)、ファトダイオード(PD)、光
変調器を始めとして、光ファイバ、光スイッチ、光アイ
ソレータ、光導波路等の能動、受動素子の高性能、高機
能化により応用範囲が拡大さるつつある。近年、この応
用範囲の一つとして一般加入者系への適用が考えられて
おり、これに伴い、光素子を搭載したモジュールの低価
格化が要求されている。モジュール低価格化の有効な手
段として、複数個の微小接合バンプを介して光素子を無
調整で基板上に実装する無調整光実装が注目されてい
る。微小接合バンプを形成する方法は、微小ポンチとダ
イスとを用いてリボン状の接合金属箔を打ち抜き、基板
上に微小接合バンプを形成するもので、微小接合バンプ
として信頼性の高いAuSnバンプを用いたものが特開
平4−152682号公報、「アレイ状光素子用サブ基
板の作製方法」に詳細に記されている。
2. Description of the Related Art Optical communications include semiconductor lasers (LDs), light emitting diodes (LEDs), photodiodes (PDs), optical modulators, active fibers such as optical fibers, optical switches, optical isolators, and optical waveguides. The range of applications is expanding due to higher performance and higher functionality of devices. In recent years, application to general subscriber systems has been considered as one of the application ranges, and along with this, there has been a demand for cost reduction of modules equipped with optical elements. As an effective means for reducing the cost of a module, unadjusted optical mounting, in which an optical element is mounted on a substrate without adjustment through a plurality of micro-junction bumps, has been attracting attention. A method of forming a micro-bonding bump is to punch a ribbon-shaped bonding metal foil using a micro-punch and a die to form a micro-bonding bump on a substrate. The details are described in Japanese Patent Application Laid-Open No. 4-152682, "Method for manufacturing sub-substrate for arrayed optical element".

【0003】[0003]

【発明が解決しようとする課題】微小ポンチとダイスと
を用いてリボン状のAuSn箔を打ち抜く場合、AuS
n材料が硬く脆いために、打ち抜き後の微小AuSnバ
ンプにカケが生じ易い。このため、打ち抜きごとの微小
接合バンプの形状、重量が異なりバンプ高さが不均一と
なる。これにより、複数個の微小接合バンプを介して接
合された光素子は、傾き、接合不良などの欠陥を生じ、
実装歩留まりが低下するという大きな問題があった。
When punching a ribbon-shaped AuSn foil by using a minute punch and a die, AuSn is used.
Since the n material is hard and brittle, chipping is likely to occur in the fine AuSn bump after punching. Therefore, the shape and weight of the micro-bonded bumps are different for each punching, and the bump heights are not uniform. As a result, the optical element bonded through the plurality of micro-bonded bumps has defects such as tilt and bonding failure,
There was a big problem that the mounting yield was lowered.

【0004】[0004]

【課題を解決するための手段】本発明の光素子用基板の
製造方法は、微小ポインチとダイスとを用いてリボン状
の接合金属を打ち抜き、基板上に微小接合バンプを形成
する光素子用基板の製造方法において、リボン状の接合
金属を加熱しながら打ち抜くことを特徴とする。
A method for manufacturing an optical element substrate according to the present invention is an optical element substrate in which a ribbon-shaped bonding metal is punched out using a minute poinch and a die to form a minute bonding bump on the substrate. In the manufacturing method described above, the ribbon-shaped joining metal is punched while being heated.

【0005】[0005]

【作用】AuSn箔を加熱することにより、AuSn材
料は軟化する。これにより、打ち抜き後の微小AuSn
バンプにはカケが生じにくく、このため、形状、重量と
もに同等な微小接合バンプを再現性良く形成することが
できる。
The AuSn material is softened by heating the AuSn foil. As a result, the minute AuSn after punching
Since the bumps are unlikely to be chipped, it is possible to reproducibly form minute bonding bumps having the same shape and weight.

【0006】[0006]

【実施例】以下、本発明について、図面を参照して説明
する。図1は、本発明の第1の実施例を示す概要図であ
る。本構成では、まず、厚さ50μmのリボン状のAu
Sn箔3を外径50μmの超鋼製微小ポンチ1と穴径6
0μmのステンレス製ダイス2の間に挿入する(図1
(a))。次に、AuSn箔3を180℃程度に加熱し
ながら微小ポンチ1をAuSn箔3に打付け、微小Au
Snバンプ6をSi基板4上に直径60μmのAuパッ
ト5表面に打ち抜く(図1(b))。加熱温度は、接合
金属の融点より100℃程度低い温度に設定するのが適
当と考えるので、AuSnの場合、融点280℃より1
00℃程度低い180ど程度に設定してある。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram showing a first embodiment of the present invention. In this configuration, first, a ribbon-shaped Au film with a thickness of 50 μm is used.
Sn foil 3 with micro steel punch 1 having an outer diameter of 50 μm and hole diameter 6
Inserted between 0 μm stainless steel dies 2 (Fig. 1
(A)). Next, the minute punch 1 is struck on the AuSn foil 3 while heating the AuSn foil 3 to about 180 ° C.
The Sn bump 6 is punched on the surface of the Au pad 5 having a diameter of 60 μm on the Si substrate 4 (FIG. 1B). Since it is considered appropriate to set the heating temperature to a temperature about 100 ° C. lower than the melting point of the joining metal, in the case of AuSn, the melting point is 280 ° C. or more.
The temperature is set to about 180 degrees, which is low at about 00 ° C.

【0007】加熱温度の許容範囲は、接合金属の厚さよ
り異なるが設定温度に対して±50℃程度が適当であ
る。また、加熱方法は、ダイス2を保持している支持台
にヒータが内蔵されており、ダイス2を伝達してAuS
n箔3は加熱されている。このように、AuSn箔3は
加熱により軟化しているため、打ち抜き後の微小AuS
nバンプ6にはカケが生じにくくなる。このため、形
状、質量ともに同等な微小接合バンプを再現良く形成す
ることができる。従って、打ち抜きごとの微小接合バン
プの高さは均一となり、複数個の微小AuSnバンプを
介して接合された光素子の接合状態は良好で、実装歩留
まりが向上する。
The allowable range of the heating temperature is different from the thickness of the joining metal, but it is suitable to be about ± 50 ° C. with respect to the set temperature. In addition, the heating method is that a heater is built in the support table that holds the die 2, and the AuS is transmitted by transmitting the die 2.
The n-foil 3 is heated. Thus, since the AuSn foil 3 is softened by heating, the minute AuS foil after punching
The n-bump 6 is less likely to be chipped. Therefore, minute bonding bumps having the same shape and mass can be formed with good reproducibility. Therefore, the heights of the micro-bonding bumps for each punching are uniform, the bonding state of the optical element bonded through the plurality of micro-AuSn bumps is good, and the mounting yield is improved.

【0008】以上、本実施例では微小ポンチの数を1つ
としたが、これに限定されず、多数個の微小ポンチを用
いても良い。
As described above, the number of the micro punches is one in the present embodiment, but the number is not limited to this, and a large number of micro punches may be used.

【0009】また、本実施例ではAuSn箔を加熱した
が、AuSn箔に接続した微小ポンチによる放熱を防ぐ
ために、微小ポンチも加熱しても良い。更に、打ち抜き
後の微小AuSnバンプをAuパット表面に良好に付着
させるためにAuにパットを加熱しても良い。
Although the AuSn foil is heated in this embodiment, the minute punch may also be heated in order to prevent heat radiation by the minute punch connected to the AuSn foil. Further, the pad may be heated on the Au in order to make the fine AuSn bumps after punching adhere well to the Au pad surface.

【0010】また、本実施例では加熱する手段としてヒ
ータを用いたがこれに限定されず、例えばレーザ光、白
熱光、高周波等でも良い。
Further, in the present embodiment, the heater is used as the heating means, but the heater is not limited to this. For example, laser light, incandescent light, high frequency, or the like may be used.

【0011】また、接合金属材料としてAuSnを用い
たがこれに限定されず、例えば硬くて脆い材料であるA
uSi等でも良い。
Although AuSn is used as the joining metal material, the material is not limited to AuSn. For example, a hard and brittle material A
uSi or the like may be used.

【0012】[0012]

【発明の効果】以上述べた通り、形状、重量ともに同等
な微小接合バンプを再現性良く形成することができるた
め、実装歩留まりを向上できる。
As described above, since the minute bonding bumps having the same shape and weight can be formed with good reproducibility, the mounting yield can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を示す概略図である。FIG. 1 is a schematic diagram showing a first embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 微小ポンチ 2 ダイス 3 AuSn箔 4 シリコン基板 5 Auパット 6 微小AuSnバンプ 1 Micro punch 2 Dice 3 AuSn foil 4 Silicon substrate 5 Au pad 6 Micro AuSn bump

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01S 3/18 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI technical indication H01S 3/18

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 微小ポンチとダイスとを用いてリボン状
の接合金属を打ち抜き、基板上に微小接合バンプを形成
する光素子用基板の製造方法において、リボン状の接合
金属を加熱しながら打ち抜くことを特徴とする光素子用
基板の製造方法。
1. A method for manufacturing a substrate for an optical element, in which a ribbon-shaped joining metal is punched out by using a fine punch and a die to form a fine joining bump on the substrate, and the ribbon-like joining metal is punched out while being heated. A method for manufacturing a substrate for an optical element, comprising:
JP4311843A 1992-11-20 1992-11-20 Method for manufacturing optical element substrate Expired - Lifetime JPH0773107B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4311843A JPH0773107B2 (en) 1992-11-20 1992-11-20 Method for manufacturing optical element substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4311843A JPH0773107B2 (en) 1992-11-20 1992-11-20 Method for manufacturing optical element substrate

Publications (2)

Publication Number Publication Date
JPH06163554A JPH06163554A (en) 1994-06-10
JPH0773107B2 true JPH0773107B2 (en) 1995-08-02

Family

ID=18022076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4311843A Expired - Lifetime JPH0773107B2 (en) 1992-11-20 1992-11-20 Method for manufacturing optical element substrate

Country Status (1)

Country Link
JP (1) JPH0773107B2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5299403B2 (en) 2010-11-09 2013-09-25 株式会社デンソー Drilling device and drilling method
CN103561882B (en) 2011-05-26 2015-11-25 约翰逊控股公司 Process for stamping and the parts prepared thus
CN102886422B (en) * 2012-10-22 2015-02-25 安徽工业大学 Punching method for improving flanging capability of sheet
WO2014097661A1 (en) * 2012-12-22 2014-06-26 株式会社小松精機工作所 Method for producing metal powder, and metal powder
JP6233137B2 (en) * 2014-03-28 2017-11-22 日本電気株式会社 Bump forming apparatus and method for manufacturing bumped component
CN105642765B (en) * 2015-12-29 2018-03-16 哈尔滨工业大学 A kind of titanium alloy plate hot piercing device and the method being punched out using the device

Also Published As

Publication number Publication date
JPH06163554A (en) 1994-06-10

Similar Documents

Publication Publication Date Title
US5981945A (en) Optoelectronic transducer formed of a semiconductor component and a lens system
JP2877812B2 (en) Optical coupling element and method of manufacturing the same
JP2629435B2 (en) Manufacturing method of sub-substrate for arrayed optical element
EP0502670A2 (en) Laser diode array
JPH08204288A (en) Optical semiconductor device
JPH0560952A (en) Optical semiconductor unit
EP0439227B1 (en) Semiconductor device comprising a support, method of manufacturing it, and method of manufacturing the support
JPH0773107B2 (en) Method for manufacturing optical element substrate
US4793688A (en) Photo electro device, method for manufacture of same, and lens support frame for use in such photo electro device
Itoh et al. Use of AuSn solder bumps in three-dimensional passive aligned packaging of LD/PD arrays on Si optical benches
US5360761A (en) Method of fabricating closely spaced dual diode lasers
EP0961327B1 (en) Photosemiconductor device mounted structure
JP2527054B2 (en) Optical module submount and manufacturing method thereof
KR20050122200A (en) Thin-film semiconductor component and production method for said component
JPH06283536A (en) Solder bump packaging substrate
CN109683218B (en) Optical element, optical module, and method for manufacturing the same
JP5534155B2 (en) Device and device manufacturing method
JP2002111113A (en) Optical module
JPH0773108B2 (en) Optical device substrate manufacturing equipment
JPH0758149A (en) Method for mounting chip part
JPH07176546A (en) Semiconductor device
US20140097232A1 (en) Bonding method and production method
JPH06246479A (en) Joined metallic sheet
JPH10341040A (en) Optical semiconductor module and fabrication thereof
JPH07174941A (en) Optical element coupling module for optical communication and its production

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19960123

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20070802

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080802

Year of fee payment: 13

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080802

Year of fee payment: 13

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090802

Year of fee payment: 14

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090802

Year of fee payment: 14

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100802

Year of fee payment: 15

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110802

Year of fee payment: 16

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110802

Year of fee payment: 16

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120802

Year of fee payment: 17

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130802

Year of fee payment: 18

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130802

Year of fee payment: 18