JPH0758201A - Manufacture of multilayer wiring board - Google Patents

Abstract

PURPOSE:To obtain a highly reliable multilayer wiring which can be brought into the state of high density easily by a method wherein, after a contact hole is formed in the insulating film of a board and flat surface is obtained by plating, a wiring layer is formed in such a manner that it is brought into contact with the flat surface. CONSTITUTION:A copper thin film pattern is formed on the insulating film 2 formed on the surface of a board 1 as the first layer wiring film 3. Photosensitive polyimide is coated thereon, and after a contact hole 9, with a side of about 20mum, has been formed by conducting an exposing and developing operation, a heat treatment is conducted at 400 deg.C for thirty minutes, and an interlayer insulating film 4 is formed. Then, after forming a titanium film 5 and a copper film 6 successively in 1mum thickness using a sputtering method, a thick copper- plating film 7 is formed on a recessed part by conducting electric plating under the condition wherein a flat surface can be obtained using the above-mentioned titanium film 5 and copper film 6 as an electrode. A titanium-copper-titanium multilayer thin film 8 is formed on the board 1 for which burying is conducted as the second wiring layer. As a result, a highly precise multilayer wiring can be obtained by reduced manhours.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer wiring board, and more particularly to a method for manufacturing a multilayer wiring board in which wirings are formed at a high density.

[0002]

2. Description of the Related Art In recent years, with the development of semiconductor integrated circuit technology, electronic devices have been made smaller, thinner, and have higher performance, and it is important to mount semiconductor chips on a circuit board in high density. Has become a problem.

Therefore, in recent years, the wiring in the multilayer wiring board has also been densified, and the wiring is becoming finer and multilayered. In order to form fine wiring, conventionally, as shown in FIG. 5, an interlayer insulating film 4 is formed on a first layer wiring composed of a thin film metal layer 3 formed on a surface of a substrate 1 with an insulating layer 2 interposed therebetween. A contact hole 9 is formed in this (FIG. 5 (a)), and then a thin film metal layer 8 is further formed (FIG. 5 (b)), and a thin film metal is formed through a resist pattern 13 (FIG. 5 (c)). A method of etching the layer 8 to obtain a pattern of the second layer wiring (FIG. 5 (d)) is adopted.

However, when attempting to form a multi-layer wiring by this method, the insulating film on the contact hole 9 has a concave shape. Therefore, a contact hole for connecting the second layer wiring and the third layer wiring is further formed thereon. Since the contact hole becomes deeper by forming, the disconnection of the wiring is likely to occur. Therefore, as shown in FIG. 6, it is necessary to shift the positions of the contact holes 9 in the multilayer wiring in which the wirings (3, 8, 13) of three layers or more are formed, and as a result, the wiring density is lowered. It will be.

Further, as a wiring layer material having an interlayer connecting portion, aluminum and gold have been used because of problems such as adhesion to an insulating layer and corrosion resistance. However, aluminum has high resistance and gold has high cost. There was a problem.

For this reason, an attempt has been made to use a connection method in which a metal is embedded in a contact hole so that the upper portion of the connection portion between wiring layers does not have a concave shape. For example, as shown in FIG. 6, a metal film having a film thickness similar to that of the insulating layer 4 to be formed later is formed in advance by an evaporation method, a sputtering method, or the like, and the insulating film 4 is formed thereon by a coating method. A method of forming and flattening the surface has also been proposed. However, with this method, it is difficult to completely flatten the metal film, and the metal film has a protruding shape, and the periphery of the contact hole to be formed later is raised more than other portions, which is rather an adverse effect.

The material of the metal film is not particularly limited, but when copper or a copper alloy is used to achieve low resistance and low cost interlayer connection, corrosion prevention and diffusion into the insulating film are required. In order to prevent this, a step of covering and protecting the upper layer must be provided after the formation of the metal film, which causes a problem of increasing the number of steps.

In order to solve such a problem, there is a selective growth method as a method which does not require an etching step, which has been put to practical use in the manufacturing process of semiconductor chips. In this method, a metal such as tungsten is selectively grown only by a chemical vapor deposition method on a wiring portion exposed at the bottom of a contact hole formed in an insulating film to obtain a flat interlayer connection portion. It is a thing. However, in this method, the metal material used is limited to the chemical vapor deposition method and the material capable of selective growth. Currently, the commonly used metal material is tungsten, which is a material with a high melting point that is not easily corroded and has little diffusion into the insulating film, so it is a material that is relatively easy to use, but it has a high resistivity and high contact resistance. It is difficult to lower it. Furthermore, since the substrate temperature is relatively high in the chemical vapor deposition process, a material with high heat resistance is required as the insulating film as well, and an organic insulating film with a high dielectric constant and excellent electrical characteristics can withstand high temperature processes. There is a problem that it cannot be used and is inevitably unusable.

[0009]

As described above, in order to realize a multi-layer wiring having a high-density wiring, it is necessary to bury a metal in the contact hole and planarize the interlayer connection. However, any of these methods has a problem in that it is impossible to obtain a multilayer wiring having good characteristics and high reliability in increasing the density.

The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a multi-layer wiring which can be easily increased in density and has high reliability.

[0011]

Therefore, in the present invention, an interlayer insulating film is formed on the first wiring layer formed on the substrate,
After forming a contact hole in this, the entire surface of the substrate is covered with a conductive film, and using this conductive film as an electrode, electroplating is performed under conditions such that a thick plating film is formed in the recess and a flat surface is obtained. After the flattening is performed, the second wiring layer is formed so as to contact the plated film.

Desirably, a step of forming a first wiring layer on a substrate, a step of forming an insulating film on the first wiring layer and forming a contact hole in the insulating film, and an insulating step in which the contact hole is formed. On the film, a step of forming a thin film conductive layer including a high melting point metal layer having a higher melting point than copper or a copper alloy, and a melting point higher than that of copper or a copper alloy by using a plating bath in which an organic substance is added to the upper surface of the thin film conductive layer. A step of forming a thin film conductive layer containing a high melting point metal layer, and electroplating copper or a copper alloy using a plating bath with an organic substance added to the thin film conductive layer upper surface with the plating film on the main surface of the substrate. A step of flattening, and a step of isotropically etching the plating film to remove the copper or copper alloy formed in the contact hole from the plating metal film on the main surface of the substrate while leaving the same thickness as the insulating film. So There.

According to the second aspect of the present invention, after forming the contact hole in the first interlayer insulating film and prior to forming the thin film conductor layer, the second insulating film is formed and patterned to form the second insulating film. The wiring layer pattern forming region is selectively removed to form a recess, and then the entire substrate surface is covered with a conductive film,
Using this conductive film as an electrode, electroplating is performed under conditions such that a thick plating film is obtained in the recess, the surface is flattened, the plating film on the second insulating film is removed, and the plating film in the recess is selected. The plating film is isotropically etched so as to be left as it is, and the filling of the concave portion caused by the contact hole and the formation of the second wiring layer are simultaneously achieved by plating.

As the insulating layer, a polyimide resin formed by a coating method or a silicon oxide film formed by a coating method, a chemical vapor deposition method or a sputtering method is used. Further, titanium is used as the refractory metal,
At least one of nickel, vanadium, niobium, tantalum, chromium, molybdenum, and tungsten is used. These are formed by a vapor deposition method or a sputtering method.

The organic substances added to the plating bath are organic nitrogen compounds, organic sulfur compounds, and polyether compounds in appropriate amounts so that the step formed on the surface of the plated film on the opening formed in the insulating layer is minimized. Compound.

[0016]

According to the above method, in the case of a plating solution using an organic additive, for example, a thick plating film can be obtained in the recess, and a flat surface can be obtained.
After forming a contact hole in the insulating film, plating is performed to obtain a flat substrate surface, this plating film is isotropically etched, and if the etching is completed when the surface of the insulating film is reached, The plating film is selectively left only in the contact hole, and the filling is completed. In this way, filling is completed only by using the exposure and development process for forming the contact hole, the number of steps is small, and the dimensional conversion error is extremely small.

Here, in the step of forming a copper or copper alloy film or the like by electroplating, the flattening of the surface of the deposited film can be promoted by adding an appropriate amount of an organic substance to the plating bath. More preferably, the cathode current density during the plating step should be as high as possible within the range where charring does not occur in the deposited metal film and abnormal growth due to current concentration in local areas does not occur.

In this step, after forming the contact hole, a refractory metal such as titanium, nickel, vanadium, niobium, tantalum, chromium, molybdenum, or tungsten is used as a part of the cathode of the electroplating.
The plated copper or copper alloy does not come into direct contact with the insulating film, so that the corrosion of copper or the copper alloy can be prevented, the diffusion into the insulating film can be prevented, and the adhesive force with the insulating film can be increased. Furthermore, when forming a metal film by electroplating, by adding an appropriate amount of an organic nitrogen compound, an organic sulfur compound, or a polyether compound, organic matter is preferentially adsorbed on a convex or concave surface over a concave or convex surface on an uneven surface. Therefore, the deposition of the plating film is suppressed. As a result, the deposition rate of the plating film becomes slower at the convex portions and becomes faster at the concave portions, so that when the plating is continued, as a result, the surface is flat and the surface is flat. The metal film thus formed has a uniform film thickness except for the contact hole portion, while the contact hole portion is thicker than other portions. Therefore, if this film is etched using an etchant whose etching rate is uniform in the thickness direction, the copper or copper alloy inside the contact hole is selectively left, and the metal film in other portions is removed. It becomes possible.

[0019]

Embodiments of the present invention will now be described in detail with reference to the drawings.

First, the insulating film 2 is formed on the surface of the substrate 1,
A copper thin film pattern is formed as the first layer wiring film 3 on this upper layer, and a photosensitive polyimide manufactured by Toray Industries, Inc., which is called Photonice UR-314, is applied on this upper layer, exposed and developed, and 20 μm per side. A contact hole 9 of about a certain degree is formed. After that, heat treatment is performed at 400 ° C. for about 30 minutes to form the interlayer insulating film 4 (FIG. 1 (a)). Here, the film thickness of polyimide is set so that the film thickness after heat treatment will be about 20 μm. In order to prevent disconnection, the exposure and development conditions are controlled so that the angle between the bottom of the contact hole and the side wall is 100 degrees or more.

Then, a titanium (Ti) film 5 and a copper (Cu) film 6 are successively and successively laminated by a sputtering method so that the total film thickness becomes about 1 μm.
Here, the copper film functions as a plating cathode. Titanium is a refractory metal, and acts as a barrier that prevents mutual diffusion between the polyimide, which is the interlayer insulating film, or the copper, which is the first layer wiring, and the plating cathode and the plating film of the upper layer. Therefore, the film thickness may be thin. When the copper and the polyimide are formed so as to be in direct contact with each other, the oxygen in the polyimide oxidizes the copper, lowering the adhesiveness and facilitating the peeling. Further, the reason for continuous formation is that the titanium surface is easily oxidized. By thus forming the upper layer film continuously without breaking the vacuum, a low resistance film is formed without interposing a natural oxide film.

In this way, the substrate 1 is installed in the electroplating apparatus as shown in FIG. 2, and the copper film 6 is connected to this cathode as a plating cathode. Here, the plating bath is copper sulfate
A solution consisting of 75 g / l, sulfuric acid (specific gravity 1.84) 100 ml / l, polyethylene glycol 100 mg / l and thiourea 10 mg / l was used, and the liquid temperature was set to 25 ° C and the current density was 5 A / dm.
Plating is performed while stirring at ² to form a copper plating film 7 having a thickness of about 20 μm. 1 step due to contact hole
Since it is about μm, a sufficiently flat surface can be obtained by forming a plating film of about 20 μm (FIG. 1 (c)).

After that, as shown in FIG. 1 (d), the copper plating film 7 formed on the surface of the substrate 1 is etched with a mixed solution of ammonium persulfate, sulfuric acid and ethanol to form a copper film 6 (plating on the substrate surface). Remove it including the cathode and leave it only in the contact hole.

Next, as shown in FIG. 1 (e), the titanium film 5 on the main surface of the substrate 1 is removed by etching with an etching solution containing EDTA, ammonia and hydrogen peroxide.

A laminated thin film 8 of titanium-copper-titanium is formed as a second wiring layer on the substrate 1 thus embedded (FIG. 1 (f)).

Here, if necessary, from the formation of the interlayer insulating film, this step may be repeated to form the multilayer wiring.

In this way, the embedding is completed only by using the exposure and development step for forming the contact hole 9.
It is possible to perform high-precision multi-layer wiring with a small number of man-hours, an extremely small size conversion error.

In the above embodiment, the first layer wiring and the second layer wiring are
The example in which the layer wiring is directly connected has been described.
Even if the layer wiring and the second layer wiring are not directly connected but one layer or another wiring layer is interposed between them, the first layer wiring and the second layer wiring are indirectly connected. Good.

In this method for explaining the second embodiment of the present invention, prior to plating, the resist pattern 10 is formed so as to draw an inversion pattern of the second layer wiring, pattern plating is performed, and plating is performed. It is characterized in that the recess formed by removing the resist pattern 10 later is filled with the coating insulating film 4 so that the contact hole is filled and the second wiring layer pattern is formed at the same time.

That is, the plating cathode forming process (see FIG. 1).
(a) and FIG. 1 (b)) are performed in the same manner as in the first embodiment, and as shown in FIG. 3 (a), a thick film resist manufactured by Hoechst Japan Co., called AZ-4903. Is applied by a spin coating method to form a plating resist layer having a film thickness of 25 μm, and baking is performed at 90 ° C. After that, the wiring pattern of the second wiring layer is opened by exposure and development to obtain a resist pattern 10.

Next, as in the case of the first embodiment, the apparatus is set in a plating apparatus and plating is performed under the same conditions as shown in FIG.
A copper plating film 7 having a thickness of about 20 μm is formed as shown in FIG. After this, as shown in FIG. 3 (c), the resist pattern 10
Removed by acetone and the second formed by copper plating
The copper film other than the wiring pattern of the wiring layer, that is, the copper film 6 used as the plating cathode on the surface of the substrate is formed of ammonium persulfate,
Etching with a mixed solution of sulfuric acid and ethanol.
Further, after that, the titanium film 5 on the main surface of the substrate 1 is formed with EDTA,
It is removed by etching with an etching solution composed of ammonia and hydrogen peroxide solution.

Then, a photosensitive polyimide (Photo Nice UR-3140) is formed on the surface of the substrate on which the second wiring layer is formed.
Is applied, and the photosensitive polyimide 4 formed on the second wiring layer and protruding is removed by exposure and development (FIG. 3 (d)).
).

After that, if a photosensitive polyimide is applied again, if necessary, a flatter surface can be obtained.

In this way, it is possible to easily obtain a multilayer wiring. In the exposure and development step of FIG. 3 (d), the pattern accuracy is not so necessary and a slight deviation may occur.

Further, the exposure and development step shown in FIG.
It may be omitted if it is sufficiently flattened and the photosensitive polyimide is applied, in which case the exposure and development step can be omitted once.

When a multilayer wiring is further formed, photosensitive polyimide may be applied again and the above steps may be repeated.

According to such a method, the surface irregularities can be suppressed to within ± 5% of the depth of the contact hole, and even when the thickness of the interlayer insulating film is 20 μm or 30 μm, the surface irregularities are ±. It can be suppressed within 5%. In the case of the conventional step via method, the degree of unevenness on the surface after formation is ± 2 with respect to the depth of the contact hole.
It can be seen that the surface unevenness is significantly improved compared to about 5%. In addition, as a result of the degree of unevenness on the surface being significantly reduced, it is not necessary to shift the position of the contact hole even in a multilayer wiring having three or more wiring layers, and the contact hole can be provided on the contact hole. The wiring density is improved by about 20% as compared with the step-via method.

Further, compared with the conventional method of filling the contact hole with a metal film and then covering the surface of the substrate with an insulating material to flatten it, the exposure / development process is performed only once for each wiring layer. As a result of forming the multilayer wiring of 5 layers, the number of steps is reduced by about 20% and the yield is improved.

Further, the connection resistance is reduced to about 1/3 as compared with the conventional buried connection in the contact hole made of tungsten.

As described above, the multilayer wiring obtained by the manufacturing method according to the present invention is extremely excellent in terms of wiring density, number of steps, and electrical characteristics.

In the second embodiment, if the titanium film 5 as the refractory metal film and the copper film 6 as the plating cathode are formed after the application of the photosensitive polyimide as the plating resist, the plating resist can be formed. The photosensitive polyimide can be used as it is as an interlayer insulating film,
Man-hours are greatly reduced. In this method, which will be described as a third embodiment of the present invention, an inversion pattern of the second layer wiring is drawn prior to the formation of the titanium film 5 which is a refractory metal film and the copper film 6 which serves as a plating cathode. As described above, the resist pattern 10 is formed, pattern plating is performed, and after plating, the entire surface is lightly etched to remove the titanium film 5 and the copper film 6 on the resist pattern 10, and the resist pattern 10 is used as it is as an interlayer insulating film. I am trying to do it.

That is, the steps up to the formation of the contact hole 9 (FIG. 1 (a)) are carried out in the same manner as in the first embodiment, and then, as shown in FIG. 4 (a), a Toray called UR-3140 is used. A photosensitive polyimide manufactured by the company is applied by spin coating to form an insulating layer having a thickness of 20 μm. After that, the wiring pattern of the second wiring layer is opened by exposure and development to obtain a resist pattern 10. Then, heat treatment is performed at 400 ° C. for 30 minutes, and then a titanium film 5 as a refractory metal film and a copper film 6 as a plating cathode are formed by a sputtering method.

After that, it is installed in a plating apparatus in the same manner as in the second embodiment, and plating is performed under the same conditions as shown in FIG.
As shown in (b), a copper plating film 7 having a film thickness of about 25 μm is formed.

After that, as shown in FIG. 4 (c), light etching was performed with a mixed solution of ammonium persulfate, sulfuric acid and ethanol to obtain a copper film other than the wiring pattern of the second wiring layer, that is, the surface of the substrate. The titanium film 5 is exposed by etching to a depth at which the copper film 6 used as the plating cathode is etched. Then, the titanium film 5, which is a refractory metal film on the main surface of the substrate 1, is removed by etching with an etching solution composed of EDTA, ammonia, and hydrogen peroxide solution.

In this way, multilayer wiring having a flat substrate surface is extremely easily formed.

According to this method, the number of steps is significantly reduced as compared with the second embodiment.

[0047]

As described above, according to the present invention, it is possible to obtain a multi-layer wiring with a small number of steps and a small size conversion error.

[Brief description of drawings]

FIG. 1 is a manufacturing process diagram of a multilayer wiring according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a plating apparatus used in the same process.

FIG. 3 is a manufacturing process diagram of a multilayer wiring according to a second embodiment of the present invention.

FIG. 4 is a manufacturing process diagram of a multilayer wiring according to a third embodiment of the present invention.

FIG. 5 is a manufacturing process diagram of a conventional multilayer wiring.

FIG. 6 is a diagram showing a multilayer wiring board.

[Explanation of symbols]

 1 Substrate 2 Insulating Film 3 First Wiring Layer 4 Interlayer Insulating Film 5 Titanium Film 6 Copper Film (Plating Cathode) 7 Copper Plating Film 8 Second Wiring Layer 9 Contact Hole 10 Resist Pattern

Claims (2)

[Claims] 1. A step of forming an interlayer insulating film on a surface of a substrate or a first wiring layer formed on the upper surface of the substrate and forming a contact hole in the insulating film, and covering the entire surface of the substrate with a conductive film. Using the conductive film as an electrode, a step of flattening the surface by performing electroplating under conditions where a thick plating film is obtained in the recess, and removing the plating film on the interlayer insulating film to remove the plating film in the contact hole. A method of manufacturing a multilayer wiring board, comprising: a step of isotropically etching the plating film so that the plating film is selectively left; and a step of forming a second wiring layer so as to contact the plating film. 2. A step of forming a first interlayer insulating film on a surface of a substrate or a first wiring layer formed on the upper surface of the substrate and forming a contact hole in the first interlayer insulating film, and a second insulating film on the upper layer. Forming, patterning, selectively removing the second wiring layer pattern forming region to form a recess, and covering the entire substrate surface with a conductive film, and using this conductive film as an electrode, the recess is formed. A step of electroplating under conditions such that a thick plated film is formed, and removing the plated film on the second insulating film to selectively leave the plated film in the recesses. And a step of isotropically etching the plated film as described above.