JPH0751635Y2 - Binary signal reader - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention is a binarized signal that can be effectively processed even if a signal obtained by reading a binarized signal recorded like a bar code varies. Regarding the reader.

[Conventional technology]

An apparatus for optically reading a bar code recorded on an object using a laser beam has a configuration shown in FIG. Fourth
In the figure, 1 is an input terminal of an analog signal obtained when a bar code is read, 2 is a positive peak hold circuit, 3 is a negative peak hold circuit, 4 is a voltage divider circuit, 5
Indicates a comparator, a 6 decoder circuit, and 7 indicates an output terminal of a decoded signal.

FIG. 5 is a diagram showing corresponding waveforms in FIG. 4, FIG. 5A is an example of a code to be read such as a bar code, FIG. 5B is an analog input signal of the input terminal 1, and FIG. ) Shows the output signal of the positive peak hold circuit 2, and (c) shows the output signal of the negative peak hold circuit 3. The analog signal (a) input to the input terminal 1 is peak-held in each of the peak-hold circuits 2 and 3 to become signals (b) and (c). Next, in the voltage dividing circuit 4, the voltage (d) obtained by dividing the signals (b) and (c) into two equal parts is taken out.
The comparator 5 compares this voltage (d) with the input signal (a) as a threshold voltage. Therefore, it is judged whether the input signal exceeds the threshold voltage, and the binarized signal shown in (e) is obtained. The signal (e) is a binarized signal substantially corresponding to white and black of the code shown in FIG. 5A. Next, in the decoder circuit 6, this binarized signal is decoded to obtain the analog value of the code decoder shown in FIG. 5A. At this time, if the code shown in FIG. 5A is a bar code for common product codes, one character modular check character is provided next to five characters as data on the right side of the center bar of the code. 6 decodes the modular check character together with the data character to check the accuracy of the read / decode operation.

If the decoded data character does not match the check character, the decoder circuit 6 judges that it is erroneous processing and does not output an output signal to the output terminal 7.

[Problems to be Solved by the Invention]

The operation of the circuit shown in FIG. 4 is normal for a signal such as a normal bar code, but if the signal to be read has a period variation or amplitude variation, or the characteristics of the peak hold circuit vary, the reading The behavior is incorrect. First, the time constant of the peak hold circuit will be described. When the input signal shown in FIG. 6 (a) is obtained at the beginning of reading the barcode, the binary signal may not be appropriate due to the time constant characteristic of the positive / negative peak hold circuit. That is, in FIG. 6A, positive and negative peak points appear at points a, b, and c. Since selecting the time constant of each peak hold circuit in consideration of the bar code status before reading contributes to accurate reading processing, the peak hold circuit 2,
Match the time constant of 3 between the positive signal peak positions a and b. At that time, peak hold waveforms (b) and (c) are obtained,
The waveform divided by the voltage dividing circuit 3 is (d).
Therefore, the binarized signal obtained by comparison with the input signal by the comparator 5 is as shown in (e).

If the time constant of each peak hold circuit is selected to be smaller, it becomes as shown in FIGS. 7 (f) to 7 (j).
In the case of the signal of, the pulse width t _{2 in} the case of FIG. 6 becomes smaller by Δt and becomes the value of t ₁ . In this case, the decoder 6 may detect a mismatch with the check character, and the output signal may not be obtained.

The above is the case where the characteristics of the binarization circuit fluctuate, but if there is amplitude fluctuation or cycle fluctuation in the input analog signal,
The conventional circuit, which only uses the peak hold circuit with a fixed time constant, has a defect that the operation becomes unsuitable and unreadable as in the case of FIGS. 5 and 6 described above. .

An object of the present invention is to improve the above-mentioned drawbacks and to provide an apparatus capable of performing appropriate processing by using a plurality of binarization circuits even if an input analog signal changes.

[Means for Solving the Problems]

FIG. 1 is a diagram showing the principle configuration of the present invention. In FIG. 1, 1 is an analog signal input terminal that can be obtained when a bar code is read, 8-1, 8-2 ... Shows a plurality of binarization circuits having different reading characteristics, and the individual peaks are shown. Consists of a hold circuit, voltage divider circuit, and comparator. Reference numeral 6 is a decoder circuit, and 9 is a sequential processing circuit.

The present invention has the following configuration. That is, the terminal 1 to which the analog signal obtained by reading the signal recorded on the object is applied
, And the binarization circuits 8-1, 8-2, ..., Which are connected in parallel to the application terminal 1 and have different binarization operation characteristics, and the outputs of the respective binarization circuits 8-1, 8-2. Is applied, and it is composed of a sequential processing circuit 9 for converting it to a sequential signal and a decoder circuit 6 for decoding the output of the sequential processing circuit 9.

[Action]

Each of the binarization circuits 8-1, 8-2 ... Is composed of a positive / negative peak hold circuit, a voltage dividing circuit, and a comparator, and the plurality of binarization circuits 8-1, 8-2. ... have different reading characteristics. Therefore, for example, read outputs having different pulse widths are obtained for the same input analog signal, and the read outputs are input to the sequential processing circuit 9. The sequential processing circuit 9 sequentially converts the output of each binarization circuit into a serial output and applies it to the decoder circuit 6. The decoder circuit 6 outputs only an appropriate signal by referring to the check character or the like. Next, even when the amplitude of the input analog signal is changed and applied, only an appropriate signal is output from the serial signals obtained as described above.

〔Example〕

Regarding the different operation characteristics in the binarization circuits 8-1, 8-2 ..., The specific configuration is to change the voltage dividing ratio of the voltage dividing circuit for obtaining the threshold waveform. That is, although the prior art FIG. 4 divides it into two equal parts, it is made to have various values. Therefore, even for the same input signal, the output signal obtained for each binarization circuit is different.

In another embodiment, the time constant of the peak hold circuit in each binarization circuit is set differently. Also in this case, the output signals are obtained differently.

The configuration example of the sequential processing circuit 9 is shown in FIG. In FIG. 2, reference numeral 11 is a reading light effective area detecting device, 12 is a demultiplexing circuit, 13-1, 13-2 ... And circuits, and 14 is an OR circuit. FIG. 3 shows the operation waveform diagram of FIG. Third
FIG. 3 (k) shows the output signal waveform of the detection device 11, which coincides with the cycle of the reading light. (L) to (n) are outputs of the frequency dividing circuit 12, and in the figure, the case where the frequency is divided by 1/3 is shown. (P) ~
(R) shows the outputs of the binarization circuits 8-1 to 8-3, respectively. The AND circuits 13-1 to 13-3 calculate the logical products of (p) and (l), (q) and (m), and (r) and (n), respectively, and the OR circuit 14 extracts the combined output. And (s) are obtained. (S) is applied to the decoder circuit 6.

[Effect of device]

In this way, according to the present invention, a plurality of circuits having different operation characteristics for obtaining a binarized signal are connected in parallel and the output from each circuit is sequentially processed. Therefore, only appropriate data is output from the decoder circuit even when the input signal has amplitude fluctuations or cycle fluctuations. Therefore, without separately preparing a large number of readers with different characteristics,
The range of analog signals that can be supported can be expanded by using only a single device.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing a principle configuration of the present invention, FIG. 2 is a diagram showing a configuration of a sequential processing circuit in FIG. 1 as an embodiment of the present invention, and FIG. FIG. 4 is an operation waveform diagram of FIG. 4, FIG. 4 is a diagram showing a configuration of a conventional device, FIG. 5 is an operation waveform diagram of FIG. 4, and FIGS. 6 and 7 are diagrams showing different operations in FIG. . 1 ... Analog signal input terminal 6 ... Decoder circuit 8-1, 8-2 ... Plural binary circuits 9 ... Sequential processing circuit

Claims (1)

[Scope of utility model registration request] 1. A terminal to which an analog signal obtained by reading a signal recorded on an object is applied, a binarizing circuit connected in parallel to the applying terminal and having different binarizing operation characteristics, and each binarizing circuit. A binarized signal reading device comprising a sequential processing circuit to which the output of the circuit is applied and which converts it into a sequential signal, and a decoder circuit which decodes the output of the sequential processing circuit.