JPH0748468B2 - Pattern formation method - Google Patents
Pattern formation methodInfo
- Publication number
- JPH0748468B2 JPH0748468B2 JP11418087A JP11418087A JPH0748468B2 JP H0748468 B2 JPH0748468 B2 JP H0748468B2 JP 11418087 A JP11418087 A JP 11418087A JP 11418087 A JP11418087 A JP 11418087A JP H0748468 B2 JPH0748468 B2 JP H0748468B2
- Authority
- JP
- Japan
- Prior art keywords
- electron beam
- pattern
- resist
- oxide film
- pattern formation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Electron Beam Exposure (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は電子ビーム露光によるパターン形成方法、詳し
くは、そのマスク工程に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pattern forming method by electron beam exposure, and more particularly, to a mask process thereof.
従来の技術 半導体素子の微細化にともない、電子ビーム露光による
パターン形成が行われている。電子ビーム露光におい
て、半絶縁性基板を用いる場合や、多層レジストの下層
膜厚が大きな場合には、入射電子の帯電により、電子ビ
ームが曲げられるという問題がある。この問題を解決す
るために、レジスト表面に金属薄膜を蒸着する方法や多
層レジストの中間層に金属蒸着膜を用いるという方法が
行われている。2. Description of the Related Art With the miniaturization of semiconductor devices, pattern formation by electron beam exposure has been performed. In the electron beam exposure, when a semi-insulating substrate is used or when the lower layer film thickness of the multilayer resist is large, there is a problem that the electron beam is bent by the charging of incident electrons. In order to solve this problem, a method of vapor-depositing a metal thin film on the resist surface and a method of using a metal vapor-deposited film as an intermediate layer of a multilayer resist are performed.
発明が解決しようとする問題点 前述のように、電子ビーム露光においては、入射電子の
帯電により電子ビームが曲げられると、描画パターンの
歪みが発生する。帯電防止のために金属薄膜を蒸着する
という方法は、製膜時の汚染やプロセスの複雑化という
問題点がある。Problems to be Solved by the Invention As described above, in electron beam exposure, when the electron beam is bent by the charging of incident electrons, the drawing pattern is distorted. The method of vapor-depositing a metal thin film to prevent static electricity has problems of contamination during film formation and complication of the process.
問題点を解決するための手段 本発明は、以上の問題点を解決するためのものであり、
基板上に形成した多層レジスト中の少くとも一層に水素
プラズマ処理を施した塗布酸化膜を用いる工程をそなえ
たパターン形成方法である。Means for Solving Problems The present invention is for solving the above problems,
This is a pattern forming method including a step of using a coated oxide film which has been subjected to hydrogen plasma treatment in at least one layer of a multilayer resist formed on a substrate.
作用 本発明により電子ビーム露光における電子の帯電を防止
することができ、パターンを高精度で形成することが可
能である。Effects According to the present invention, electron charging during electron beam exposure can be prevented, and a pattern can be formed with high accuracy.
実施例 以下に本発明を、第１図〜第５図の実施例工程により、
詳細に説明する。第１図のように、シリコン基板１上に
ノボラック系樹脂による有機薄膜２を、２μｍ厚に塗布
し、275℃,30分間のベークを行う。次にシラノール系塗
布酸化膜３を0.2μｍ厚に塗布し250℃,30分間のベーク
を行った後、平行平板型RIE装置により、水素プラズマ
４による処理を行う。水素プラズマ処理の条件は、水素
流量20sccn,圧力100mTorr,電力密度0.6W/cm2であり、プ
ラズマ処理時間は５分間であった。つづいて、第２図の
ように、電子ビームレジスト５を、ポリメチルメタアク
リレート（PMMA）により0.5μｍ厚に塗布し、170℃,30
分間のベーク後に、電子ビーム６による露光（加速電圧
25KV,露光量100μC/cm2）及び現像（現像液：メチルイ
ソブチルケトン（MIBK））を行い、第３図のレジストパ
ターンを得る。次に、第４図のように、中間層の塗布酸
化膜３をCHF3／O2混合ガスを用いるRIEにより、エッチ
ング（流量CHF345sccn,O25sccn;圧力150mTorr;電力密度
0.5W/cm2）を行う。つづいて下層の有機薄膜２を、酸素
を用いるRIE（流量10sccn,酸素圧力15mTorr,電力密度0.
2W/cm2,30分間）により、エッチングすることにより第
５図のように、レジストパターンを形成する。EXAMPLES The present invention will be described below by the steps of the examples of FIGS. 1 to 5.
The details will be described. As shown in FIG. 1, an organic thin film 2 made of a novolac resin is applied on a silicon substrate 1 to a thickness of 2 μm and baked at 275 ° C. for 30 minutes. Next, a silanol-based oxide film 3 is applied to a thickness of 0.2 μm, baked at 250 ° C. for 30 minutes, and then treated with hydrogen plasma 4 by a parallel plate type RIE apparatus. The hydrogen plasma treatment conditions were a hydrogen flow rate of 20 sccn, a pressure of 100 mTorr, a power density of 0.6 W / cm 2 , and a plasma treatment time of 5 minutes. Then, as shown in FIG. 2, the electron beam resist 5 is coated with polymethylmethacrylate (PMMA) to a thickness of 0.5 μm, and the temperature is maintained at 170 ° C., 30 ° C.
After baking for a minute, exposure by electron beam 6 (accelerating voltage
25KV, exposure amount 100 μC / cm 2 ) and development (developing solution: methyl isobutyl ketone (MIBK)) are carried out to obtain a resist pattern shown in FIG. Next, as shown in FIG. 4, the coated oxide film 3 of the intermediate layer was etched by RIE using a CHF 3 / O 2 mixed gas (flow rate CHF 3 45sccn, O 2 5sccn; pressure 150 mTorr; power density
0.5W / cm 2 ). Next, the lower organic thin film 2 is subjected to RIE using oxygen (flow rate 10 sccn, oxygen pressure 15 mTorr, power density 0.
By etching at 2 W / cm 2 for 30 minutes, a resist pattern is formed as shown in FIG.
形成されたパターンについては、チャージアップによる
パターンのずれは見られなかった。因に、塗布酸化膜の
水素プラズマ処理を行わない従来の３層レジストでは、
露光フィールドの周辺部でのパターンの位置ずれは、0.
3μｍであった。塗布酸化膜の水素プラズマ処理によ
る、チャージアップ防止法は、金属薄膜蒸着と比較し
て、成膜時のダストの発生が無く、プロセスも比較的容
易である。さらにこの方法では従来の３層レジスト法
と、層構成が同じであるため従来の３層レジスト工程が
そのまま適用できるという利点がある。Regarding the formed pattern, no pattern shift due to charge-up was observed. By the way, in the conventional three-layer resist that does not perform the hydrogen plasma treatment of the coated oxide film,
The positional deviation of the pattern at the periphery of the exposure field is 0.
It was 3 μm. The charge-up prevention method by hydrogen plasma treatment of the coated oxide film does not generate dust during film formation and the process is relatively easy as compared with metal thin film vapor deposition. Further, this method has an advantage that the conventional three-layer resist process can be applied as it is because the layer structure is the same as that of the conventional three-layer resist method.
発明の効果 本発明を用いることにより、従来の３層レジスト法に塗
布酸化膜の水素プラズマ処理という工程を加えることで
電子ビームの帯電を防止し、高精度な電子ビームによる
パターン形成が可能となる。EFFECTS OF THE INVENTION By using the present invention, electron beam charging can be prevented by adding a process of hydrogen plasma treatment of a coating oxide film to the conventional three-layer resist method, and it becomes possible to form a pattern with high precision electron beam. .
第１図〜第５図は本発明の実施例を説明する工程順断面
図である。 １……基板、２……有機薄膜、３……塗布酸化膜、４…
…水素プラズマ、５……電子ビームレジスト、６……電
子ビーム露光、７……RIE（CHF3／O2）、８……RIE
（O2）。1 to 5 are cross-sectional views in order of steps, illustrating an embodiment of the present invention. 1 ... Substrate, 2 ... Organic thin film, 3 ... Coating oxide film, 4 ...
… Hydrogen plasma, 5 …… Electron beam resist, 6 …… Electron beam exposure, 7 …… RIE (CHF 3 / O 2 ), 8 …… RIE
(O 2 ).
Claims (1)
も一層に、水素プラズマ処理を施した、塗布酸化膜を用
いる工程をそなえたパターン形成方法。1. A pattern forming method comprising a step of using a coating oxide film which has been subjected to hydrogen plasma treatment on at least one layer of a multilayer resist formed on a substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11418087A JPH0748468B2 (en) | 1987-05-11 | 1987-05-11 | Pattern formation method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11418087A JPH0748468B2 (en) | 1987-05-11 | 1987-05-11 | Pattern formation method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63278333A JPS63278333A (en) | 1988-11-16 |
| JPH0748468B2 true JPH0748468B2 (en) | 1995-05-24 |
Family
ID=14631193
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11418087A Expired - Lifetime JPH0748468B2 (en) | 1987-05-11 | 1987-05-11 | Pattern formation method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0748468B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5362176B2 (en) * | 2006-06-12 | 2013-12-11 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
-
1987
- 1987-05-11 JP JP11418087A patent/JPH0748468B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63278333A (en) | 1988-11-16 |
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