JPH07326629A - Hetero junction type bipolar transistor - Google Patents

Abstract

PURPOSE:To make it possible to form easily HBT which can perform a high- speed operation function, by using a conventional crystal growth method. CONSTITUTION:By using a spacer layer 9 constituted of InAs0.35P0.65 not containing conductive impurities, discontinuity 10 of a valence band is formed. Even when a field gradient in the vicinity of a base-collector junction decreases, therefore, a hole leakage to a collector layer 2 from a base layer 3 can be suppressed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the field of semiconductor devices using high speed electron transistors, and more particularly to semi-insulating I
The present invention relates to an NPN type heterojunction bipolar transistor formed on an nP substrate.

[0002]

2. Description of the Related Art A heterojunction bipolar transistor (HBT) uses an emitter layer having a larger energy bandgap than a base layer. For this reason, the valence band discontinuity is formed between the emitter layer and the base layer, and the greatest feature is that the emitter injection efficiency can be kept large even if the impurity concentration of the semiconductor layer serving as the base layer is increased. As a typical example of HBT, NPN
InP / InGaAs-based type is mentioned.

FIG. 7 is a band diagram (a) showing an energy band state of a conventional HBT and a sectional view (b) showing the structure thereof. In the figure, 1 is In _0.53 Ga containing a high concentration of N-type impurities formed on a semi-insulating InP substrate.
_A collector contact layer made of _0.47 As, 2 is a collector layer made of In _0.53 Ga _0.47 As formed on the collector contact layer 1, and 3 is a P layer formed on the collector layer 2.
Type base layer made of In _0.53 Ga _0.47 As containing a high concentration of impurities, 4 is an emitter layer formed of InP containing N-type impurities formed on the base layer 3, and 5 is an N type formed on the emitter layer 4. In _0.53 Ga _0.47 with high concentration of impurities
It is an emitter contact layer made of As.

In this HBT, a valence band discontinuity 20 of about 0.36 eV is formed between the emitter layer 4 and the base layer 3, whereby the positive valence band to the base layer 3 exists. The holes are prevented from leaking to the emitter layer 3. Therefore, even if the base layer 3 is doped with a high-concentration P-type impurity, the emitter injection efficiency does not deteriorate and a high current gain can be maintained. In a normal HBT, hole leakage from the base layer 3 to the collector layer 2 is suppressed by the reverse electric field applied between the base and collector. This electric field is
It works to pull back the holes leaking from the base layer 3 to the collector layer 2 to the base layer.

[0005]

However, in the HBT having the conventional structure, it is difficult to completely suppress the hole leakage from the base layer to the collector layer, so that the high-speed operation function of the HBT is deteriorated. There was a problem. This hole leakage becomes particularly noticeable when a high-density collector current is injected when a forward voltage is applied between the collector and the emitter or when the reverse voltage is small. FIG. 8 is a band diagram (a) showing an energy band state of a conventional HBT when a collector current having a high current density is injected, and a cross-sectional view (b) showing the configuration. The structure is the same as that of FIG. 7, but the energy band state of the collector layer 2 is different.

Excessive space charge is accumulated in the collector layer 2 to increase the electrostatic potential, which causes a change that raises the energy band. Such a phenomenon is called a Kirk effect, a base widening effect, a space charge effect, or the like. In this situation,
The electric field gradient near the base-collector junction decreases, and it becomes impossible to suppress the hole leakage from the base layer 3 to the collector layer 2. When such hole leakage occurs, the effective collector depletion layer width is reduced, the collector junction capacitance between the base and the collector is rapidly increased, and the high-speed operation function of the HBT is deteriorated.

Here, in order to solve such a problem,
A valence band discontinuity may be formed between the base layer and the collector layer. FIG. 9A is a band diagram showing an energy band state of HBT in which valence band discontinuity is formed.
(B) is a block diagram showing the configuration of the HBT. In the figure, 6 is a base layer made of InGaAsSb (indium gallium antimonide arsenide) formed in a lattice-matched state with a semi-insulating InP substrate, and a valence electron is provided between the base layer 6 and the collector layer 2. A band discontinuity 7 is formed.

By forming the potential barrier in this way, holes in the base layer 6 can be prevented from flowing out to the collector layer 2. This valence band discontinuity 7 is not eliminated even when a collector current having a high current density is injected, and is therefore extremely effective in reducing the Kirk effect. But,
The material containing antimony is formed by metalorganic vapor phase epitaxy (MOCV
When it is formed by a crystal growth method such as D), it is difficult to obtain good crystal quality, and it has not been put to practical use.

The present invention has been made in order to solve the above-mentioned problems, and it is possible to realize a high speed operation function.
It is an object of the present invention to facilitate the formation of BT using a conventional crystal growth method.

[0010]

In the heterojunction bipolar transistor of the present invention, a spacer layer made of InAsP having electron energy at the valence band edge lower than that of the base layer is provided between the collector layer and the base layer. It is characterized by being. Further, a sub-spacer layer made of InGaAs in which an impurity having a higher concentration than that of the collector layer is introduced is provided between the spacer layer and the collector layer. Further, it is characterized in that the composition ratio of As and P in the spacer layer is continuously changed so that As decreases from the base layer interface to the collector layer interface.

On the other hand, a spacer layer made of a strained layer superlattice of InAs and InP having an electron energy at the valence band edge lower than that of the base layer is provided between the collector layer and the base layer. To do. In addition, the InAs layer thickness forming the spacer layer is relatively reduced from the base layer interface to the collector layer interface, and the InP layer thickness is relatively increased from the base layer interface to the collector layer interface. And

[0012]

By providing the spacer layer, a valence band discontinuity is formed between the base layer and the spacer layer. Further, by providing the sub spacer layer, the electric field gradient from the base layer to the collector layer becomes steeper. Moreover, since the As composition ratio of the spacer layer is decreased toward the collector layer, a conduction band discontinuity is formed between the spacer layer and the base layer. In addition, the conduction band can be joined to the collector layer in a smooth state.

[0013]

First, the outline of the present invention will be described with reference to the drawings. FIG. 1 is an explanatory diagram showing the band structure of InAs _x P _1-x . In the figure, the horizontal axis represents the InAs composition ratio x, and the vertical axis represents the band edge energy when the valence band edge of InP is zero. Further, in the figure, I
In _0.53 Ga _0.47 As for comparison with nAs _x P _1-x
The conduction band edge and the valence band edge of are also indicated by broken lines.

Here, the calculation was performed in consideration of the effects of hydrostatic pressure and uniaxial stress due to strain, assuming that InAs _x P _1-x is sufficiently thin and pseudo-lattice-matched with InP which is the material of the substrate. The parameters required for the calculation are described in the literature (Indium P
hosphide and Related Materials: Processing, Technolo
gy, and Devices, 1992 ARTECH HOUSE, INC., published).

In FIG. 1, for example, InAs _0.35 P _0.65 and In _0.53 Ga when the composition ratio of InAs is _0.35.
The conduction band edge with _0.47 As is 0 eV, and the energy difference at the valence band edge is about 0.2 eV and about 0.25 eV for heavy holes and light holes, respectively. This InAs
The state of the energy band in the heterojunction of _0.35 P _0.65 and In _0.53 Ga _0.47 As is as shown in FIG.
That is, a heterojunction having a conduction band discontinuity of 0 eV and a valence band discontinuity of about 0.2 to 0.25 eV is formed.

Similarly, FIG. 3 shows InAs _0.56 P _0.44 and I
It is a band diagram showing a state of the energy band in the heterojunction n _0.53 Ga _0.47 As. As shown in FIG. 1, In _0.53 Ga when the composition ratio of InAs is 0.56
_{Due to} the energy difference between the conduction band edge and the valence band edge with _0.47 As, a heterojunction having a conduction band discontinuity of about 0.1 eV and a valence band discontinuity of 0.15 eV is formed. From the above, for example, In _0.53 Ga _0.47
InAs _0.35 P between the base and collector made of As
If a spacer made of _0.65 is inserted, a valence band discontinuity can be formed and a potential barrier for holes in the base layer can be formed.

Embodiment 1. An embodiment of the present invention will be described below. FIG. 4 is a band diagram (a) showing an energy band state of the HBT which is one embodiment of the present invention, and a sectional view (b) showing its configuration. In the figure, 9 is a spacer layer made of InAs _0.35 P _0.65 containing no conductive impurities, and is formed so as to be sandwiched between the collector layer 2 and the base layer 3. Since InAs _0.35 P _0.65 has a lattice mismatch with InP of the substrate, it needs to be thin enough to prevent this misfit transition.
About nm is desirable.

By using the spacer layer 9 as described above,
Since the valence band discontinuity 10 is formed,
Even if the electric field gradient near the base-collector junction decreases,
Hole leakage from the base layer 3 to the collector layer 2 can be suppressed. Note that, in FIG. 4, other symbols are the same as those in FIG. 7.

Example 2. FIG. 5 is a band diagram (a) showing the energy band state of the HBT according to the second embodiment of the present invention, and a cross-sectional view (b) showing its configuration. In the figure, 11 is In _0.53 Ga _0.47 As containing N-type impurities.
Is a sub-spacer layer having a thickness of 5 nm, and the other layer structure is the same as in FIG. The electrons injected from the base layer 3 are accelerated in the collector layer 2. In the conventional HBT shown in FIG. 7, the initial injection rate of electrons is 1 due to this acceleration.
It is about 10 ⁷ cm / s. However, in the collector layer 2, the initial electron injection rate can be up to 1 × 10 ⁸ cm / s.

Here, if the impurity concentration of the sub spacer layer 11 is 1 × 10 ¹⁸ cm ⁻³ , the potential drop 12 in the conduction band of the spacer layer 9 can be 0.2 eV. Then, due to this potential drop 12, the electrons injected from the base layer 3 are rapidly accelerated,
1 × 10, which is the maximum electron velocity in a typical compound semiconductor
It is accelerated to ⁸ cm / s. As a result, even under a bias condition of a low collector voltage and a high collector current, the space charge can be suppressed to a relatively small amount, and the collector current can be injected further.

Even in such a situation, the effect of valence band discontinuity works effectively, and the Kirk effect can be sufficiently suppressed. Due to the above effects, this embodiment 2
According to the method, a high collector current can be injected without increasing the collector junction capacitance, which is extremely effective for ultra-high speed operation of the HBT.

Example 3. FIG. 6 is a band diagram (a) showing an energy band state of the HBT according to the third embodiment of the present invention, and a cross-sectional view (b) showing the configuration thereof. In the figure, 15 is InAs _x P _x-1 which does not contain conductive impurities.
The spacer layer is composed of, and the other layer structure is the same as in FIG. 7. The spacer layer 15 has an InAs composition ratio x of 0.56 from the interface of the base layer 3 to the interface of the collector layer 2.
To 0.35 are continuously changed.

Therefore, the interface between the base layer 3 and the spacer layer 15 is in the state shown in FIG. That is, about 0.
A conduction band discontinuity 16 of 1 eV and a valence band discontinuity 17 of about 0.15 eV are formed. On the other hand, collector layer 2
At the interface between the spacer layer 15 and the spacer layer 15, the state shown in FIG. 2 is established, and the conduction band discontinuity does not occur, and the two are smoothly connected.

The valence band discontinuity 17 prevents holes in the base layer 3 from leaking out to the collector layer 2. Then, due to the conduction band discontinuity 17, the electrons injected from the base layer 3 are immediately accelerated, and as described above, the space charge in the collector layer 2 is reduced, and as a result, the injectable collector current is increased. You can

In the first and third embodiments, InAs _x P _x-1 is used as the spacer layer, but the present invention is not limited to this, and a strained layer superlattice composed of InAs and InP may be used. good. In the case of Example 1, InA
The thickness of s and InP are 1.1 nm and 1.9 nm, respectively.
It should be about. In the case of Example 3, the thickness of InAs was changed from 1.7 to 1.1 nm from the base layer 3 side to the collector layer 2 side, and the InP thickness was changed from the base layer 3 side to the collector. The thickness may be changed from 1.3 to 1.9 nm toward the layer 2 side.

By the way, although InGaAs is used for the collector layer in the above embodiment, the present invention is not limited to this, and InP may be used. By using InP for the collector layer, the bandgap energy in the collector layer can be increased and the collector breakdown voltage can be improved. In this case, for example, in the spacer layer made of InAsP, the composition ratio of As is continuously decreased toward the collector layer, and the energy at the conduction band edge is increased at the junction surface with the collector layer to increase the conduction band. Avoid forming discontinuities in.

[0027]

As described above, according to the present invention, by using the spacer layer composed of the strained layer superlattice of InAsP or InAs and InP, holes are prevented from leaking from the collector layer to the base layer. did. For this reason,
Even if a high-density collector current is injected, the upper limit of the collector current can be expanded without increasing the amount of collector junction between the base and collector. Therefore, according to the present invention, there is an effect that an HBT capable of high speed operation can be easily formed by using the conventional crystal growth method.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a band structure of InAs _x P _1-x .

FIG. 2 InAs _0.35 P _0.65 and In _0.53 Ga _0.47 As
3 is a band diagram showing the state of energy bands in the heterojunction of FIG.

FIG. 3 InAs _0.56 P _0.44 and In _0.53 Ga _0.47 As
3 is a band diagram showing the state of energy bands in the heterojunction of FIG.

FIG. 4 is a band diagram (a) showing an energy band state of the HBT which is one embodiment of the present invention, and a cross-sectional view (b) showing its configuration.

FIG. 5 is a band diagram (a) showing an energy band state of the HBT according to the second embodiment of the present invention, and a cross-sectional view (b) showing its configuration.

FIG. 6 is a band diagram (a) showing an energy band state of an HBT according to a third embodiment of the present invention, and a cross-sectional view (b) showing its configuration.

FIG. 7 is a band diagram (a) showing an energy band state of a conventional HBT and a cross-sectional view (b) showing its configuration.

FIG. 8 is a band diagram (a) showing an energy band state of a conventional HBT when a collector current having a high current density is injected, and a cross-sectional view (b) showing the configuration.

FIG. 9 is a band diagram (a) showing an energy band state of an HBT in which a valence band discontinuity is formed, and a cross-sectional view (b) showing its configuration.

[Explanation of symbols]

1 ... Collector contact layer, 2 ... Collector layer, 3 ... Base layer, 4 ... Emitter layer, 5 ... Emitter contact layer,
9, 15 ... Spacer layer, 10, 17, 20 ... Valence band discontinuity, 11 ... Sub spacer layer, 12 ... Potential drop, 16 ... Conduction band discontinuity.

Claims (5)

[Claims] 1. InGaAs formed on an InP substrate
Alternatively, a collector layer made of InP, a base layer made of InGaAs formed thereon, and InGaAsP or InAlG formed thereon
In a heterojunction bipolar transistor including an emitter layer of aAs group, InAs having a valence band edge electron energy lower than that of the base layer between the collector layer and the base layer.
A heterojunction bipolar transistor, characterized in that a spacer layer made of P is provided. 2. The heterojunction bipolar transistor according to claim 1, wherein a subspacer layer made of InGaAs, in which an impurity having a higher concentration than that of the collector layer is introduced, is provided between the spacer layer and the collector layer. A heterojunction bipolar transistor characterized in that 3. The heterojunction bipolar transistor according to claim 1, wherein the composition ratio of As and P in the spacer layer is continuous such that As decreases from the base layer interface to the collector layer interface. Heterojunction bipolar transistor characterized in that the characteristics of the heterojunction bipolar transistor change. 4. InGaAs formed on an InP substrate
Alternatively, a collector layer made of InP, a base layer made of InGaAs formed thereon, and InGaAsP or InAlG formed thereon
A heterojunction bipolar transistor comprising an emitter layer consisting of aAs group, wherein InAs and I have an electron energy at a valence band edge lower than that of the base layer between the collector layer and the base layer.
A heterojunction bipolar transistor characterized in that a spacer layer composed of a strained layer superlattice of nP is provided. 5. The heterojunction bipolar transistor according to claim 4, wherein a layer thickness of the InAs forming the spacer layer is relatively reduced from an interface of the base layer to an interface of the collector layer, and a layer thickness of the InP. Is relatively increased from the base layer interface to the collector layer interface.